On Thu, Feb 2, 2017 at 4:05 PM, wrote:
> From: Thor Thayer
>
> Add the device tree entries needed to support the EMAC AXI
> bus settings on the Arria10 SoCFPGA chip.
>
> Signed-off-by: Thor Thayer
> ---
> v2
On Thu, Feb 2, 2017 at 4:05 PM, wrote:
> From: Thor Thayer
>
> Add the device tree entries needed to support the EMAC AXI
> bus settings on the Arria10 SoCFPGA chip.
>
> Signed-off-by: Thor Thayer
> ---
> v2 Add the AXI configuration to the other DW EMACs in the chip.
> ---
>
From: Thor Thayer
Add the device tree entries needed to support the EMAC AXI
bus settings on the Arria10 SoCFPGA chip.
Signed-off-by: Thor Thayer
---
v2 Add the AXI configuration to the other DW EMACs in the chip.
---
From: Thor Thayer
Add the device tree entries needed to support the EMAC AXI
bus settings on the Arria10 SoCFPGA chip.
Signed-off-by: Thor Thayer
---
v2 Add the AXI configuration to the other DW EMACs in the chip.
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 9 +
1 file changed, 9
4 matches
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