On 08/17/2014 07:50 PM, Rob Herring wrote:
On 07/30/2014 01:22 PM, ttha...@opensource.altera.com wrote:
From: Thor Thayer
Add the Altera SDRAM controller bindings and device tree changes to the Altera
SoC project.
Signed-off-by: Thor Thayer
---
v2: Changes to SoC SDRAM EDAC code.
v3:
On 07/30/2014 01:22 PM, ttha...@opensource.altera.com wrote:
> From: Thor Thayer
>
> Add the Altera SDRAM controller bindings and device tree changes to the
> Altera SoC project.
>
> Signed-off-by: Thor Thayer
> ---
> v2: Changes to SoC SDRAM EDAC code.
>
> v3: Implement code suggestions for
On 07/30/2014 01:22 PM, ttha...@opensource.altera.com wrote:
From: Thor Thayer ttha...@opensource.altera.com
Add the Altera SDRAM controller bindings and device tree changes to the
Altera SoC project.
Signed-off-by: Thor Thayer ttha...@opensource.altera.com
---
v2: Changes to SoC SDRAM
On 08/17/2014 07:50 PM, Rob Herring wrote:
On 07/30/2014 01:22 PM, ttha...@opensource.altera.com wrote:
From: Thor Thayer ttha...@opensource.altera.com
Add the Altera SDRAM controller bindings and device tree changes to the Altera
SoC project.
Signed-off-by: Thor Thayer
From: Thor Thayer
Add the Altera SDRAM controller bindings and device tree changes to the Altera
SoC project.
Signed-off-by: Thor Thayer
---
v2: Changes to SoC SDRAM EDAC code.
v3: Implement code suggestions for SDRAM EDAC code.
v4: Remove syscon from SDRAM controller bindings.
v5: No
From: Thor Thayer ttha...@opensource.altera.com
Add the Altera SDRAM controller bindings and device tree changes to the Altera
SoC project.
Signed-off-by: Thor Thayer ttha...@opensource.altera.com
---
v2: Changes to SoC SDRAM EDAC code.
v3: Implement code suggestions for SDRAM EDAC code.
v4:
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