Re: [Question] How to implement GPIO driver for sparse hw numbers?

2015-07-15 Thread Masahiro Yamada
Hi Linus, 2015-07-15 7:04 GMT+09:00 Linus Walleij : > On Fri, Jun 19, 2015 at 5:27 AM, Masahiro Yamada > wrote: > >> In my understanding, the GPIO driver framework requires that >> the hw numbers should be contiguous within each GPIO chip. > > Yes but noone says that .request() to the driver

Re: [Question] How to implement GPIO driver for sparse hw numbers?

2015-07-15 Thread Masahiro Yamada
Hi Linus, 2015-07-15 7:04 GMT+09:00 Linus Walleij linus.wall...@linaro.org: On Fri, Jun 19, 2015 at 5:27 AM, Masahiro Yamada yamada.masah...@socionext.com wrote: In my understanding, the GPIO driver framework requires that the hw numbers should be contiguous within each GPIO chip. Yes but

Re: [Question] How to implement GPIO driver for sparse hw numbers?

2015-07-14 Thread Linus Walleij
On Fri, Jun 19, 2015 at 5:27 AM, Masahiro Yamada wrote: > In my understanding, the GPIO driver framework requires that > the hw numbers should be contiguous within each GPIO chip. Yes but noone says that .request() to the driver has to succeed on every GPIO so just cover all GPIOs from 0 to 307

Re: [Question] How to implement GPIO driver for sparse hw numbers?

2015-07-14 Thread Linus Walleij
On Fri, Jun 19, 2015 at 5:27 AM, Masahiro Yamada yamada.masah...@socionext.com wrote: In my understanding, the GPIO driver framework requires that the hw numbers should be contiguous within each GPIO chip. Yes but noone says that .request() to the driver has to succeed on every GPIO so just

[Question] How to implement GPIO driver for sparse hw numbers?

2015-06-18 Thread Masahiro Yamada
Hi GPIO experts, I am trying to implement a new GPIO driver for a new SoC. I'd like to consult experts how to solve my problem. According to the hardware specification book, the GPIO ports on my SoC are labelled from PORT0 to PORT307 as follows: PORT0, PORT1, PORT2, PORT7,-->

[Question] How to implement GPIO driver for sparse hw numbers?

2015-06-18 Thread Masahiro Yamada
Hi GPIO experts, I am trying to implement a new GPIO driver for a new SoC. I'd like to consult experts how to solve my problem. According to the hardware specification book, the GPIO ports on my SoC are labelled from PORT0 to PORT307 as follows: PORT0, PORT1, PORT2, PORT7,--