On 31.05.2018 22:30, Boris Brezillon wrote:
> On Thu, 31 May 2018 19:54:08 +0200
> Stefan Agner wrote:
>
>> >> +
>> >> + mtd->dev.parent = &pdev->dev;
>> >> + mtd->name = "tegra_nand";
>> >
>> > I just figured it was undocumented (yet) but you could have a label
>> > string property in your nand
On Thu, 31 May 2018 19:54:08 +0200
Stefan Agner wrote:
> >> +
> >> + mtd->dev.parent = &pdev->dev;
> >> + mtd->name = "tegra_nand";
> >
> > I just figured it was undocumented (yet) but you could have a label
> > string property in your nand DT node that tells you the name of the
> > MTD devi
Miquel, Boris,
[also adding Rob to to since it is DT related]
On 28.05.2018 00:04, Miquel Raynal wrote:
> Hi Stefan,
>
> I just see your v2 while I'm sending my review on the driver, will
> probably wait for v4 then ;)
>
> Thanks for the work though!
> Miquèl
>
> On Tue, 22 May 2018 14:07:06 +
On 28.05.2018 00:04, Miquel Raynal wrote:
> Hi Stefan,
>
> I just see your v2 while I'm sending my review on the driver, will
> probably wait for v4 then ;)
Hehe, yeah lets hope we do not race on v3 :-)
Some comments to things which are not addressed yet in v2:
>
> Thanks for the work though!
Hi Stefan,
I just see your v2 while I'm sending my review on the driver, will
probably wait for v4 then ;)
Thanks for the work though!
Miquèl
On Tue, 22 May 2018 14:07:06 +0200, Stefan Agner
wrote:
> Add support for the NAND flash controller found on NVIDIA
> Tegra 2 SoCs. This implementation
On 27.05.2018 18:30, Boris Brezillon wrote:
> On Sun, 27 May 2018 17:54:03 +0200
> Miquel Raynal wrote:
>
>> Hi Boris,
>>
>> On Sun, 27 May 2018 17:13:37 +0200, Boris Brezillon
>> wrote:
>>
>> > On Sun, 27 May 2018 16:18:32 +0200
>> > Miquel Raynal wrote:
>> >
>> > > Hi Stefan,
>> > >
>> > > On
On Sun, 27 May 2018 17:54:03 +0200
Miquel Raynal wrote:
> Hi Boris,
>
> On Sun, 27 May 2018 17:13:37 +0200, Boris Brezillon
> wrote:
>
> > On Sun, 27 May 2018 16:18:32 +0200
> > Miquel Raynal wrote:
> >
> > > Hi Stefan,
> > >
> > > On Thu, 24 May 2018 14:19:18 +0200, Stefan Agner
> > > w
Hi Boris,
On Sun, 27 May 2018 17:13:37 +0200, Boris Brezillon
wrote:
> On Sun, 27 May 2018 16:18:32 +0200
> Miquel Raynal wrote:
>
> > Hi Stefan,
> >
> > On Thu, 24 May 2018 14:19:18 +0200, Stefan Agner
> > wrote:
> >
> > > On 24.05.2018 13:53, Boris Brezillon wrote:
> > > > Hi Benjam
On Sun, 27 May 2018 16:18:32 +0200
Miquel Raynal wrote:
> Hi Stefan,
>
> On Thu, 24 May 2018 14:19:18 +0200, Stefan Agner
> wrote:
>
> > On 24.05.2018 13:53, Boris Brezillon wrote:
> > > Hi Benjamin,
> > >
> > > On Thu, 24 May 2018 13:30:14 +0200
> > > Benjamin Lindqvist wrote:
> > >
Hi Stefan,
On Thu, 24 May 2018 14:19:18 +0200, Stefan Agner
wrote:
> On 24.05.2018 13:53, Boris Brezillon wrote:
> > Hi Benjamin,
> >
> > On Thu, 24 May 2018 13:30:14 +0200
> > Benjamin Lindqvist wrote:
> >
> >> Hi Stefan,
> >>
> >> It seems to me that a probe similar to what the BootROM do
Hi Stefan,
On Fri, 25 May 2018 00:56:23 +0200, Stefan Agner
wrote:
> On 24.05.2018 14:41, Boris Brezillon wrote:
> > On Thu, 24 May 2018 14:23:56 +0200
> > Boris Brezillon wrote:
> >
> >> On Thu, 24 May 2018 13:09:53 +0200
> >> Stefan Agner wrote:
> >>
> >> > On 24.05.2018 10:56, Boris Br
On 24.05.2018 14:41, Boris Brezillon wrote:
> On Thu, 24 May 2018 14:23:56 +0200
> Boris Brezillon wrote:
>
>> On Thu, 24 May 2018 13:09:53 +0200
>> Stefan Agner wrote:
>>
>> > On 24.05.2018 10:56, Boris Brezillon wrote:
>> > > On Thu, 24 May 2018 10:46:27 +0200
>> > > Stefan Agner wrote:
>> >
On Thu, 24 May 2018 14:23:56 +0200
Boris Brezillon wrote:
> On Thu, 24 May 2018 13:09:53 +0200
> Stefan Agner wrote:
>
> > On 24.05.2018 10:56, Boris Brezillon wrote:
> > > On Thu, 24 May 2018 10:46:27 +0200
> > > Stefan Agner wrote:
> > >
> > >> Hi Boris,
> > >>
> > >> Thanks for the i
On Thu, 24 May 2018 13:09:53 +0200
Stefan Agner wrote:
> On 24.05.2018 10:56, Boris Brezillon wrote:
> > On Thu, 24 May 2018 10:46:27 +0200
> > Stefan Agner wrote:
> >
> >> Hi Boris,
> >>
> >> Thanks for the initial review! One small question below:
> >>
> >> On 23.05.2018 16:18, Boris Brezil
On Thu, 24 May 2018 13:09:53 +0200
Stefan Agner wrote:
> On 24.05.2018 10:56, Boris Brezillon wrote:
> > On Thu, 24 May 2018 10:46:27 +0200
> > Stefan Agner wrote:
> >
> >> Hi Boris,
> >>
> >> Thanks for the initial review! One small question below:
> >>
> >> On 23.05.2018 16:18, Boris Brezil
On 24.05.2018 13:53, Boris Brezillon wrote:
> Hi Benjamin,
>
> On Thu, 24 May 2018 13:30:14 +0200
> Benjamin Lindqvist wrote:
>
>> Hi Stefan,
>>
>> It seems to me that a probe similar to what the BootROM does shouldn't
>> be awfully complicated to implement - just cycle through the switch
>> cas
Hi Benjamin,
On Thu, 24 May 2018 13:30:14 +0200
Benjamin Lindqvist wrote:
> Hi Stefan,
>
> It seems to me that a probe similar to what the BootROM does shouldn't
> be awfully complicated to implement - just cycle through the switch
> cases in case of an ECC error. But I guess that's more of an
Hi Stefan,
It seems to me that a probe similar to what the BootROM does shouldn't
be awfully complicated to implement - just cycle through the switch
cases in case of an ECC error. But I guess that's more of an idea for
further improvements rather than a comment to the patch set under
review.
How
On 24.05.2018 10:56, Boris Brezillon wrote:
> On Thu, 24 May 2018 10:46:27 +0200
> Stefan Agner wrote:
>
>> Hi Boris,
>>
>> Thanks for the initial review! One small question below:
>>
>> On 23.05.2018 16:18, Boris Brezillon wrote:
>> > Hi Stefan,
>> >
>> > On Tue, 22 May 2018 14:07:06 +0200
>> >
On Thu, 24 May 2018 13:00:41 +0200
Stefan Agner wrote:
>
> >
> > Note that we're in fact using this patch set in Linux today, but
> > we had to remove the oobsize inference part. Currently we're
> > simply hard coding it to CFG_TVAL_4, but maybe it would be
> > cleaner to add ECC algo as a boar
On 24.05.2018 09:45, Benjamin Lindqvist wrote:
> Hi Stefan (and all),
>
> First off, I apoloigize in advance if I'm deviating from common
> kernel mailing list courtesy -- this is my first time responding.
> I just have a comment on the NAND driver that I'd like to bring
> to the public.
>
Welco
On Thu, 24 May 2018 10:46:27 +0200
Stefan Agner wrote:
> Hi Boris,
>
> Thanks for the initial review! One small question below:
>
> On 23.05.2018 16:18, Boris Brezillon wrote:
> > Hi Stefan,
> >
> > On Tue, 22 May 2018 14:07:06 +0200
> > Stefan Agner wrote:
> >> +
> >> +struct tegra_nand {
Hi Boris,
Thanks for the initial review! One small question below:
On 23.05.2018 16:18, Boris Brezillon wrote:
> Hi Stefan,
>
> On Tue, 22 May 2018 14:07:06 +0200
> Stefan Agner wrote:
>> +
>> +struct tegra_nand {
>> +void __iomem *regs;
>> +struct clk *clk;
>> +struct gpio_desc *wp
Hi Stefan (and all),
First off, I apoloigize in advance if I'm deviating from common
kernel mailing list courtesy -- this is my first time responding.
I just have a comment on the NAND driver that I'd like to bring
to the public.
> + switch (mtd->oobsize) {
> ...
> + case 224:
> +
Hi Stefan,
On Tue, 22 May 2018 14:07:06 +0200
Stefan Agner wrote:
> +
> +struct tegra_nand {
> + void __iomem *regs;
> + struct clk *clk;
> + struct gpio_desc *wp_gpio;
> +
> + struct nand_chip chip;
> + struct device *dev;
> +
> + struct completion command_complete;
> +
Hi Stefan,
On Tue, 22 May 2018 16:53:46 +0200
Stefan Agner wrote:
> Hi,
>
> I do have some questions for some areas I wanted to improve in the next
> revision. But I would like to make sure that the way I would like to
> implement aligns with the MTD subsystem.
I won't have time to review the
Hi,
I do have some questions for some areas I wanted to improve in the next
revision. But I would like to make sure that the way I would like to
implement aligns with the MTD subsystem.
On 22.05.2018 14:07, Stefan Agner wrote:
> Add support for the NAND flash controller found on NVIDIA
> Tegra 2
On 22.05.2018 15:34, Dmitry Osipenko wrote:
> On 22.05.2018 15:19, Stefan Agner wrote:
>> [review sent to my first patch sent off-ml, moving to ml thread]
>>
>> On 21.05.2018 16:05, Dmitry Osipenko wrote:
>>> Hello Stefan,
>>>
>>> I don't have expertise to review the actual NAND-related driver logi
On 22.05.2018 15:19, Stefan Agner wrote:
> [review sent to my first patch sent off-ml, moving to ml thread]
>
> On 21.05.2018 16:05, Dmitry Osipenko wrote:
>> Hello Stefan,
>>
>> I don't have expertise to review the actual NAND-related driver logic, so I
>> only
>> reviewed the basics. The driver
[review sent to my first patch sent off-ml, moving to ml thread]
On 21.05.2018 16:05, Dmitry Osipenko wrote:
> Hello Stefan,
>
> I don't have expertise to review the actual NAND-related driver logic, so I
> only
> reviewed the basics. The driver code looks good to me, though I've couple
> minor
[Re-sending the review I made before of the series RESEND]
> Hello Stefan,
>
> I don't have expertise to review the actual NAND-related driver logic, so I
> only
> reviewed the basics. The driver code looks good to me, though I've couple
> minor
> comments.
>
> On 21.05.2018 03:16, Stefan Agne
Add support for the NAND flash controller found on NVIDIA
Tegra 2 SoCs. This implementation does not make use of the
command queue feature. Regular operations/data transfers are
done in PIO mode. Page read/writes with hardware ECC make
use of the DMA for data transfer.
Signed-off-by: Lucas Stach
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