Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB

2020-10-29 Thread Vignesh Raghavendra
On Tue, 6 Oct 2020 15:23:46 +0200, Bert Vermeulen wrote: > If a flash chip has more than 16MB capacity but its BFPT reports > BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3. > > The check in spi_nor_set_addr_width() doesn't catch it because addr_width > did get set. This

Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB

2020-10-07 Thread Pratyush Yadav
On 07/10/20 12:59PM, Vignesh Raghavendra wrote: > > > On 10/6/20 8:48 PM, Pratyush Yadav wrote: > > On 06/10/20 03:23PM, Bert Vermeulen wrote: > >> If a flash chip has more than 16MB capacity but its BFPT reports > >> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3. > >> >

Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB

2020-10-07 Thread Vignesh Raghavendra
On 10/6/20 8:48 PM, Pratyush Yadav wrote: > On 06/10/20 03:23PM, Bert Vermeulen wrote: >> If a flash chip has more than 16MB capacity but its BFPT reports >> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3. >> >> The check in spi_nor_set_addr_width() doesn't catch it

Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB

2020-10-06 Thread Greg KH
On Tue, Oct 06, 2020 at 03:23:46PM +0200, Bert Vermeulen wrote: > If a flash chip has more than 16MB capacity but its BFPT reports > BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3. > > The check in spi_nor_set_addr_width() doesn't catch it because addr_width > did get set.

Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB

2020-10-06 Thread Pratyush Yadav
On 06/10/20 03:23PM, Bert Vermeulen wrote: > If a flash chip has more than 16MB capacity but its BFPT reports > BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3. > > The check in spi_nor_set_addr_width() doesn't catch it because addr_width > did get set. This fixes that

[RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB

2020-10-06 Thread Bert Vermeulen
If a flash chip has more than 16MB capacity but its BFPT reports BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3. The check in spi_nor_set_addr_width() doesn't catch it because addr_width did get set. This fixes that check. Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default