Re: [RESEND PATCH v2 5/5] clk: rockchip: add clock controller for the RK3399

Hi Doug, Yes, I will resend my patch series include the previous patches (header file and dt-bindings) of the Jianqun, and update the header file for the MMC defines. Thanks. On 2016年03月09日 08:51, Jianqun Xu wrote: Hi Doug: 在 09/03/2016 07:34, Doug Anderson 写道: Xing Zheng, On Tue,

Re: [RESEND PATCH v2 5/5] clk: rockchip: add clock controller for the RK3399

Hi Doug, Yes, I will resend my patch series include the previous patches (header file and dt-bindings) of the Jianqun, and update the header file for the MMC defines. Thanks. On 2016年03月09日 08:51, Jianqun Xu wrote: Hi Doug: 在 09/03/2016 07:34, Doug Anderson 写道: Xing Zheng, On Tue,

Re: [RESEND PATCH v2 5/5] clk: rockchip: add clock controller for the RK3399

Hi Doug: 在 09/03/2016 07:34, Doug Anderson 写道: Xing Zheng, On Tue, Mar 1, 2016 at 2:15 AM, Xing Zheng wrote: + MMC(SCLK_SDMMC_DRV, "emmc_drv","clk_sdmmc", RK3399_SDMMC_CON0, 1), + MMC(SCLK_SDMMC_SAMPLE, "emmc_sample", "clk_sdmmc",

Re: [RESEND PATCH v2 5/5] clk: rockchip: add clock controller for the RK3399

Hi Doug: 在 09/03/2016 07:34, Doug Anderson 写道: Xing Zheng, On Tue, Mar 1, 2016 at 2:15 AM, Xing Zheng wrote: + MMC(SCLK_SDMMC_DRV, "emmc_drv","clk_sdmmc", RK3399_SDMMC_CON0, 1), + MMC(SCLK_SDMMC_SAMPLE, "emmc_sample", "clk_sdmmc", RK3399_SDMMC_CON1, 1), Can you and

Re: [RESEND PATCH v2 5/5] clk: rockchip: add clock controller for the RK3399

Xing Zheng, On Tue, Mar 1, 2016 at 2:15 AM, Xing Zheng wrote: > + MMC(SCLK_SDMMC_DRV, "emmc_drv","clk_sdmmc", > RK3399_SDMMC_CON0, 1), > + MMC(SCLK_SDMMC_SAMPLE, "emmc_sample", "clk_sdmmc", > RK3399_SDMMC_CON1, 1), Can you and Jianqun Xu please

Re: [RESEND PATCH v2 5/5] clk: rockchip: add clock controller for the RK3399

Xing Zheng, On Tue, Mar 1, 2016 at 2:15 AM, Xing Zheng wrote: > + MMC(SCLK_SDMMC_DRV, "emmc_drv","clk_sdmmc", > RK3399_SDMMC_CON0, 1), > + MMC(SCLK_SDMMC_SAMPLE, "emmc_sample", "clk_sdmmc", > RK3399_SDMMC_CON1, 1), Can you and Jianqun Xu please coordinate? Though I don't

[RESEND PATCH v2 5/5] clk: rockchip: add clock controller for the RK3399

Add the clock tree definition for the new RK3399 SoC. Signed-off-by: Xing Zheng --- Changes in v2: - rename the aplll/apllb to lpll/bpll - add drv/sample clock nodes for sdmmc/sdio drivers/clk/rockchip/Makefile |1 + drivers/clk/rockchip/clk-rk3399.c | 1553

[RESEND PATCH v2 5/5] clk: rockchip: add clock controller for the RK3399

Add the clock tree definition for the new RK3399 SoC. Signed-off-by: Xing Zheng --- Changes in v2: - rename the aplll/apllb to lpll/bpll - add drv/sample clock nodes for sdmmc/sdio drivers/clk/rockchip/Makefile |1 + drivers/clk/rockchip/clk-rk3399.c | 1553