Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

On Fri, Dec 18, 2015 at 12:19 AM, Peter Rosin wrote: > This all makes sense. The reason is that I'm not familiar with > the kernel APIs. I have to wrap my head around how to set up > work to be performed later, etc etc. FWIW a random work to be performed later is a delayed work. It can be

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

On Fri, Dec 18, 2015 at 12:19 AM, Peter Rosin wrote: > This all makes sense. The reason is that I'm not familiar with > the kernel APIs. I have to wrap my head around how to set up > work to be performed later, etc etc. FWIW a random work to be performed later is a delayed

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

On 17/12/15 23:19, Peter Rosin wrote: > Hi Linus, > >> On Mon, Dec 14, 2015 at 11:38 AM, Peter Rosin wrote: >> >> I think I atleast half-understand what you're trying to do. > > Good. It's really not that complicated, but I'm perhaps not describing > it very clearly... > >>> Userspace does the

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

On 17/12/15 23:19, Peter Rosin wrote: > Hi Linus, > >> On Mon, Dec 14, 2015 at 11:38 AM, Peter Rosin wrote: >> >> I think I atleast half-understand what you're trying to do. > > Good. It's really not that complicated, but I'm perhaps not describing > it very clearly... > >>>

RE: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Hi Linus, > On Mon, Dec 14, 2015 at 11:38 AM, Peter Rosin wrote: > > I think I atleast half-understand what you're trying to do. Good. It's really not that complicated, but I'm perhaps not describing it very clearly... > > Userspace does the following when doing this w/o the isr patches: > >

RE: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Hi Linus, > On Mon, Dec 14, 2015 at 11:38 AM, Peter Rosin wrote: > > I think I atleast half-understand what you're trying to do. Good. It's really not that complicated, but I'm perhaps not describing it very clearly... > > Userspace does the following when doing this w/o the

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Hi Peter, On Mon, Dec 14, 2015 at 11:38 AM, Peter Rosin wrote: I think I atleast half-understand what you're trying to do. > Userspace does the following when doing this w/o the isr patches: > > 1. select signal using the MUX > 2. set the DAC so high that INPUT is never reaching that level. >

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Hi Peter, On Mon, Dec 14, 2015 at 11:38 AM, Peter Rosin wrote: I think I atleast half-understand what you're trying to do. > Userspace does the following when doing this w/o the isr patches: > > 1. select signal using the MUX > 2. set the DAC so high that INPUT is never

RE: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Jonathan Cameron [mailto:ji...@kernel.org] wrote: > On 11/12/15 12:53, Linus Walleij wrote: > > Quoting extensively since I'm involving the linux-iio mailinglist. > > > > The use case you describe is hand-in-glove with Industrial I/O. > > I think you want a trigger interface from IIO and read

RE: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Jonathan Cameron [mailto:ji...@kernel.org] wrote: > On 11/12/15 12:53, Linus Walleij wrote: > > Quoting extensively since I'm involving the linux-iio mailinglist. > > > > The use case you describe is hand-in-glove with Industrial I/O. > > I think you want a trigger interface from IIO and read

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

My address for Matt was out of date.. Here's hoping there is only one Matt Porter writing IIO drivers and trying a more recent email address. On 12/12/15 18:02, Jonathan Cameron wrote: > On 11/12/15 12:53, Linus Walleij wrote: >> Quoting extensively since I'm involving the linux-iio mailinglist.

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

On 11/12/15 12:53, Linus Walleij wrote: > Quoting extensively since I'm involving the linux-iio mailinglist. > > The use case you describe is hand-in-glove with Industrial I/O. > I think you want a trigger interface from IIO and read events from > userspace using the IIO character device. > >

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

My address for Matt was out of date.. Here's hoping there is only one Matt Porter writing IIO drivers and trying a more recent email address. On 12/12/15 18:02, Jonathan Cameron wrote: > On 11/12/15 12:53, Linus Walleij wrote: >> Quoting extensively since I'm involving the linux-iio mailinglist.

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

On 11/12/15 12:53, Linus Walleij wrote: > Quoting extensively since I'm involving the linux-iio mailinglist. > > The use case you describe is hand-in-glove with Industrial I/O. > I think you want a trigger interface from IIO and read events from > userspace using the IIO character device. > >

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Quoting extensively since I'm involving the linux-iio mailinglist. The use case you describe is hand-in-glove with Industrial I/O. I think you want a trigger interface from IIO and read events from userspace using the IIO character device. Look at the userspace examples in tools/iio for how it's

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Quoting extensively since I'm involving the linux-iio mailinglist. The use case you describe is hand-in-glove with Industrial I/O. I think you want a trigger interface from IIO and read events from userspace using the IIO character device. Look at the userspace examples in tools/iio for how it's

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Hi! On 2015-12-09 09:01, Ludovic Desroches wrote: > Hi Peter, > > On Tue, Dec 08, 2015 at 04:20:06AM +0100, Peter Rosin wrote: >> From: Peter Rosin >> >> Hi! >> >> I have a signal connected to a gpio pin which is the output of >> a comparator. By changing the level of one of the inputs to the

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Hi Peter, On Tue, Dec 08, 2015 at 04:20:06AM +0100, Peter Rosin wrote: > From: Peter Rosin > > Hi! > > I have a signal connected to a gpio pin which is the output of > a comparator. By changing the level of one of the inputs to the > comparator, I can detect the envelope of the other input to

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Hi! On 2015-12-09 09:01, Ludovic Desroches wrote: > Hi Peter, > > On Tue, Dec 08, 2015 at 04:20:06AM +0100, Peter Rosin wrote: >> From: Peter Rosin >> >> Hi! >> >> I have a signal connected to a gpio pin which is the output of >> a comparator. By changing the level of one of

Re: [RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

Hi Peter, On Tue, Dec 08, 2015 at 04:20:06AM +0100, Peter Rosin wrote: > From: Peter Rosin > > Hi! > > I have a signal connected to a gpio pin which is the output of > a comparator. By changing the level of one of the inputs to the > comparator, I can detect the envelope of

[RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

From: Peter Rosin Hi! I have a signal connected to a gpio pin which is the output of a comparator. By changing the level of one of the inputs to the comparator, I can detect the envelope of the other input to the comparator by using a series of measurements much in the same maner a manual ADC

[RESEND RFC PATCH 0/2] Expose the PIO_ISR register on SAMA5D3

From: Peter Rosin Hi! I have a signal connected to a gpio pin which is the output of a comparator. By changing the level of one of the inputs to the comparator, I can detect the envelope of the other input to the comparator by using a series of measurements much in the same