Re: [RFC][PATCH 4/4] x86, mpx: context-switch new MPX address size MSR

2017-01-27 Thread Ingo Molnar
* Dave Hansen wrote: > + * The MPX tables change sizes based on the size of the virtual > + * (aka. linear) address space. There is an MSR to tell the CPU > + * whether we want the legacy-style ones or the larger ones when > + * we are running with an eXtended

Re: [RFC][PATCH 4/4] x86, mpx: context-switch new MPX address size MSR

2017-01-27 Thread Ingo Molnar
* Dave Hansen wrote: > + * The MPX tables change sizes based on the size of the virtual > + * (aka. linear) address space. There is an MSR to tell the CPU > + * whether we want the legacy-style ones or the larger ones when > + * we are running with an eXtended virtual address space. > + */ >

[RFC][PATCH 4/4] x86, mpx: context-switch new MPX address size MSR

2017-01-26 Thread Dave Hansen
As mentioned in previous patches, larger address spaces mean larger MPX tables. But, the entire system is either entirely using 5-level paging, or not. We do not mix pagetable formats. If the size of the MPX tables depended soley on the paging mode, old binaries would break because the format

[RFC][PATCH 4/4] x86, mpx: context-switch new MPX address size MSR

2017-01-26 Thread Dave Hansen
As mentioned in previous patches, larger address spaces mean larger MPX tables. But, the entire system is either entirely using 5-level paging, or not. We do not mix pagetable formats. If the size of the MPX tables depended soley on the paging mode, old binaries would break because the format