On Fri, Oct 16, 2015 at 10:43 AM, Peter Zijlstra wrote:
> On Tue, Sep 29, 2015 at 03:39:03PM +0100, Robert Bragg wrote:
>> - We're bridging two complex architectures
>>
>> To review this work I think it will be relevant to have a good
>> general familiarity with Gen graphics (e.g. thinking
On Fri, Oct 16, 2015 at 11:33 AM, Peter Zijlstra wrote:
> On Fri, Oct 16, 2015 at 12:02:28PM +0200, Ingo Molnar wrote:
>>
>> * Peter Zijlstra wrote:
>>
>> > > - We may be making some technical compromises a.t.m for the sake of
>> > > using perf.
>> > >
>> > > perf_event_open() requires even
On Fri, Oct 16, 2015 at 12:02:28PM +0200, Ingo Molnar wrote:
>
> * Peter Zijlstra wrote:
>
> > > - We may be making some technical compromises a.t.m for the sake of
> > > using perf.
> > >
> > > perf_event_open() requires events to either relate to a pid or a
> > > specific cpu core,
* Peter Zijlstra wrote:
> > - We may be making some technical compromises a.t.m for the sake of
> > using perf.
> >
> > perf_event_open() requires events to either relate to a pid or a
> > specific cpu core, while our device pmu relates to neither. Events
> > opened with a pid wi
On Tue, Sep 29, 2015 at 03:39:03PM +0100, Robert Bragg wrote:
> - We're bridging two complex architectures
>
> To review this work I think it will be relevant to have a good
> general familiarity with Gen graphics (e.g. thinking about the OA
> unit's interaction with the command stream
On Tue, Sep 29, 2015 at 03:39:03PM +0100, Robert Bragg wrote:
> Updating Mesa and GPU Top to experiment with this was straightforward
> given the similarity to the perf interface. The main difference is that
> it only supports forwarding metrics via read()s instead of an mmaped
> circular buffer.
On 2015.09.29 15:39:03 +0100, Robert Bragg wrote:
>
> - Logistically it might be more practical to contain this to the
> graphics stack.
>
> It seems fair to consider that if we can't see a very compelling
> benefit to building on perf, then containing this work to
> drivers/gpu/drm
After some recent progress enabling the Observation Architecture unit
for Gen8+, we can hopefully paint a fairly complete picture of the
requirements for supporting the unit from Haswell to Skylake and so
I'm looking again at the challenges in upstreaming this work.
Considering this, it looked lik
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