On Thu, Apr 10, 2014 at 12:09:03PM +0200, Michal Simek wrote:
> The question here is. This driver is just reporting problem through
> edac interface which is counting that errors and provide an unified
> way how to report problems.
Yes, normally you can use edac for reporting and error counting.
On Thu, Apr 10, 2014 at 12:09:03PM +0200, Michal Simek wrote:
The question here is. This driver is just reporting problem through
edac interface which is counting that errors and provide an unified
way how to report problems.
Yes, normally you can use edac for reporting and error counting.
Hi Borislav,
>> My question is if using printk in IRQ handler and report problem is
>> equal to reporting this via edac interface. Or it is just easy way
>> to do but using edac interface is right solution and how to do it
>> properly is different question.
>
> Yeah, it would probably be easier
On Thu, Apr 10, 2014 at 08:12:17AM +0200, Michal Simek wrote:
> I am just curious about this recommendation. Does it mean that we
> shouldn't use edac interface just for reporting problems?
Yes, we should. But, if you want to have two different drivers accessing
the hardware and have to build
On 04/09/2014 07:47 PM, Borislav Petkov wrote:
> On Wed, Apr 09, 2014 at 10:59:49PM +0530, Punnaiah Choudary wrote:
>> There is a driver file cache-l2x0.c under arch/arm/mm for pl310 cache
>> configuration and management. Russel king had suggested to use
>> single driver file for both pl310 edac
On 04/09/2014 07:47 PM, Borislav Petkov wrote:
On Wed, Apr 09, 2014 at 10:59:49PM +0530, Punnaiah Choudary wrote:
There is a driver file cache-l2x0.c under arch/arm/mm for pl310 cache
configuration and management. Russel king had suggested to use
single driver file for both pl310 edac
On Thu, Apr 10, 2014 at 08:12:17AM +0200, Michal Simek wrote:
I am just curious about this recommendation. Does it mean that we
shouldn't use edac interface just for reporting problems?
Yes, we should. But, if you want to have two different drivers accessing
the hardware and have to build
Hi Borislav,
My question is if using printk in IRQ handler and report problem is
equal to reporting this via edac interface. Or it is just easy way
to do but using edac interface is right solution and how to do it
properly is different question.
Yeah, it would probably be easier if you
On Wed, Apr 09, 2014 at 10:59:49PM +0530, Punnaiah Choudary wrote:
> There is a driver file cache-l2x0.c under arch/arm/mm for pl310 cache
> configuration and management. Russel king had suggested to use
> single driver file for both pl310 edac implementation and cache-l2x0.c
> Here is the thread
There is a driver file cache-l2x0.c under arch/arm/mm for pl310 cache
configuration and management. Russel king had suggested to use
single driver file for both pl310 edac implementation and cache-l2x0.c
Here is the thread
http://www.spinics.net/lists/arm-kernel/msg320407.html
please provide your
On Wed, Apr 09, 2014 at 08:18:28AM -0500, Rob Herring wrote:
> I don't think so, the PL310 is present on lots of ARM chips besides
> Xilinx. I don't know how many support parity as that is optional. In
> fact the highbank_l2_edac.c is for the PL310 as well, but the
> registers it uses is all
On Wed, Apr 9, 2014 at 6:32 AM, Borislav Petkov wrote:
> On Sun, Mar 02, 2014 at 08:02:40PM +0530, Punnaiah Choudary Kalluri wrote:
>> Add support for ARM Pl310 L2 cache controller parity error
>>
>> Signed-off-by: Punnaiah Choudary Kalluri
>> ---
>>
On Sun, Mar 02, 2014 at 08:02:40PM +0530, Punnaiah Choudary Kalluri wrote:
> Add support for ARM Pl310 L2 cache controller parity error
>
> Signed-off-by: Punnaiah Choudary Kalluri
> ---
> .../devicetree/bindings/edac/pl310_edac_l2.txt | 19 ++
> drivers/edac/Kconfig
On Sun, Mar 02, 2014 at 08:02:40PM +0530, Punnaiah Choudary Kalluri wrote:
Add support for ARM Pl310 L2 cache controller parity error
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
.../devicetree/bindings/edac/pl310_edac_l2.txt | 19 ++
drivers/edac/Kconfig
On Wed, Apr 9, 2014 at 6:32 AM, Borislav Petkov b...@alien8.de wrote:
On Sun, Mar 02, 2014 at 08:02:40PM +0530, Punnaiah Choudary Kalluri wrote:
Add support for ARM Pl310 L2 cache controller parity error
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
On Wed, Apr 09, 2014 at 08:18:28AM -0500, Rob Herring wrote:
I don't think so, the PL310 is present on lots of ARM chips besides
Xilinx. I don't know how many support parity as that is optional. In
fact the highbank_l2_edac.c is for the PL310 as well, but the
registers it uses is all custom
There is a driver file cache-l2x0.c under arch/arm/mm for pl310 cache
configuration and management. Russel king had suggested to use
single driver file for both pl310 edac implementation and cache-l2x0.c
Here is the thread
http://www.spinics.net/lists/arm-kernel/msg320407.html
please provide your
On Wed, Apr 09, 2014 at 10:59:49PM +0530, Punnaiah Choudary wrote:
There is a driver file cache-l2x0.c under arch/arm/mm for pl310 cache
configuration and management. Russel king had suggested to use
single driver file for both pl310 edac implementation and cache-l2x0.c
Here is the thread
On 04/03/2014 05:24 PM, Borislav Petkov wrote:
> On Thu, Apr 03, 2014 at 05:02:30PM +0200, Michal Simek wrote:
>> Any comment about this driver?
>
> It is all on the TODO list. I'll take a look after the merge window
> closes.
Ok. Thank you,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP ->
On Thu, Apr 03, 2014 at 05:02:30PM +0200, Michal Simek wrote:
> Any comment about this driver?
It is all on the TODO list. I'll take a look after the merge window
closes.
Thanks.
--
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
--
--
To unsubscribe from
Hi Borislav,
On 03/02/2014 03:32 PM, Punnaiah Choudary Kalluri wrote:
> Add support for ARM Pl310 L2 cache controller parity error
>
> Signed-off-by: Punnaiah Choudary Kalluri
> ---
> .../devicetree/bindings/edac/pl310_edac_l2.txt | 19 ++
> drivers/edac/Kconfig
Hi Borislav,
On 03/02/2014 03:32 PM, Punnaiah Choudary Kalluri wrote:
Add support for ARM Pl310 L2 cache controller parity error
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
.../devicetree/bindings/edac/pl310_edac_l2.txt | 19 ++
drivers/edac/Kconfig
On Thu, Apr 03, 2014 at 05:02:30PM +0200, Michal Simek wrote:
Any comment about this driver?
It is all on the TODO list. I'll take a look after the merge window
closes.
Thanks.
--
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
--
--
To unsubscribe from
On 04/03/2014 05:24 PM, Borislav Petkov wrote:
On Thu, Apr 03, 2014 at 05:02:30PM +0200, Michal Simek wrote:
Any comment about this driver?
It is all on the TODO list. I'll take a look after the merge window
closes.
Ok. Thank you,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID:
Add support for ARM Pl310 L2 cache controller parity error
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/edac/pl310_edac_l2.txt | 19 ++
drivers/edac/Kconfig |7 +
drivers/edac/Makefile |1 +
Add support for ARM Pl310 L2 cache controller parity error
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
.../devicetree/bindings/edac/pl310_edac_l2.txt | 19 ++
drivers/edac/Kconfig |7 +
drivers/edac/Makefile
26 matches
Mail list logo
