Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-22 Thread Mukesh Rathor
On Fri, 22 Aug 2014 12:09:27 -0700 Mukesh Rathor wrote: > On Fri, 22 Aug 2014 06:41:40 +0200 > Borislav Petkov wrote: > > > On Thu, Aug 21, 2014 at 07:46:56PM -0700, Mukesh Rathor wrote: > > > Intel doesn't have EFER.NX bit. > > > > Of course it does. > > > > Right, it does. Some

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-22 Thread Mukesh Rathor
On Fri, 22 Aug 2014 06:41:40 +0200 Borislav Petkov wrote: > On Thu, Aug 21, 2014 at 07:46:56PM -0700, Mukesh Rathor wrote: > > Intel doesn't have EFER.NX bit. > > Of course it does. > Right, it does. Some code/comment is misleading... Anyways, reading intel SDMs, if I understand the

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-22 Thread Konrad Rzeszutek Wilk
On Thu, Aug 21, 2014 at 07:46:56PM -0700, Mukesh Rathor wrote: > On Thu, 21 Aug 2014 21:39:04 -0400 > Konrad Rzeszutek Wilk wrote: > > > On Wed, Aug 20, 2014 at 07:16:39PM -0700, Mukesh Rathor wrote: > > > On AMD, NX feature must be enabled in the efer for NX to be honored > > > in the pte

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-22 Thread Mukesh Rathor
On Fri, 22 Aug 2014 12:09:27 -0700 Mukesh Rathor mukesh.rat...@oracle.com wrote: On Fri, 22 Aug 2014 06:41:40 +0200 Borislav Petkov b...@alien8.de wrote: On Thu, Aug 21, 2014 at 07:46:56PM -0700, Mukesh Rathor wrote: Intel doesn't have EFER.NX bit. Of course it does. Right, it

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-22 Thread Konrad Rzeszutek Wilk
On Thu, Aug 21, 2014 at 07:46:56PM -0700, Mukesh Rathor wrote: On Thu, 21 Aug 2014 21:39:04 -0400 Konrad Rzeszutek Wilk konrad.w...@oracle.com wrote: On Wed, Aug 20, 2014 at 07:16:39PM -0700, Mukesh Rathor wrote: On AMD, NX feature must be enabled in the efer for NX to be honored in

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-22 Thread Mukesh Rathor
On Fri, 22 Aug 2014 06:41:40 +0200 Borislav Petkov b...@alien8.de wrote: On Thu, Aug 21, 2014 at 07:46:56PM -0700, Mukesh Rathor wrote: Intel doesn't have EFER.NX bit. Of course it does. Right, it does. Some code/comment is misleading... Anyways, reading intel SDMs, if I understand the

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-21 Thread Borislav Petkov
On Thu, Aug 21, 2014 at 07:46:56PM -0700, Mukesh Rathor wrote: > Intel doesn't have EFER.NX bit. Of course it does. -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-21 Thread Mukesh Rathor
On Thu, 21 Aug 2014 21:39:04 -0400 Konrad Rzeszutek Wilk wrote: > On Wed, Aug 20, 2014 at 07:16:39PM -0700, Mukesh Rathor wrote: > > On AMD, NX feature must be enabled in the efer for NX to be honored > > in the pte entries, otherwise protection fault. We also set SC for > > system calls to be

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-21 Thread Konrad Rzeszutek Wilk
On Wed, Aug 20, 2014 at 07:16:39PM -0700, Mukesh Rathor wrote: > On AMD, NX feature must be enabled in the efer for NX to be honored in > the pte entries, otherwise protection fault. We also set SC for > system calls to be enabled. How come we don't need to do that for Intel (that is set the NX

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-21 Thread Konrad Rzeszutek Wilk
On Wed, Aug 20, 2014 at 07:16:39PM -0700, Mukesh Rathor wrote: On AMD, NX feature must be enabled in the efer for NX to be honored in the pte entries, otherwise protection fault. We also set SC for system calls to be enabled. How come we don't need to do that for Intel (that is set the NX

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-21 Thread Mukesh Rathor
On Thu, 21 Aug 2014 21:39:04 -0400 Konrad Rzeszutek Wilk konrad.w...@oracle.com wrote: On Wed, Aug 20, 2014 at 07:16:39PM -0700, Mukesh Rathor wrote: On AMD, NX feature must be enabled in the efer for NX to be honored in the pte entries, otherwise protection fault. We also set SC for

Re: [Xen-devel] [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-21 Thread Borislav Petkov
On Thu, Aug 21, 2014 at 07:46:56PM -0700, Mukesh Rathor wrote: Intel doesn't have EFER.NX bit. Of course it does. -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a

[V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-20 Thread Mukesh Rathor
On AMD, NX feature must be enabled in the efer for NX to be honored in the pte entries, otherwise protection fault. We also set SC for system calls to be enabled. Signed-off-by: Mukesh Rathor --- arch/x86/xen/enlighten.c | 12 1 file changed, 12 insertions(+) diff --git

[V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu

2014-08-20 Thread Mukesh Rathor
On AMD, NX feature must be enabled in the efer for NX to be honored in the pte entries, otherwise protection fault. We also set SC for system calls to be enabled. Signed-off-by: Mukesh Rathor mukesh.rat...@oracle.com --- arch/x86/xen/enlighten.c | 12 1 file changed, 12