On 2014/11/7 0:34, Marc Zyngier wrote:
> Hi Thomas,
>
> On 06/11/14 10:42, Thomas Gleixner wrote:
>> On Thu, 6 Nov 2014, Thomas Gleixner wrote:
>>> On Wed, 5 Nov 2014, Suravee Suthikulanit wrote:
On 11/5/2014 6:05 PM, Suravee Suthikulanit wrote:
> - Overall, it seems that
Hi Thomas,
On 06/11/14 10:42, Thomas Gleixner wrote:
> On Thu, 6 Nov 2014, Thomas Gleixner wrote:
>> On Wed, 5 Nov 2014, Suravee Suthikulanit wrote:
>>> On 11/5/2014 6:05 PM, Suravee Suthikulanit wrote:
- Overall, it seems that msi_domain_alloc() could be quite different
across
On Thu, 6 Nov 2014, Thomas Gleixner wrote:
> On Wed, 5 Nov 2014, Suravee Suthikulanit wrote:
> > On 11/5/2014 6:05 PM, Suravee Suthikulanit wrote:
> > > - Overall, it seems that msi_domain_alloc() could be quite different
> > > across architectures. Would it be possible to declare this function as
Hi Thomas,
On 06/11/14 10:42, Thomas Gleixner wrote:
On Thu, 6 Nov 2014, Thomas Gleixner wrote:
On Wed, 5 Nov 2014, Suravee Suthikulanit wrote:
On 11/5/2014 6:05 PM, Suravee Suthikulanit wrote:
- Overall, it seems that msi_domain_alloc() could be quite different
across architectures. Would
On 2014/11/7 0:34, Marc Zyngier wrote:
Hi Thomas,
On 06/11/14 10:42, Thomas Gleixner wrote:
On Thu, 6 Nov 2014, Thomas Gleixner wrote:
On Wed, 5 Nov 2014, Suravee Suthikulanit wrote:
On 11/5/2014 6:05 PM, Suravee Suthikulanit wrote:
- Overall, it seems that msi_domain_alloc() could be
On Thu, 6 Nov 2014, Thomas Gleixner wrote:
On Wed, 5 Nov 2014, Suravee Suthikulanit wrote:
On 11/5/2014 6:05 PM, Suravee Suthikulanit wrote:
- Overall, it seems that msi_domain_alloc() could be quite different
across architectures. Would it be possible to declare this function as
weak,
On Wed, 5 Nov 2014, Suravee Suthikulanit wrote:
> On 11/5/2014 6:05 PM, Suravee Suthikulanit wrote:
> > - Overall, it seems that msi_domain_alloc() could be quite different
> > across architectures. Would it be possible to declare this function as
> > weak, and allow arch to override (similar to
On 11/5/2014 6:05 PM, Suravee Suthikulanit wrote:
- Overall, it seems that msi_domain_alloc() could be quite different
across architectures. Would it be possible to declare this function as
weak, and allow arch to override (similar to arch_setup_msi_irq)?
Actually, declaring "msi_domain_ops"
On 11/4/2014 7:01 AM, Jiang Liu wrote:
Hi Suravee,
You may build a two level hierarchy irqdomains. Use the
utilities in this thread
http://www.spinics.net/lists/arm-kernel/msg374722.html to build an MSI
irqdomain to manage MSI controllers
in PCI devices. And build another irqdomain to
On 11/4/2014 7:01 AM, Jiang Liu wrote:
Hi Suravee,
You may build a two level hierarchy irqdomains. Use the
utilities in this thread
http://www.spinics.net/lists/arm-kernel/msg374722.html to build an MSI
irqdomain to manage MSI controllers
in PCI devices. And build another irqdomain to
On 11/5/2014 6:05 PM, Suravee Suthikulanit wrote:
- Overall, it seems that msi_domain_alloc() could be quite different
across architectures. Would it be possible to declare this function as
weak, and allow arch to override (similar to arch_setup_msi_irq)?
Actually, declaring msi_domain_ops as
On Wed, 5 Nov 2014, Suravee Suthikulanit wrote:
On 11/5/2014 6:05 PM, Suravee Suthikulanit wrote:
- Overall, it seems that msi_domain_alloc() could be quite different
across architectures. Would it be possible to declare this function as
weak, and allow arch to override (similar to
On 04/11/14 14:20, Suravee Suthikulpanit wrote:
>
>
> On 11/4/14 04:06, Thomas Gleixner wrote:
>> On Mon, 3 Nov 2014, Suravee Suthikulanit wrote:
>>> On 11/3/2014 4:51 PM, Thomas Gleixner wrote:
On Mon, 3 Nov 2014, suravee.suthikulpa...@amd.com wrote:
> +
On 11/4/14 07:01, Jiang Liu wrote:
Hi Suravee,
You may build a two level hierarchy irqdomains. Use the
utilities in this thread
http://www.spinics.net/lists/arm-kernel/msg374722.html to build an MSI
irqdomain to manage MSI controllers
in PCI devices. And build another irqdomain to manage
On Tue, 4 Nov 2014, Suravee Suthikulpanit wrote:
> And that's what I am trying to do here except that GIC is expecting that
> information to be passed to it via irq_domain_alloc_irqs(..., args) where args
> is struct of_phandle_args (e.g. in the kernel/irqdomain.c:
> irq_create_of_mapping). This
On 11/4/14 04:06, Thomas Gleixner wrote:
On Mon, 3 Nov 2014, Suravee Suthikulanit wrote:
On 11/3/2014 4:51 PM, Thomas Gleixner wrote:
On Mon, 3 Nov 2014, suravee.suthikulpa...@amd.com wrote:
+ irq_domain_set_hwirq_and_chip(v2m->domain, virq, hwirq,
+
Hi Suravee,
You may build a two level hierarchy irqdomains. Use the
utilities in this thread
http://www.spinics.net/lists/arm-kernel/msg374722.html to build an MSI
irqdomain to manage MSI controllers
in PCI devices. And build another irqdomain to manage SPI allocation
in GICv2.
On Mon, 3 Nov 2014, Suravee Suthikulanit wrote:
> On 11/3/2014 4:51 PM, Thomas Gleixner wrote:
> > On Mon, 3 Nov 2014, suravee.suthikulpa...@amd.com wrote:
> > > + irq_domain_set_hwirq_and_chip(v2m->domain, virq, hwirq,
> > > + _chip, v2m);
> > > +
> > > +
On Mon, 3 Nov 2014, Suravee Suthikulanit wrote:
On 11/3/2014 4:51 PM, Thomas Gleixner wrote:
On Mon, 3 Nov 2014, suravee.suthikulpa...@amd.com wrote:
+ irq_domain_set_hwirq_and_chip(v2m-domain, virq, hwirq,
+ v2m_chip, v2m);
+
+ irq_set_msi_desc(hwirq, desc);
Hi Suravee,
You may build a two level hierarchy irqdomains. Use the
utilities in this thread
http://www.spinics.net/lists/arm-kernel/msg374722.html to build an MSI
irqdomain to manage MSI controllers
in PCI devices. And build another irqdomain to manage SPI allocation
in GICv2.
On 11/4/14 04:06, Thomas Gleixner wrote:
On Mon, 3 Nov 2014, Suravee Suthikulanit wrote:
On 11/3/2014 4:51 PM, Thomas Gleixner wrote:
On Mon, 3 Nov 2014, suravee.suthikulpa...@amd.com wrote:
+ irq_domain_set_hwirq_and_chip(v2m-domain, virq, hwirq,
+
On Tue, 4 Nov 2014, Suravee Suthikulpanit wrote:
And that's what I am trying to do here except that GIC is expecting that
information to be passed to it via irq_domain_alloc_irqs(..., args) where args
is struct of_phandle_args (e.g. in the kernel/irqdomain.c:
irq_create_of_mapping). This works
On 11/4/14 07:01, Jiang Liu wrote:
Hi Suravee,
You may build a two level hierarchy irqdomains. Use the
utilities in this thread
http://www.spinics.net/lists/arm-kernel/msg374722.html to build an MSI
irqdomain to manage MSI controllers
in PCI devices. And build another irqdomain to manage
On 04/11/14 14:20, Suravee Suthikulpanit wrote:
On 11/4/14 04:06, Thomas Gleixner wrote:
On Mon, 3 Nov 2014, Suravee Suthikulanit wrote:
On 11/3/2014 4:51 PM, Thomas Gleixner wrote:
On Mon, 3 Nov 2014, suravee.suthikulpa...@amd.com wrote:
+ irq_domain_set_hwirq_and_chip(v2m-domain, virq,
On 11/3/2014 4:51 PM, Thomas Gleixner wrote:
On Mon, 3 Nov 2014, suravee.suthikulpa...@amd.com wrote:
+static void gicv2m_teardown_msi_irq(struct msi_chip *chip, unsigned int irq)
+{
+ int pos;
+ struct v2m_data *v2m = container_of(chip, struct v2m_data, msi_chip);
+
+
On Mon, 3 Nov 2014, suravee.suthikulpa...@amd.com wrote:
> +static void gicv2m_teardown_msi_irq(struct msi_chip *chip, unsigned int irq)
> +{
> + int pos;
> + struct v2m_data *v2m = container_of(chip, struct v2m_data, msi_chip);
> +
> + spin_lock(>msi_cnt_lock);
Why do you need an
From: Suravee Suthikulpanit
ARM GICv2m specification extends GICv2 to support MSI(-X) with
a new set of register frame. This patch introduces support for
the non-secure GICv2m register frame. Currently, GICV2m is available
in certain version of GIC-400.
The patch introduces a new property in
From: Suravee Suthikulpanit suravee.suthikulpa...@amd.com
ARM GICv2m specification extends GICv2 to support MSI(-X) with
a new set of register frame. This patch introduces support for
the non-secure GICv2m register frame. Currently, GICV2m is available
in certain version of GIC-400.
The patch
On Mon, 3 Nov 2014, suravee.suthikulpa...@amd.com wrote:
+static void gicv2m_teardown_msi_irq(struct msi_chip *chip, unsigned int irq)
+{
+ int pos;
+ struct v2m_data *v2m = container_of(chip, struct v2m_data, msi_chip);
+
+ spin_lock(v2m-msi_cnt_lock);
Why do you need an extra
On 11/3/2014 4:51 PM, Thomas Gleixner wrote:
On Mon, 3 Nov 2014, suravee.suthikulpa...@amd.com wrote:
+static void gicv2m_teardown_msi_irq(struct msi_chip *chip, unsigned int irq)
+{
+ int pos;
+ struct v2m_data *v2m = container_of(chip, struct v2m_data, msi_chip);
+
+
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