Re: [patch?] s2ram + P4 + tsc = annoyance

2008-01-05 Thread Ingo Molnar
* Pavel Machek <[EMAIL PROTECTED]> wrote: > On Sun 2007-12-30 15:08:15, Ingo Molnar wrote: > > > > > ok, i prefer this fix a bit more. (we dont want to set last_tsc > > > outside of the sync_lock - which your initial patch does) > > > > i've added your patch to x86.git - thanks Mike! (patch

Re: [patch?] s2ram + P4 + tsc = annoyance

2008-01-05 Thread Ingo Molnar
* Pavel Machek [EMAIL PROTECTED] wrote: On Sun 2007-12-30 15:08:15, Ingo Molnar wrote: ok, i prefer this fix a bit more. (we dont want to set last_tsc outside of the sync_lock - which your initial patch does) i've added your patch to x86.git - thanks Mike! (patch below) I

Re: [patch?] s2ram + P4 + tsc = annoyance

2008-01-04 Thread Mike Galbraith
On Fri, 2008-01-04 at 17:39 +0100, Pavel Machek wrote: > If it is too dangerous for -final, I guess it is bad idea to push it > into -stable. > > Plus it does not fix really bad bug. The furthest back burner is fine. It's only an annoyance. -Mike -- To unsubscribe from this list:

Re: [patch?] s2ram + P4 + tsc = annoyance

2008-01-04 Thread Pavel Machek
On Sun 2007-12-30 15:08:15, Ingo Molnar wrote: > > > ok, i prefer this fix a bit more. (we dont want to set last_tsc > > outside of the sync_lock - which your initial patch does) > > i've added your patch to x86.git - thanks Mike! (patch below) I think > this would be too dangerous for v2.6.24

Re: [patch?] s2ram + P4 + tsc = annoyance

2008-01-04 Thread Mike Galbraith
On Fri, 2008-01-04 at 17:39 +0100, Pavel Machek wrote: If it is too dangerous for -final, I guess it is bad idea to push it into -stable. Plus it does not fix really bad bug. The furthest back burner is fine. It's only an annoyance. -Mike -- To unsubscribe from this list: send

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-30 Thread Mike Galbraith
On Sun, 2007-12-30 at 15:08 +0100, Ingo Molnar wrote: > > ok, i prefer this fix a bit more. (we dont want to set last_tsc > > outside of the sync_lock - which your initial patch does) > > i've added your patch to x86.git - thanks Mike! (patch below) I think > this would be too dangerous for

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-30 Thread Ingo Molnar
> ok, i prefer this fix a bit more. (we dont want to set last_tsc > outside of the sync_lock - which your initial patch does) i've added your patch to x86.git - thanks Mike! (patch below) I think this would be too dangerous for v2.6.24 though - we can put it back into -stable for 2.6.24.1,

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-30 Thread Ingo Molnar
* Mike Galbraith <[EMAIL PROTECTED]> wrote: > Or, reset to pristine prior to testing, though that's more lines to > accomplish the same thing. Either way, or some other way... > > If check_tsc_warp() is called after initial boot, and the TSC has in > the meantime been set (BIOS, user,

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-30 Thread Ingo Molnar
* Mike Galbraith [EMAIL PROTECTED] wrote: Or, reset to pristine prior to testing, though that's more lines to accomplish the same thing. Either way, or some other way... If check_tsc_warp() is called after initial boot, and the TSC has in the meantime been set (BIOS, user, silicon,

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-30 Thread Ingo Molnar
ok, i prefer this fix a bit more. (we dont want to set last_tsc outside of the sync_lock - which your initial patch does) i've added your patch to x86.git - thanks Mike! (patch below) I think this would be too dangerous for v2.6.24 though - we can put it back into -stable for 2.6.24.1, once

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-30 Thread Mike Galbraith
On Sun, 2007-12-30 at 15:08 +0100, Ingo Molnar wrote: ok, i prefer this fix a bit more. (we dont want to set last_tsc outside of the sync_lock - which your initial patch does) i've added your patch to x86.git - thanks Mike! (patch below) I think this would be too dangerous for v2.6.24

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-27 Thread Mike Galbraith
On Thu, 2007-12-27 at 19:27 +0100, Mike Galbraith wrote: > On Thu, 2007-12-27 at 12:09 -0600, Robert Hancock wrote: > > > Are we missing some logic to resync the TSCs after resume, or something? > > They used to be forcibly synchronized during boot, but it seems that was > dropped in 2.6.21.

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-27 Thread Mike Galbraith
On Thu, 2007-12-27 at 12:09 -0600, Robert Hancock wrote: > Are we missing some logic to resync the TSCs after resume, or something? They used to be forcibly synchronized during boot, but it seems that was dropped in 2.6.21. -Mike -- To unsubscribe from this list: send the line

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-27 Thread Mike Galbraith
Or, reset to pristine prior to testing, though that's more lines to accomplish the same thing. Either way, or some other way... If check_tsc_warp() is called after initial boot, and the TSC has in the meantime been set (BIOS, user, silicon, elves) to a value lower than the last stored/stale

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-27 Thread Robert Hancock
Mike Galbraith wrote: Greetings, s2ram recently became useful here, except for the kernel's annoying habit of disabling my P4's perfectly good TSC. [ 107.894470] CPU 1 is now offline [ 107.894474] SMP alternatives: switching to UP code [ 107.895832] CPU0 attaching sched-domain: [

[patch?] s2ram + P4 + tsc = annoyance

2007-12-27 Thread Mike Galbraith
Greetings, s2ram recently became useful here, except for the kernel's annoying habit of disabling my P4's perfectly good TSC. [ 107.894470] CPU 1 is now offline [ 107.894474] SMP alternatives: switching to UP code [ 107.895832] CPU0 attaching sched-domain: [ 107.895836] domain 0: span 1 [

[patch?] s2ram + P4 + tsc = annoyance

2007-12-27 Thread Mike Galbraith
Greetings, s2ram recently became useful here, except for the kernel's annoying habit of disabling my P4's perfectly good TSC. [ 107.894470] CPU 1 is now offline [ 107.894474] SMP alternatives: switching to UP code [ 107.895832] CPU0 attaching sched-domain: [ 107.895836] domain 0: span 1 [

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-27 Thread Robert Hancock
Mike Galbraith wrote: Greetings, s2ram recently became useful here, except for the kernel's annoying habit of disabling my P4's perfectly good TSC. [ 107.894470] CPU 1 is now offline [ 107.894474] SMP alternatives: switching to UP code [ 107.895832] CPU0 attaching sched-domain: [

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-27 Thread Mike Galbraith
On Thu, 2007-12-27 at 12:09 -0600, Robert Hancock wrote: Are we missing some logic to resync the TSCs after resume, or something? They used to be forcibly synchronized during boot, but it seems that was dropped in 2.6.21. -Mike -- To unsubscribe from this list: send the line

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-27 Thread Mike Galbraith
Or, reset to pristine prior to testing, though that's more lines to accomplish the same thing. Either way, or some other way... If check_tsc_warp() is called after initial boot, and the TSC has in the meantime been set (BIOS, user, silicon, elves) to a value lower than the last stored/stale

Re: [patch?] s2ram + P4 + tsc = annoyance

2007-12-27 Thread Mike Galbraith
On Thu, 2007-12-27 at 19:27 +0100, Mike Galbraith wrote: On Thu, 2007-12-27 at 12:09 -0600, Robert Hancock wrote: Are we missing some logic to resync the TSCs after resume, or something? They used to be forcibly synchronized during boot, but it seems that was dropped in 2.6.21. (but out