Re: [v3, 3/3] powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior

2015-03-30 Thread Michael Ellerman
On Mon, 2015-03-30 at 22:45 +0530, Shreyas B Prabhu wrote: > On Monday 30 March 2015 03:51 PM, Michael Ellerman wrote: > > > > This sounds good, although the name is a bit vague. > How about "fastsleep_workaround_permanent", with default value = 0. User > can make workaround permanent by

Re: [v3, 3/3] powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior

2015-03-30 Thread Shreyas B Prabhu
On Monday 30 March 2015 03:51 PM, Michael Ellerman wrote: > On Sun, 2015-22-03 at 04:42:59 UTC, "Shreyas B. Prabhu" wrote: >> Fastsleep is one of the idle state which cpuidle subsystem currently >> uses on power8 machines. In this state L2 cache is brought down to a >> threshold voltage.

Re: [v3, 3/3] powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior

2015-03-30 Thread Michael Ellerman
On Sun, 2015-22-03 at 04:42:59 UTC, "Shreyas B. Prabhu" wrote: > Fastsleep is one of the idle state which cpuidle subsystem currently > uses on power8 machines. In this state L2 cache is brought down to a > threshold voltage. Therefore when the core is in fastsleep, the > communication between L2

Re: [v3, 3/3] powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior

2015-03-30 Thread Michael Ellerman
On Sun, 2015-22-03 at 04:42:59 UTC, Shreyas B. Prabhu wrote: Fastsleep is one of the idle state which cpuidle subsystem currently uses on power8 machines. In this state L2 cache is brought down to a threshold voltage. Therefore when the core is in fastsleep, the communication between L2 and L3

Re: [v3, 3/3] powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior

2015-03-30 Thread Shreyas B Prabhu
On Monday 30 March 2015 03:51 PM, Michael Ellerman wrote: On Sun, 2015-22-03 at 04:42:59 UTC, Shreyas B. Prabhu wrote: Fastsleep is one of the idle state which cpuidle subsystem currently uses on power8 machines. In this state L2 cache is brought down to a threshold voltage. Therefore when

Re: [v3, 3/3] powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior

2015-03-30 Thread Michael Ellerman
On Mon, 2015-03-30 at 22:45 +0530, Shreyas B Prabhu wrote: On Monday 30 March 2015 03:51 PM, Michael Ellerman wrote: This sounds good, although the name is a bit vague. How about fastsleep_workaround_permanent, with default value = 0. User can make workaround permanent by echoing 1 to

[PATCH v3 3/3] powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior

2015-03-21 Thread Shreyas B. Prabhu
Fastsleep is one of the idle state which cpuidle subsystem currently uses on power8 machines. In this state L2 cache is brought down to a threshold voltage. Therefore when the core is in fastsleep, the communication between L2 and L3 needs to be fenced. But there is a bug in the current power8

[PATCH v3 3/3] powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior

2015-03-21 Thread Shreyas B. Prabhu
Fastsleep is one of the idle state which cpuidle subsystem currently uses on power8 machines. In this state L2 cache is brought down to a threshold voltage. Therefore when the core is in fastsleep, the communication between L2 and L3 needs to be fenced. But there is a bug in the current power8