Re: [v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

2017-05-09 Thread Linu Cherian
> On Tue May 09, 2017 at 02:02:58PM +0100, Robin Murphy wrote: > > On 09/05/17 12:45, Geetha sowjanya wrote: > > > From: Linu Cherian > > > > > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space > > > and PAGE0_REGS_ONLY option is enabled as an

Re: [v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

2017-05-09 Thread Linu Cherian
> On Tue May 09, 2017 at 02:02:58PM +0100, Robin Murphy wrote: > > On 09/05/17 12:45, Geetha sowjanya wrote: > > > From: Linu Cherian > > > > > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space > > > and PAGE0_REGS_ONLY option is enabled as an errata workaround. > > >

Re: [v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

2017-05-09 Thread Linu Cherian
On Tue May 09, 2017 at 02:02:58PM +0100, Robin Murphy wrote: > On 09/05/17 12:45, Geetha sowjanya wrote: > > From: Linu Cherian > > > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space > > and PAGE0_REGS_ONLY option is enabled as an errata

Re: [v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

2017-05-09 Thread Linu Cherian
On Tue May 09, 2017 at 02:02:58PM +0100, Robin Murphy wrote: > On 09/05/17 12:45, Geetha sowjanya wrote: > > From: Linu Cherian > > > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space > > and PAGE0_REGS_ONLY option is enabled as an errata workaround. > > This option

Re: [v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

2017-05-09 Thread Robin Murphy
On 09/05/17 12:45, Geetha sowjanya wrote: > From: Linu Cherian > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space > and PAGE0_REGS_ONLY option is enabled as an errata workaround. > This option when turned on, replaces all page 1 offsets used

Re: [v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

2017-05-09 Thread Robin Murphy
On 09/05/17 12:45, Geetha sowjanya wrote: > From: Linu Cherian > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space > and PAGE0_REGS_ONLY option is enabled as an errata workaround. > This option when turned on, replaces all page 1 offsets used for > EVTQ_PROD/CONS,

[v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

2017-05-09 Thread Geetha sowjanya
From: Linu Cherian Cavium ThunderX2 SMMU implementation doesn't support page 1 register space and PAGE0_REGS_ONLY option is enabled as an errata workaround. This option when turned on, replaces all page 1 offsets used for EVTQ_PROD/CONS, PRIQ_PROD/CONS register access

[v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

2017-05-09 Thread Geetha sowjanya
From: Linu Cherian Cavium ThunderX2 SMMU implementation doesn't support page 1 register space and PAGE0_REGS_ONLY option is enabled as an errata workaround. This option when turned on, replaces all page 1 offsets used for EVTQ_PROD/CONS, PRIQ_PROD/CONS register access with page 0 offsets. SMMU