Hi Lei,
On Tue, Dec 11, 2018 at 05:11:02PM +0800, Lei Wen wrote:
> On Tue, Dec 11, 2018 at 2:02 AM Mathieu Poirier
> wrote:
> >
> > Good day Adrian,
> >
> > On Sat, 8 Dec 2018 at 05:05, Lei Wen wrote:
> > >
> > > Hi Mathieu,
> > >
> > > I am enabling etmv4 coresight over one Cortex-A7 soc,
On Tue, Dec 11, 2018 at 2:02 AM Mathieu Poirier
wrote:
>
> Good day Adrian,
>
> On Sat, 8 Dec 2018 at 05:05, Lei Wen wrote:
> >
> > Hi Mathieu,
> >
> > I am enabling etmv4 coresight over one Cortex-A7 soc, using 32bit kernel.
> > And I am following [1] to do experiment regarding the addr_range
Good day Adrian,
On Sat, 8 Dec 2018 at 05:05, Lei Wen wrote:
>
> Hi Mathieu,
>
> I am enabling etmv4 coresight over one Cortex-A7 soc, using 32bit kernel.
> And I am following [1] to do experiment regarding the addr_range feature.
That wiki is very old and after reading it again I seriously
Hi Mathieu,
I am enabling etmv4 coresight over one Cortex-A7 soc, using 32bit kernel.
And I am following [1] to do experiment regarding the addr_range feature.
The default addr_range is set as _stext~_etext, and it works fine with
etb as sink,
and etm as source. I could see there are valid kernel
Hi Mathieu,
I am enabling etmv4 coresight over one Cortex-A7 soc, using 32bit kernel.
And I am following [1] to do experiment regarding the addr_range feature.
The default addr_range is set as _stext~_etext, and it works fine with
etb as sink,
and etm as source. I could see there are valid kernel
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