On Thu, Apr 18, 2019 at 09:37:58AM +, David Laight wrote:
> From: Jerome Glisse
> > Sent: 16 April 2019 16:33
> ...
> > I am no expert but i am guessing your FPGA set the request field in the
> > PCIE TLP write packet to 00:00.0 and this might work when IOMMU is off but
> > might not work when
From: Jerome Glisse
> Sent: 16 April 2019 16:33
...
> I am no expert but i am guessing your FPGA set the request field in the
> PCIE TLP write packet to 00:00.0 and this might work when IOMMU is off but
> might not work when IOMMU is on ie when IOMMU is on your device should set
> the request
On Wed, Apr 17, 2019 at 04:17:09PM +0200, Patrick Brunner wrote:
> Am Dienstag, 16. April 2019, 17:33:07 CEST schrieb Jerome Glisse:
> > On Mon, Apr 15, 2019 at 06:04:11PM +0200, Patrick Brunner wrote:
> > > Dear all,
> > >
> > > I'm encountering very nasty problems regarding DMA transfers from
Am Dienstag, 16. April 2019, 17:33:07 CEST schrieb Jerome Glisse:
> On Mon, Apr 15, 2019 at 06:04:11PM +0200, Patrick Brunner wrote:
> > Dear all,
> >
> > I'm encountering very nasty problems regarding DMA transfers from an
> > external PCIe device to the main memory while the IOMMU is enabled,
On Mon, Apr 15, 2019 at 06:04:11PM +0200, Patrick Brunner wrote:
> Dear all,
>
> I'm encountering very nasty problems regarding DMA transfers from an external
> PCIe device to the main memory while the IOMMU is enabled, and I'm running
> out
> of ideas. I'm not even sure, whether it's a kernel
Dear all,
I'm encountering very nasty problems regarding DMA transfers from an external
PCIe device to the main memory while the IOMMU is enabled, and I'm running out
of ideas. I'm not even sure, whether it's a kernel issue or not. But I would
highly appreciate any hints from experienced
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