Rafael Wysocki;
> linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
>
> On Wed, Nov 5, 2014 at 11:39 PM, Liu, Chuansheng
> wrote:
> >
> >
> >> -Original Message-
> >> Fr
> The idea of a quirk is to work around a defect in a device. What is
> the defect in this case? It seems there are two devices involved,
> e.g. (from https://bugzilla.kernel.org/show_bug.cgi?id=81551):
>
> 02:00.0 JMicron Technology Corp. JMB363 SATA/IDE Controller
> 02:00.1 JMicron
t; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
>>
>> On 11/06/2014 01:29 PM, Liu, Chuansheng wrote:
>> > Hello Bjorn,
>> >
>> >> -Original Message-
>> >
I tried your patch and it doesn't work,
I think you have forgotten something, maybe you need also to modify the
file /drivers/ata/ahci.c and not only /drivers/ata/pata_jmicron.c
don't forget that I have a JMB363/368 SATA/IDE controller PCIe, which is
both a SATA and IDE controller in one PCie
-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
On 11/06/2014 01:29 PM, Liu, Chuansheng wrote:
Hello Bjorn,
-Original Message-
From: Bjorn Helgaas [mailto:bhelg...@google.com]
Sent: Thursday, November 06, 2014 12:09 PM
To: Liu
The idea of a quirk is to work around a defect in a device. What is
the defect in this case? It seems there are two devices involved,
e.g. (from https://bugzilla.kernel.org/show_bug.cgi?id=81551):
02:00.0 JMicron Technology Corp. JMB363 SATA/IDE Controller
02:00.1 JMicron Technology
-...@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
On Wed, Nov 5, 2014 at 11:39 PM, Liu, Chuansheng
chuansheng@intel.com wrote:
-Original Message-
From: Lu, Aaron
Sent: Thursday, November 06, 2014 1:37 PM
I tried your patch and it doesn't work,
I think you have forgotten something, maybe you need also to modify the
file /drivers/ata/ahci.c and not only /drivers/ata/pata_jmicron.c
don't forget that I have a JMB363/368 SATA/IDE controller PCIe, which is
both a SATA and IDE controller in one PCie
gt; >> To: Liu, Chuansheng
> >> Cc: Barto; Tejun Heo (t...@kernel.org); Lu, Aaron; Rafael Wysocki;
> >> linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
> >> Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
> >>
> >
Lu, Aaron; Rafael Wysocki;
>> linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
>>
>> On Wed, Nov 5, 2014 at 6:48 PM, Liu, Chuansheng
>> wrote:
>>> Hello Bjorn,
>>>
rnel.org
> Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
>
> On Wed, Nov 5, 2014 at 6:48 PM, Liu, Chuansheng
> wrote:
> > Hello Bjorn,
> >
> >> -Original Message-
> >> From: Bjorn Helgaas [mailto:bhelg...@google.com]
&
Hello Bjorn,
in my bugreport I have already tried to add the JMicron 368 in the "if
statement" and it didn't work, check my message here :
https://bugzilla.kernel.org/show_bug.cgi?id=84861#c11
if Chuansheng has choosen a more generic way ( applying the patch to all
JMicron devices ) it's
Tejun Heo; Rafael Wysocki;
>> linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
>>
>> On Wed, Nov 5, 2014 at 11:46 AM, Barto
>> wrote:
>> > this patch solves these 2 bug reports :
ject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
>
> On Wed, Nov 5, 2014 at 11:46 AM, Barto
> wrote:
> > this patch solves these 2 bug reports :
> >
> > https://bugzilla.kernel.org/show_bug.cgi?id=84861
> >
> > https://bugzilla.kernel.org/
Bjorn : the patch initialy created for bug 81551 ( ATAPI-CD-ROM-drive
dead after resume from suspend/s2disk ) was not enough for the bug 84861
( JMicron Technology Corp. JMB368 IDE controller dead after resume when
async suspend is enabled ),
the reason : there are too much models inside the
On Wed, Nov 5, 2014 at 11:46 AM, Barto wrote:
> this patch solves these 2 bug reports :
>
> https://bugzilla.kernel.org/show_bug.cgi?id=84861
>
> https://bugzilla.kernel.org/show_bug.cgi?id=81551
Those bugs were already mentioned. But e6b7e41cdd8c claims to solve
this patch solves these 2 bug reports :
https://bugzilla.kernel.org/show_bug.cgi?id=84861
https://bugzilla.kernel.org/show_bug.cgi?id=81551
in simple words : JMicron IDE/Sata controlers family ( JMBxxx ) are not
fully compatible with async_suspend feature, when a user tries to put
his PC on
On Wed, Nov 05, 2014 at 11:31:59AM -0500, Tejun Heo wrote:
> On Wed, Nov 05, 2014 at 09:07:45AM +0800, Chuansheng Liu wrote:
> > The JMicron chip 361/363/368 contains one SATA controller and
> > one PATA controller, they are brother-relation ship in PCI tree,
> > but for powering on these both
On Tue, Nov 4, 2014 at 6:31 PM, Chuansheng Liu wrote:
> The JMicron chip 361/363/368 contains one SATA controller and
> one PATA controller, they are brother-relation ship in PCI tree,
> but for powering on these both controller, we must follow the
> sequence one by one, otherwise one of them can
I tried the patch, it solves the problem,
but I had to change the patch in order to be compatible with 3.18rc3
source code :
patching file drivers/pci/pci.c
Hunk #1 FAILED at 2046.
1 out of 1 hunk FAILED -- saving rejects to file drivers/pci/pci.c.rej
here is the correct patch for kernel
On Wed, Nov 05, 2014 at 09:07:45AM +0800, Chuansheng Liu wrote:
> The JMicron chip 361/363/368 contains one SATA controller and
> one PATA controller, they are brother-relation ship in PCI tree,
> but for powering on these both controller, we must follow the
> sequence one by one, otherwise one of
On Wed, Nov 05, 2014 at 09:07:45AM +0800, Chuansheng Liu wrote:
The JMicron chip 361/363/368 contains one SATA controller and
one PATA controller, they are brother-relation ship in PCI tree,
but for powering on these both controller, we must follow the
sequence one by one, otherwise one of
I tried the patch, it solves the problem,
but I had to change the patch in order to be compatible with 3.18rc3
source code :
patching file drivers/pci/pci.c
Hunk #1 FAILED at 2046.
1 out of 1 hunk FAILED -- saving rejects to file drivers/pci/pci.c.rej
here is the correct patch for kernel
On Tue, Nov 4, 2014 at 6:31 PM, Chuansheng Liu chuansheng@intel.com wrote:
The JMicron chip 361/363/368 contains one SATA controller and
one PATA controller, they are brother-relation ship in PCI tree,
but for powering on these both controller, we must follow the
sequence one by one,
On Wed, Nov 05, 2014 at 11:31:59AM -0500, Tejun Heo wrote:
On Wed, Nov 05, 2014 at 09:07:45AM +0800, Chuansheng Liu wrote:
The JMicron chip 361/363/368 contains one SATA controller and
one PATA controller, they are brother-relation ship in PCI tree,
but for powering on these both
this patch solves these 2 bug reports :
https://bugzilla.kernel.org/show_bug.cgi?id=84861
https://bugzilla.kernel.org/show_bug.cgi?id=81551
in simple words : JMicron IDE/Sata controlers family ( JMBxxx ) are not
fully compatible with async_suspend feature, when a user tries to put
his PC on
On Wed, Nov 5, 2014 at 11:46 AM, Barto mister.free...@laposte.net wrote:
this patch solves these 2 bug reports :
https://bugzilla.kernel.org/show_bug.cgi?id=84861
https://bugzilla.kernel.org/show_bug.cgi?id=81551
Those bugs were already mentioned. But e6b7e41cdd8c claims to solve
Bjorn : the patch initialy created for bug 81551 ( ATAPI-CD-ROM-drive
dead after resume from suspend/s2disk ) was not enough for the bug 84861
( JMicron Technology Corp. JMB368 IDE controller dead after resume when
async suspend is enabled ),
the reason : there are too much models inside the
not enable async suspend for JMicron chips
On Wed, Nov 5, 2014 at 11:46 AM, Barto mister.free...@laposte.net
wrote:
this patch solves these 2 bug reports :
https://bugzilla.kernel.org/show_bug.cgi?id=84861
https://bugzilla.kernel.org/show_bug.cgi?id=81551
Those bugs were already
-...@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
On Wed, Nov 5, 2014 at 11:46 AM, Barto mister.free...@laposte.net
wrote:
this patch solves these 2 bug reports :
https://bugzilla.kernel.org/show_bug.cgi?id=84861
https
Hello Bjorn,
in my bugreport I have already tried to add the JMicron 368 in the if
statement and it didn't work, check my message here :
https://bugzilla.kernel.org/show_bug.cgi?id=84861#c11
if Chuansheng has choosen a more generic way ( applying the patch to all
JMicron devices ) it's because
: Liu, Chuansheng; Lu, Aaron; Tejun Heo; Rafael Wysocki;
linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
On Wed, Nov 5, 2014 at 11:46 AM, Barto mister.free...@laposte.net
wrote:
this patch solves these 2 bug
-...@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
On Wed, Nov 5, 2014 at 6:48 PM, Liu, Chuansheng
chuansheng@intel.com wrote:
Hello Bjorn,
-Original Message-
From: Bjorn Helgaas [mailto:bhelg...@google.com]
Sent: Thursday
;
linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
On Wed, Nov 5, 2014 at 6:48 PM, Liu, Chuansheng
chuansheng@intel.com wrote:
Hello Bjorn,
-Original Message-
From: Bjorn Helgaas [mailto:bhelg
On 11/05/2014 09:33 AM, Aaron Lu wrote:
> On 11/05/2014 09:07 AM, Chuansheng Liu wrote:
>> The JMicron chip 361/363/368 contains one SATA controller and
>> one PATA controller, they are brother-relation ship in PCI tree,
>> but for powering on these both controller, we must follow the
>> sequence
On 11/05/2014 09:07 AM, Chuansheng Liu wrote:
> The JMicron chip 361/363/368 contains one SATA controller and
> one PATA controller, they are brother-relation ship in PCI tree,
> but for powering on these both controller, we must follow the
> sequence one by one, otherwise one of them can not be
On 11/05/2014 09:07 AM, Chuansheng Liu wrote:
The JMicron chip 361/363/368 contains one SATA controller and
one PATA controller, they are brother-relation ship in PCI tree,
but for powering on these both controller, we must follow the
sequence one by one, otherwise one of them can not be
On 11/05/2014 09:33 AM, Aaron Lu wrote:
On 11/05/2014 09:07 AM, Chuansheng Liu wrote:
The JMicron chip 361/363/368 contains one SATA controller and
one PATA controller, they are brother-relation ship in PCI tree,
but for powering on these both controller, we must follow the
sequence one by
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