RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI

2017-05-10 Thread Liang, Kan
> > > > > +static void flip_smm_bit(void *data) { > > > > + bool set = *(int *)data; > > data points to an unsigned long. So while this works on LE machines this is > still crap. I will change the code as below. +static void flip_smm_bit(void *data) +{ + unsigned long set =

RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI

2017-05-10 Thread Liang, Kan
> > > > > +static void flip_smm_bit(void *data) { > > > > + bool set = *(int *)data; > > data points to an unsigned long. So while this works on LE machines this is > still crap. I will change the code as below. +static void flip_smm_bit(void *data) +{ + unsigned long set =

RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI

2017-05-10 Thread Thomas Gleixner
On Mon, 8 May 2017, Liang, Kan wrote: > Hi tglx, > > Are you OK with patch? > Could I get your "acked-by"? No. > > > +static void flip_smm_bit(void *data) > > > +{ > > > + bool set = *(int *)data; data points to an unsigned long. So while this works on LE machines this is still crap. > > > +

RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI

2017-05-10 Thread Thomas Gleixner
On Mon, 8 May 2017, Liang, Kan wrote: > Hi tglx, > > Are you OK with patch? > Could I get your "acked-by"? No. > > > +static void flip_smm_bit(void *data) > > > +{ > > > + bool set = *(int *)data; data points to an unsigned long. So while this works on LE machines this is still crap. > > > +

RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI

2017-05-08 Thread Liang, Kan
Hi tglx, Are you OK with patch? Could I get your "acked-by"? Thanks, Kan > > > Ping. > Any comments for the patch? > > Thanks, > Kan > > > Subject: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI > > > > From: Kan Liang > > > > Currently, the SMIs are

RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI

2017-05-08 Thread Liang, Kan
Hi tglx, Are you OK with patch? Could I get your "acked-by"? Thanks, Kan > > > Ping. > Any comments for the patch? > > Thanks, > Kan > > > Subject: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI > > > > From: Kan Liang > > > > Currently, the SMIs are visible to all

RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI

2017-04-18 Thread Liang, Kan
Ping. Any comments for the patch? Thanks, Kan > Subject: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI > > From: Kan Liang > > Currently, the SMIs are visible to all performance counters. Because many > users want to measure everything including SMIs. But

RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI

2017-04-18 Thread Liang, Kan
Ping. Any comments for the patch? Thanks, Kan > Subject: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI > > From: Kan Liang > > Currently, the SMIs are visible to all performance counters. Because many > users want to measure everything including SMIs. But in some cases, the