Re: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy interrupts

2017-05-17 Thread Bjorn Helgaas
On Fri, Apr 14, 2017 at 08:34:32PM +0530, Bharat Kumar Gogada wrote: > - Adding spinlock for protecting legacy mask register > - Few wifi end points which only support legacy interrupts, > performs hardware reset functionalities after disabling interrupts > by invoking disable_irq and then re-enabl

RE: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy interrupts

2017-03-06 Thread Bharat Kumar Gogada
Hi Marc, can you please look into my last comments ? Regards, Bharat > Subject: RE: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy > interrupts > > Waiting for Marc's Reply... > > > > -Original Message- > > > From: Marc Zyngier [m

RE: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy interrupts

2017-03-01 Thread Bharat Kumar Gogada
colin.k...@canonical.com; > > linux-...@vger.kernel.org > > Cc: linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org; > > michal.si...@xilinx.com; a...@arndb.de; Ravikiran Gummaluri > > > > Subject: Re: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for l

RE: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy interrupts

2017-02-09 Thread Bharat Kumar Gogada
gt; Cc: linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org; > michal.si...@xilinx.com; a...@arndb.de; Ravikiran Gummaluri > > Subject: Re: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy > interrupts > > On 09/02/17 15:16, Bharat Kumar Gogada wrote: &g

Re: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy interrupts

2017-02-09 Thread Marc Zyngier
On 09/02/17 15:16, Bharat Kumar Gogada wrote: >> >> On 09/02/17 12:01, Bharat Kumar Gogada wrote: On 06/02/17 07:03, Bharat Kumar Gogada wrote: > +static struct irq_chip nwl_leg_irq_chip = { > + .name = "nwl_pcie:legacy", > + .irq_enable = nwl_unmask_leg_irq, > + .irq_disable =

RE: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy interrupts

2017-02-09 Thread Bharat Kumar Gogada
> > On 09/02/17 12:01, Bharat Kumar Gogada wrote: > >> On 06/02/17 07:03, Bharat Kumar Gogada wrote: > >>> +static struct irq_chip nwl_leg_irq_chip = { > >>> + .name = "nwl_pcie:legacy", > >>> + .irq_enable = nwl_unmask_leg_irq, > >>> + .irq_disable = nwl_mask_leg_irq, > >> > >> You don't need the

Re: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy interrupts

2017-02-09 Thread Marc Zyngier
On 09/02/17 12:01, Bharat Kumar Gogada wrote: >> On 06/02/17 07:03, Bharat Kumar Gogada wrote: >>> +static struct irq_chip nwl_leg_irq_chip = { >>> + .name = "nwl_pcie:legacy", >>> + .irq_enable = nwl_unmask_leg_irq, >>> + .irq_disable = nwl_mask_leg_irq, >> >> You don't need these two if the

RE: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy interrupts

2017-02-09 Thread Bharat Kumar Gogada
> On 06/02/17 07:03, Bharat Kumar Gogada wrote: > > - Adding spinlock for protecting legacy mask register > > - Few wifi end points which only support legacy interrupts, > > performs hardware reset functionalities after disabling interrupts > > by invoking disable_irq and then re-enable using enabl

Re: [PATCH v5] PCI: Xilinx NWL: Modifying irq chip for legacy interrupts

2017-02-09 Thread Marc Zyngier
On 06/02/17 07:03, Bharat Kumar Gogada wrote: > - Adding spinlock for protecting legacy mask register > - Few wifi end points which only support legacy interrupts, > performs hardware reset functionalities after disabling interrupts > by invoking disable_irq and then re-enable using enable_irq, the