hmode; Rob Herring; Pawel Moll; Mark Rutland;
>> ijc+devicet...@hellion.org.uk; Kumar Gala; Michal Simek; Soren Brinkmann;
>> devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
>> ker...@vger.kernel.org; linux-spi; Punnaiah Choudary Kalluri;
>> ran27..
Herring; Pawel Moll; Mark Rutland;
ijc+devicet...@hellion.org.uk; Kumar Gala; Michal Simek; Soren Brinkmann;
devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
ker...@vger.kernel.org; linux-spi; Punnaiah Choudary Kalluri;
ran27...@gmail.com
Subject: Re: [RFC PATCH 2/2] spi: Add
k; Soren Brinkmann;
> devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org; linux-spi; Punnaiah Choudary Kalluri;
> ran27...@gmail.com
> Subject: Re: [RFC PATCH 2/2] spi: Add support for Zynq Ultrascale+ MPSoC
> GQSPI controller
>
> O
On Fri, May 22, 2015 at 08:43:54PM +0530, Harini Katakam wrote:
> On Fri, May 22, 2015 at 5:28 PM, Mark Brown wrote:
> > On Wed, May 20, 2015 at 12:57:51PM +0530, Ranjit Waghmode wrote:
> > Why is there a default case here? That's going to men we try to handle
> > any random chip select that
Hi Soren,
Sorry for being late for this reply as this thread is moved a step ahead.
On Wed, 2015-05-20 at 12:57PM +0530, Ranjit Waghmode wrote:
> This patch adds support for GQSPI controller driver used by Zynq
> Ultrascale+ MPSoC
>
> Signed-off-by: Ranjit Waghmode
> ---
[...]
> +/**
> + *
Hi Soren,
Sorry for being late for this reply as this thread is moved a step ahead.
On Wed, 2015-05-20 at 12:57PM +0530, Ranjit Waghmode wrote:
This patch adds support for GQSPI controller driver used by Zynq
Ultrascale+ MPSoC
Signed-off-by: Ranjit Waghmode ranjit.waghm...@xilinx.com
---
On Fri, May 22, 2015 at 08:43:54PM +0530, Harini Katakam wrote:
On Fri, May 22, 2015 at 5:28 PM, Mark Brown broo...@kernel.org wrote:
On Wed, May 20, 2015 at 12:57:51PM +0530, Ranjit Waghmode wrote:
Why is there a default case here? That's going to men we try to handle
any random chip
...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
ker...@vger.kernel.org; linux-spi; Punnaiah Choudary Kalluri;
ran27...@gmail.com
Subject: Re: [RFC PATCH 2/2] spi: Add support for Zynq Ultrascale+ MPSoC
GQSPI controller
On Fri, May 22, 2015 at 08:43:54PM +0530, Harini Katakam
Hi Mark,
On Fri, May 22, 2015 at 5:28 PM, Mark Brown wrote:
> On Wed, May 20, 2015 at 12:57:51PM +0530, Ranjit Waghmode wrote:
>
> This looks pretty good overall but there are a few issues below from a
> first read through.
>
>> +static void zynqmp_gqspi_selectflash(struct zynqmp_qspi
On Wed, May 20, 2015 at 12:57:51PM +0530, Ranjit Waghmode wrote:
This looks pretty good overall but there are a few issues below from a
first read through.
> +static void zynqmp_gqspi_selectflash(struct zynqmp_qspi *instanceptr,
> + u8 flashcs, u8 flashbus)
Is
On Wed, May 20, 2015 at 12:57:51PM +0530, Ranjit Waghmode wrote:
This looks pretty good overall but there are a few issues below from a
first read through.
+static void zynqmp_gqspi_selectflash(struct zynqmp_qspi *instanceptr,
+ u8 flashcs, u8 flashbus)
Is
Hi Mark,
On Fri, May 22, 2015 at 5:28 PM, Mark Brown broo...@kernel.org wrote:
On Wed, May 20, 2015 at 12:57:51PM +0530, Ranjit Waghmode wrote:
This looks pretty good overall but there are a few issues below from a
first read through.
+static void zynqmp_gqspi_selectflash(struct zynqmp_qspi
On Wed, May 20, 2015 at 07:55:53AM -0700, Sören Brinkmann wrote:
> On Wed, 2015-05-20 at 12:57PM +0530, Ranjit Waghmode wrote:
> > +static u32 zynqmp_gqspi_read(struct zynqmp_qspi *xqspi, u32 offset)
> > +static inline void zynqmp_gqspi_write(struct zynqmp_qspi *xqspi, u32
> > offset,
> > +
Hi Ranjit,
On Wed, 2015-05-20 at 12:57PM +0530, Ranjit Waghmode wrote:
> This patch adds support for GQSPI controller driver used by
> Zynq Ultrascale+ MPSoC
>
> Signed-off-by: Ranjit Waghmode
> ---
[...]
> +/**
> + * zynqmp_gqspi_read:For GQSPI controller read operation
> + * @xqspi:
On Wed, May 20, 2015 at 07:55:53AM -0700, Sören Brinkmann wrote:
On Wed, 2015-05-20 at 12:57PM +0530, Ranjit Waghmode wrote:
+static u32 zynqmp_gqspi_read(struct zynqmp_qspi *xqspi, u32 offset)
+static inline void zynqmp_gqspi_write(struct zynqmp_qspi *xqspi, u32
offset,
+
Hi Ranjit,
On Wed, 2015-05-20 at 12:57PM +0530, Ranjit Waghmode wrote:
This patch adds support for GQSPI controller driver used by
Zynq Ultrascale+ MPSoC
Signed-off-by: Ranjit Waghmode ranjit.waghm...@xilinx.com
---
[...]
+/**
+ * zynqmp_gqspi_read:For GQSPI controller read
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