Re: [PATCH] KVM: x86: VMX: hyper-v: Enlightened MSR-Bitmap support

2018-04-13 Thread Vitaly Kuznetsov
Paolo Bonzini writes: > On 12/04/2018 17:25, Vitaly Kuznetsov wrote: >> @@ -5335,6 +5353,9 @@ static void __always_inline >> vmx_disable_intercept_for_msr(unsigned long *msr_bit >> if (!cpu_has_vmx_msr_bitmap()) >> return; >> >> +if

Re: [PATCH] KVM: x86: VMX: hyper-v: Enlightened MSR-Bitmap support

2018-04-13 Thread Vitaly Kuznetsov
Paolo Bonzini writes: > On 12/04/2018 17:25, Vitaly Kuznetsov wrote: >> @@ -5335,6 +5353,9 @@ static void __always_inline >> vmx_disable_intercept_for_msr(unsigned long *msr_bit >> if (!cpu_has_vmx_msr_bitmap()) >> return; >> >> +if (static_branch_unlikely(_emsr_bitmap))

Re: [PATCH] KVM: x86: VMX: hyper-v: Enlightened MSR-Bitmap support

2018-04-13 Thread Paolo Bonzini
On 12/04/2018 17:25, Vitaly Kuznetsov wrote: > @@ -5335,6 +5353,9 @@ static void __always_inline > vmx_disable_intercept_for_msr(unsigned long *msr_bit > if (!cpu_has_vmx_msr_bitmap()) > return; > > + if (static_branch_unlikely(_emsr_bitmap)) > +

Re: [PATCH] KVM: x86: VMX: hyper-v: Enlightened MSR-Bitmap support

2018-04-13 Thread Paolo Bonzini
On 12/04/2018 17:25, Vitaly Kuznetsov wrote: > @@ -5335,6 +5353,9 @@ static void __always_inline > vmx_disable_intercept_for_msr(unsigned long *msr_bit > if (!cpu_has_vmx_msr_bitmap()) > return; > > + if (static_branch_unlikely(_emsr_bitmap)) > +

Re: [PATCH] KVM: x86: VMX: hyper-v: Enlightened MSR-Bitmap support

2018-04-13 Thread Tianyu Lan
On 4/12/2018 11:25 PM, Vitaly Kuznetsov wrote: > Enlightened MSR-Bitmap is a natural extension of Enlightened VMCS: > Hyper-V Top Level Functional Specification states: > > "The L1 hypervisor may collaborate with the L0 hypervisor to make MSR > accesses more efficient. It can enable enlightened

Re: [PATCH] KVM: x86: VMX: hyper-v: Enlightened MSR-Bitmap support

2018-04-13 Thread Tianyu Lan
On 4/12/2018 11:25 PM, Vitaly Kuznetsov wrote: > Enlightened MSR-Bitmap is a natural extension of Enlightened VMCS: > Hyper-V Top Level Functional Specification states: > > "The L1 hypervisor may collaborate with the L0 hypervisor to make MSR > accesses more efficient. It can enable enlightened