Re: [PATCH 1/2] MIPS: SiByte: Set 32-bit bus mask for BCM1250 PCI

2018-11-07 Thread Maciej W. Rozycki
On Wed, 7 Nov 2018, Christoph Hellwig wrote: > > +static int sb1250_bus_dma_mask(struct pci_dev *dev, void *data) > > +{ > > + struct sb1250_bus_dma_mask_exclude *exclude = data; > > + > > + if (!exclude->set && (dev->vendor == PCI_VENDOR_ID_SIBYTE && > > + dev->device

Re: [PATCH 1/2] MIPS: SiByte: Set 32-bit bus mask for BCM1250 PCI

2018-11-07 Thread Maciej W. Rozycki
On Wed, 7 Nov 2018, Christoph Hellwig wrote: > > +static int sb1250_bus_dma_mask(struct pci_dev *dev, void *data) > > +{ > > + struct sb1250_bus_dma_mask_exclude *exclude = data; > > + > > + if (!exclude->set && (dev->vendor == PCI_VENDOR_ID_SIBYTE && > > + dev->device

Re: [PATCH 1/2] MIPS: SiByte: Set 32-bit bus mask for BCM1250 PCI

2018-11-06 Thread Christoph Hellwig
On Wed, Nov 07, 2018 at 12:08:23AM +, Maciej W. Rozycki wrote: > The Broadcom SiByte BCM1250, BCM1125H and BCM1125 SOCs have an onchip > 32-bit PCI host bridge, and the two former SOCs also have an onchip HT > host bridge. The HT host bridge, where present, appears in the PCI >

Re: [PATCH 1/2] MIPS: SiByte: Set 32-bit bus mask for BCM1250 PCI

2018-11-06 Thread Christoph Hellwig
On Wed, Nov 07, 2018 at 12:08:23AM +, Maciej W. Rozycki wrote: > The Broadcom SiByte BCM1250, BCM1125H and BCM1125 SOCs have an onchip > 32-bit PCI host bridge, and the two former SOCs also have an onchip HT > host bridge. The HT host bridge, where present, appears in the PCI >