On Mon, Sep 18, 2017 at 04:03:25PM +0100, Srinivas Kandagatla wrote:
>
>
> On 18/09/17 15:12, Greg Kroah-Hartman wrote:
> > On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org
> > wrote:
> > > From: Oleksij Rempel
> > >
> > > This is a driver for
On Mon, Sep 18, 2017 at 04:03:25PM +0100, Srinivas Kandagatla wrote:
>
>
> On 18/09/17 15:12, Greg Kroah-Hartman wrote:
> > On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org
> > wrote:
> > > From: Oleksij Rempel
> > >
> > > This is a driver for Low Power General Purpose
On 18/09/17 15:12, Greg Kroah-Hartman wrote:
On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:
From: Oleksij Rempel
This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage
On 18/09/17 15:12, Greg Kroah-Hartman wrote:
On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:
From: Oleksij Rempel
This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
of this chip.
It
On 18/09/17 15:12, Greg Kroah-Hartman wrote:
On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:
From: Oleksij Rempel
This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage
On 18/09/17 15:12, Greg Kroah-Hartman wrote:
On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:
From: Oleksij Rempel
This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
of this chip.
It
On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:
> From: Oleksij Rempel
>
> This is a driver for Low Power General Purpose Register (LPGPR)
> available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
> of this chip.
>
> It is a 32-bit
On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:
> From: Oleksij Rempel
>
> This is a driver for Low Power General Purpose Register (LPGPR)
> available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
> of this chip.
>
> It is a 32-bit read/write register
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