On Wed, Oct 09, 2013 at 09:27:14PM +0200, Sebastian Hesselbarth wrote:
> >This add a compatible for the Marvell Tauros3 cache controller which
> >is compatible with l2x0 cache controllers. While updating the binding
> >documentation, clean up the list of possible compatibles.
> >
On Wed, Oct 09, 2013 at 09:27:14PM +0200, Sebastian Hesselbarth wrote:
This add a compatible for the Marvell Tauros3 cache controller which
is compatible with l2x0 cache controllers. While updating the binding
documentation, clean up the list of possible compatibles.
Signed-off-by:
On 10/09/2013 10:50 AM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 05:33:23PM +0100, Gregory CLEMENT wrote:
On 08/10/2013 18:05, Sebastian Hesselbarth wrote:
On 10/08/2013 03:41 PM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
This add a
On 09/10/2013 10:50, Mark Rutland wrote:
> On Tue, Oct 08, 2013 at 05:33:23PM +0100, Gregory CLEMENT wrote:
>> On 08/10/2013 18:05, Sebastian Hesselbarth wrote:
>>> On 10/08/2013 03:41 PM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
> This
On Tue, Oct 08, 2013 at 05:33:23PM +0100, Gregory CLEMENT wrote:
> On 08/10/2013 18:05, Sebastian Hesselbarth wrote:
> > On 10/08/2013 03:41 PM, Mark Rutland wrote:
> >> On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
> >>> This add a compatible for the Marvell Tauros3 cache
On Tue, Oct 08, 2013 at 05:33:23PM +0100, Gregory CLEMENT wrote:
On 08/10/2013 18:05, Sebastian Hesselbarth wrote:
On 10/08/2013 03:41 PM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
This add a compatible for the Marvell Tauros3 cache
On 09/10/2013 10:50, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 05:33:23PM +0100, Gregory CLEMENT wrote:
On 08/10/2013 18:05, Sebastian Hesselbarth wrote:
On 10/08/2013 03:41 PM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
This add a compatible
On 10/09/2013 10:50 AM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 05:33:23PM +0100, Gregory CLEMENT wrote:
On 08/10/2013 18:05, Sebastian Hesselbarth wrote:
On 10/08/2013 03:41 PM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
This add a
On 08/10/2013 18:05, Sebastian Hesselbarth wrote:
> On 10/08/2013 03:41 PM, Mark Rutland wrote:
>> On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
>>> This add a compatible for the Marvell Tauros3 cache controller which
>>> is compatible with l2x0 cache controllers. While
On 10/08/2013 03:41 PM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
This add a compatible for the Marvell Tauros3 cache controller which
is compatible with l2x0 cache controllers. While updating the binding
documentation, clean up the list of
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
> This add a compatible for the Marvell Tauros3 cache controller which
> is compatible with l2x0 cache controllers. While updating the binding
> documentation, clean up the list of possible compatibles.
>
> Signed-off-by:
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
This add a compatible for the Marvell Tauros3 cache controller which
is compatible with l2x0 cache controllers. While updating the binding
documentation, clean up the list of possible compatibles.
Signed-off-by: Sebastian
On 10/08/2013 03:41 PM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
This add a compatible for the Marvell Tauros3 cache controller which
is compatible with l2x0 cache controllers. While updating the binding
documentation, clean up the list of
On 08/10/2013 18:05, Sebastian Hesselbarth wrote:
On 10/08/2013 03:41 PM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian Hesselbarth wrote:
This add a compatible for the Marvell Tauros3 cache controller which
is compatible with l2x0 cache controllers. While updating
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