Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-26 Thread David Vrabel
On 11/09/14 00:36, Mukesh Rathor wrote: > This fixes two bugs in PVH guests: > > - Not setting EFER.NX means the NX bit in page table entries is > ignored on Intel processors and causes reserved bit page faults on > AMD processors. > > - After the Xen commit 7645640d6ff1 ("x86/PVH:

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-26 Thread David Vrabel
On 11/09/14 00:36, Mukesh Rathor wrote: This fixes two bugs in PVH guests: - Not setting EFER.NX means the NX bit in page table entries is ignored on Intel processors and causes reserved bit page faults on AMD processors. - After the Xen commit 7645640d6ff1 (x86/PVH: don't set

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-15 Thread Mukesh Rathor
On Fri, 12 Sep 2014 16:42:58 -0400 Konrad Rzeszutek Wilk wrote: > On Wed, Sep 10, 2014 at 04:36:06PM -0700, Mukesh Rathor wrote: sorry, i didn't realize you had more comments... didn't scroll down :).. > > cpumask_var_t xen_cpu_initialized_map; > > > > @@ -99,10 +100,14 @@ static void

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-15 Thread Konrad Rzeszutek Wilk
On Mon, Sep 15, 2014 at 03:45:53PM +0100, David Vrabel wrote: > On 12/09/14 21:42, Konrad Rzeszutek Wilk wrote: > > On Wed, Sep 10, 2014 at 04:36:06PM -0700, Mukesh Rathor wrote: > >> > >> @@ -413,15 +417,18 @@ cpu_initialize_context(unsigned int cpu, struct > >> task_struct *idle) > >>

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-15 Thread David Vrabel
On 12/09/14 21:42, Konrad Rzeszutek Wilk wrote: > On Wed, Sep 10, 2014 at 04:36:06PM -0700, Mukesh Rathor wrote: >> >> @@ -413,15 +417,18 @@ cpu_initialize_context(unsigned int cpu, struct >> task_struct *idle) >> (unsigned long)xen_failsafe_callback; >>

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-15 Thread David Vrabel
On 12/09/14 21:42, Konrad Rzeszutek Wilk wrote: On Wed, Sep 10, 2014 at 04:36:06PM -0700, Mukesh Rathor wrote: @@ -413,15 +417,18 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle) (unsigned long)xen_failsafe_callback;

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-15 Thread Konrad Rzeszutek Wilk
On Mon, Sep 15, 2014 at 03:45:53PM +0100, David Vrabel wrote: On 12/09/14 21:42, Konrad Rzeszutek Wilk wrote: On Wed, Sep 10, 2014 at 04:36:06PM -0700, Mukesh Rathor wrote: @@ -413,15 +417,18 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle)

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-15 Thread Mukesh Rathor
On Fri, 12 Sep 2014 16:42:58 -0400 Konrad Rzeszutek Wilk konrad.w...@oracle.com wrote: On Wed, Sep 10, 2014 at 04:36:06PM -0700, Mukesh Rathor wrote: sorry, i didn't realize you had more comments... didn't scroll down :).. cpumask_var_t xen_cpu_initialized_map; @@ -99,10 +100,14 @@

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-12 Thread Mukesh Rathor
On Fri, 12 Sep 2014 16:42:58 -0400 Konrad Rzeszutek Wilk wrote: > On Wed, Sep 10, 2014 at 04:36:06PM -0700, Mukesh Rathor wrote: > > This fixes two bugs in PVH guests: > > > > - Not setting EFER.NX means the NX bit in page table entries is > > ignored on Intel processors and causes

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-12 Thread Konrad Rzeszutek Wilk
On Wed, Sep 10, 2014 at 04:36:06PM -0700, Mukesh Rathor wrote: > This fixes two bugs in PVH guests: > > - Not setting EFER.NX means the NX bit in page table entries is > ignored on Intel processors and causes reserved bit page faults on > AMD processors. > > - After the Xen commit

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-12 Thread Konrad Rzeszutek Wilk
On Wed, Sep 10, 2014 at 04:36:06PM -0700, Mukesh Rathor wrote: This fixes two bugs in PVH guests: - Not setting EFER.NX means the NX bit in page table entries is ignored on Intel processors and causes reserved bit page faults on AMD processors. - After the Xen commit

Re: [Xen-devel] [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests

2014-09-12 Thread Mukesh Rathor
On Fri, 12 Sep 2014 16:42:58 -0400 Konrad Rzeszutek Wilk konrad.w...@oracle.com wrote: On Wed, Sep 10, 2014 at 04:36:06PM -0700, Mukesh Rathor wrote: This fixes two bugs in PVH guests: - Not setting EFER.NX means the NX bit in page table entries is ignored on Intel processors and