On 14-04-02 05:58 PM, Brown, Len wrote:
>> [0.840668] intel_idle: lapic_timer_reliable_states 0x2
> vs.
>> [0.877528] intel_idle: lapic_timer_reliable_states 0x
>
> This means CPUID.ARAT is set for the new board, and not set
> for the old board. You can observe that also in
> [0.840668] intel_idle: lapic_timer_reliable_states 0x2
vs.
> [0.877528] intel_idle: lapic_timer_reliable_states 0x
This means CPUID.ARAT is set for the new board, and not set
for the old board. You can observe that also in /proc/cpuinfo flags
where you will likely also find a
> > I'd be interested in the acpi_idle output above for both the
> > new and old boards to see if they are exporting different states
> > on the two boards.
>
> Could be ; I can probably get access to the newer one again too, if
> that will be useful.
yes, please.
> >
> > dmidecode isn't useful
[Re: Regression in intel_idle on Avaton/Rangely Mohon Peak board] On 02/04/2014
(Wed 16:01) Paul Gortmaker wrote:
> On 14-04-01 05:59 PM, Brown, Len wrote:
> >> I've got an eval board with a 1.7GHz Avaton/C2000 that hangs at boot
> >> shortly after the idle driver registra
On 14-04-01 05:59 PM, Brown, Len wrote:
>> I've got an eval board with a 1.7GHz Avaton/C2000 that hangs at boot
>> shortly after the idle driver registration -- typically 1/2 dozen
>> dmesg lines later, around rtc init, or net stack init.
>
> Paul,
> Please boot the failing board with
On 14-04-01 05:59 PM, Brown, Len wrote:
I've got an eval board with a 1.7GHz Avaton/C2000 that hangs at boot
shortly after the idle driver registration -- typically 1/2 dozen
dmesg lines later, around rtc init, or net stack init.
Paul,
Please boot the failing board with
[Re: Regression in intel_idle on Avaton/Rangely Mohon Peak board] On 02/04/2014
(Wed 16:01) Paul Gortmaker wrote:
On 14-04-01 05:59 PM, Brown, Len wrote:
I've got an eval board with a 1.7GHz Avaton/C2000 that hangs at boot
shortly after the idle driver registration -- typically 1/2 dozen
I'd be interested in the acpi_idle output above for both the
new and old boards to see if they are exporting different states
on the two boards.
Could be ; I can probably get access to the newer one again too, if
that will be useful.
yes, please.
dmidecode isn't useful in this
[0.840668] intel_idle: lapic_timer_reliable_states 0x2
vs.
[0.877528] intel_idle: lapic_timer_reliable_states 0x
This means CPUID.ARAT is set for the new board, and not set
for the old board. You can observe that also in /proc/cpuinfo flags
where you will likely also find a
On 14-04-02 05:58 PM, Brown, Len wrote:
[0.840668] intel_idle: lapic_timer_reliable_states 0x2
vs.
[0.877528] intel_idle: lapic_timer_reliable_states 0x
This means CPUID.ARAT is set for the new board, and not set
for the old board. You can observe that also in /proc/cpuinfo
[RE: Regression in intel_idle on Avaton/Rangely Mohon Peak board] On 01/04/2014
(Tue 17:59) Brown, Len wrote:
> > I've got an eval board with a 1.7GHz Avaton/C2000 that hangs at boot
> > shortly after the idle driver registration -- typically 1/2 dozen
> > dmesg lines late
> I've got an eval board with a 1.7GHz Avaton/C2000 that hangs at boot
> shortly after the idle driver registration -- typically 1/2 dozen
> dmesg lines later, around rtc init, or net stack init.
Paul,
Please boot the failing board with "intel_idle.max_cstate=0"
to disable intel_idle entirely,
Hi Len,
I've got an eval board with a 1.7GHz Avaton/C2000 that hangs at boot
shortly after the idle driver registration -- typically 1/2 dozen
dmesg lines later, around rtc init, or net stack init.
It may be that this early board/early bios makes it a non-issue for
mainline, but I figured I'd
Hi Len,
I've got an eval board with a 1.7GHz Avaton/C2000 that hangs at boot
shortly after the idle driver registration -- typically 1/2 dozen
dmesg lines later, around rtc init, or net stack init.
It may be that this early board/early bios makes it a non-issue for
mainline, but I figured I'd
I've got an eval board with a 1.7GHz Avaton/C2000 that hangs at boot
shortly after the idle driver registration -- typically 1/2 dozen
dmesg lines later, around rtc init, or net stack init.
Paul,
Please boot the failing board with intel_idle.max_cstate=0
to disable intel_idle entirely, and
[RE: Regression in intel_idle on Avaton/Rangely Mohon Peak board] On 01/04/2014
(Tue 17:59) Brown, Len wrote:
I've got an eval board with a 1.7GHz Avaton/C2000 that hangs at boot
shortly after the idle driver registration -- typically 1/2 dozen
dmesg lines later, around rtc init, or net
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