arm interrupt handling

Hi When I study the interrupt handling code in 2.6.39 for omap soc, found don't clear CPSR.I to enable irq till each ISR finished. Is this true? Or I miss something, since this will be wired that the core will not service any other irq before complete before irq handling. Best wishes Qipeng

arm interrupt handling

Hi When I study the interrupt handling code in 2.6.39 for omap soc, found don't clear CPSR.I to enable irq till each ISR finished. Is this true? Or I miss something, since this will be wired that the core will not service any other irq before complete before irq handling. Best wishes Qipeng