On Wed, Mar 23, 2016 at 12:50:53PM +0100, Alexander Stein wrote:
As I said previously please fix your mail client to word wrap within
paragraphs at something substantially less than 80 columns. Doing this
makes your messages much easier to read and reply to.
> > > In regmap_mmio_gen_context
On Wed, Mar 23, 2016 at 12:50:53PM +0100, Alexander Stein wrote:
As I said previously please fix your mail client to word wrap within
paragraphs at something substantially less than 80 columns. Doing this
makes your messages much easier to read and reply to.
> > > In regmap_mmio_gen_context
On Wednesday 23 March 2016 11:39:39, Mark Brown wrote:
> On Wed, Mar 23, 2016 at 12:16:13PM +0100, Alexander Stein wrote:
> > On Wednesday 23 March 2016 10:34:15, Mark Brown wrote:
>
> > > Are you *sure* that this is actually big endian? Are you basing this on
> > > documentation or on what
On Wednesday 23 March 2016 11:39:39, Mark Brown wrote:
> On Wed, Mar 23, 2016 at 12:16:13PM +0100, Alexander Stein wrote:
> > On Wednesday 23 March 2016 10:34:15, Mark Brown wrote:
>
> > > Are you *sure* that this is actually big endian? Are you basing this on
> > > documentation or on what
On Wed, Mar 23, 2016 at 12:16:13PM +0100, Alexander Stein wrote:
> On Wednesday 23 March 2016 10:34:15, Mark Brown wrote:
> > Are you *sure* that this is actually big endian? Are you basing this on
> > documentation or on what happened to work for you in the past.
> Please refer to QorIQ
On Wed, Mar 23, 2016 at 12:16:13PM +0100, Alexander Stein wrote:
> On Wednesday 23 March 2016 10:34:15, Mark Brown wrote:
> > Are you *sure* that this is actually big endian? Are you basing this on
> > documentation or on what happened to work for you in the past.
> Please refer to QorIQ
On Wednesday 23 March 2016 10:34:15, Mark Brown wrote:
> > I'm currently trying to get PCIe working on LS1021A (little-endian
> > ARM). For link-detection I need access to a syscon perpheral (SCFG)
> > which is attched to CPU as big-endian.
>
> Are you *sure* that this is actually big endian?
On Wednesday 23 March 2016 10:34:15, Mark Brown wrote:
> > I'm currently trying to get PCIe working on LS1021A (little-endian
> > ARM). For link-detection I need access to a syscon perpheral (SCFG)
> > which is attched to CPU as big-endian.
>
> Are you *sure* that this is actually big endian?
On Wed, Mar 23, 2016 at 09:48:42AM +0100, Alexander Stein wrote:
Please fix your mail client to word wrap within paragraphs at something
substantially less than 80 columns. Doing this makes your messages much
easier to read and reply to.
> I'm currently trying to get PCIe working on LS1021A
On Wed, Mar 23, 2016 at 09:48:42AM +0100, Alexander Stein wrote:
Please fix your mail client to word wrap within paragraphs at something
substantially less than 80 columns. Doing this makes your messages much
easier to read and reply to.
> I'm currently trying to get PCIe working on LS1021A
On Wednesday 23 March 2016 09:48:42, Alexander Stein wrote:
> I'm currently trying to get PCIe working on LS1021A (little-endian ARM). For
> link-detection I need access to a syscon perpheral (SCFG) which is attched to
> CPU as big-endian.
> The corresponding DT part is:
>
> scfg:
On Wednesday 23 March 2016 09:48:42, Alexander Stein wrote:
> I'm currently trying to get PCIe working on LS1021A (little-endian ARM). For
> link-detection I need access to a syscon perpheral (SCFG) which is attched to
> CPU as big-endian.
> The corresponding DT part is:
>
> scfg:
Hi,
I'm currently trying to get PCIe working on LS1021A (little-endian ARM). For
link-detection I need access to a syscon perpheral (SCFG) which is attched to
CPU as big-endian.
The corresponding DT part is:
scfg: scfg@157 {
compatible =
Hi,
I'm currently trying to get PCIe working on LS1021A (little-endian ARM). For
link-detection I need access to a syscon perpheral (SCFG) which is attched to
CPU as big-endian.
The corresponding DT part is:
scfg: scfg@157 {
compatible =
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