On Thu, Jul 21, 2016 at 04:02:23PM -0500, Bjorn Helgaas wrote:
> Hi Christoph,
>
> This thread looks like it might be a typo. It doesn't use any of the
> new PCI MSI stuff. Looks like the cover letter from the PCI MSI
> patches, but the actual patches are from a different series?
Ah, sorry.
On Thu, Jul 21, 2016 at 04:02:23PM -0500, Bjorn Helgaas wrote:
> Hi Christoph,
>
> This thread looks like it might be a typo. It doesn't use any of the
> new PCI MSI stuff. Looks like the cover letter from the PCI MSI
> patches, but the actual patches are from a different series?
Ah, sorry.
Hi Christoph,
This thread looks like it might be a typo. It doesn't use any of the
new PCI MSI stuff. Looks like the cover letter from the PCI MSI
patches, but the actual patches are from a different series?
On Thu, Jul 21, 2016 at 04:30:20PM +0200, Christoph Hellwig wrote:
> This series adds
Hi Christoph,
This thread looks like it might be a typo. It doesn't use any of the
new PCI MSI stuff. Looks like the cover letter from the PCI MSI
patches, but the actual patches are from a different series?
On Thu, Jul 21, 2016 at 04:30:20PM +0200, Christoph Hellwig wrote:
> This series adds
This series adds a new set of functions that transparently use the right
type of interrupt (MSI-X, MSI, legacy interrupt line) for a PCI device,
and if multiple vectors are supported automatically spreads the irq
routing to different CPUs. This will allow the block layer (and hopefully
other
This series adds a new set of functions that transparently use the right
type of interrupt (MSI-X, MSI, legacy interrupt line) for a PCI device,
and if multiple vectors are supported automatically spreads the irq
routing to different CPUs. This will allow the block layer (and hopefully
other
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