On Thu, 7 Jul 2005 [EMAIL PROTECTED] wrote:
>
> int main() {
> unsigned int index, frequency, voltage
>
> index = (((frequency)/100) << 8) | ((voltage - 700) / 16);
> printf ("%u\n", index);
> }
>
> frequency is expressed in MHz, voltage in mV, index is the value for
>
On Fri, 8 Jul 2005 07:10:50 +0200
Dominik Brodowski <[EMAIL PROTECTED]> wrote:
> On Thu, Jul 07, 2005 at 11:59:28PM +0200, [EMAIL PROTECTED] wrote:
> > read from ACPI tables, while still keeping them available.
>
> You're only keeping some of them available, as you overwrite one such
> setting.
On Fri, 8 Jul 2005 07:10:50 +0200
Dominik Brodowski [EMAIL PROTECTED] wrote:
On Thu, Jul 07, 2005 at 11:59:28PM +0200, [EMAIL PROTECTED] wrote:
read from ACPI tables, while still keeping them available.
You're only keeping some of them available, as you overwrite one such
setting.
On Thu, 7 Jul 2005 [EMAIL PROTECTED] wrote:
int main() {
unsigned int index, frequency, voltage
index = (((frequency)/100) 8) | ((voltage - 700) / 16);
printf (%u\n, index);
}
frequency is expressed in MHz, voltage in mV, index is the value for
centrino_model[cpu]-op_points[y].index
On Thu, Jul 07, 2005 at 11:59:28PM +0200, [EMAIL PROTECTED] wrote:
> read from ACPI tables, while still keeping them available.
You're only keeping some of them available, as you overwrite one such
setting. Alternatively you can increase p.state_count by one early enough.
> index =
On Thu, Jul 07, 2005 at 11:22:38PM +0200, [EMAIL PROTECTED] wrote:
> On Thu, 7 Jul 2005 23:10:33 +0200
> Dominik Brodowski <[EMAIL PROTECTED]> wrote:
>
> > Do you use ACPI-based idling? If so, in which state is the CPU in (cat
> > /proc/acpi/processor/*/power ? I suspect that you do not use ACPI
On Wed, 06 Jul 2005 15:58:53 -0400
Bill Davidsen <[EMAIL PROTECTED]> wrote:
> [EMAIL PROTECTED] wrote:
[snip]
> > Moreover, I checked on Pentium M 725 and Pentium M 715 that the lowest
> > frequency at which the CPU can be set safely is not the 600MHz given in
> > datasheets, but 400MHz
>From Dominik Brodowski on Thursday, 07 July, 2005:
>On Thu, Jul 07, 2005 at 03:51:17PM -0500, Joseph Pingenot wrote:
>> >Just a latest question: can be p4-clockmod used together with
>> >speedstep-centrino? If not, would it make any sense to patch
>> >speedstep-centrino to use this feature too?
On Thu, Jul 07, 2005 at 04:34:14PM -0500, Joseph Pingenot wrote:
> >From Dominik Brodowski on Thursday, 07 July, 2005:
> >On Thu, Jul 07, 2005 at 03:51:17PM -0500, Joseph Pingenot wrote:
> >> >Just a latest question: can be p4-clockmod used together with
> >> >speedstep-centrino? If not, would it
On Thu, 7 Jul 2005 23:10:33 +0200
Dominik Brodowski <[EMAIL PROTECTED]> wrote:
> Do you use ACPI-based idling? If so, in which state is the CPU in (cat
> /proc/acpi/processor/*/power ? I suspect that you do not use ACPI (else
> you wouldn't need the table-based approach) or that the ACPI-based
On Thu, Jul 07, 2005 at 10:22:25PM +0200, [EMAIL PROTECTED] wrote:
> > This hasn't been seen to save any power whatsoever that I've seen.
>
> It drops down power rating by 1500-1800mW on my Toshiba Satellite A50
> while idling at 400MHz.
Do you use ACPI-based idling? If so, in which state is the
On Thu, Jul 07, 2005 at 03:51:17PM -0500, Joseph Pingenot wrote:
> >Just a latest question: can be p4-clockmod used together with
> >speedstep-centrino? If not, would it make any sense to patch
> >speedstep-centrino to use this feature too?
>
> I'm a little confused. How is this different from
>Just a latest question: can be p4-clockmod used together with
>speedstep-centrino? If not, would it make any sense to patch
>speedstep-centrino to use this feature too?
I'm a little confused. How is this different from the ACPI CPU throttling
states (/proc/acpi/processor/CPUn/limit to set,
On Thu, Jul 07, 2005 at 10:22:25PM +0200, [EMAIL PROTECTED] wrote:
> > This hasn't been seen to save any power whatsoever that I've seen.
>
> It drops down power rating by 1500-1800mW on my Toshiba Satellite A50
> while idling at 400MHz.
>
> > I've heard a few reports that it reduces heat
Pedro Ramalhais found another interesting thing in:
ftp://download.intel.com/design/Pentium4/manuals/25366816.pdf
that's the IA32_CLOCK_MODULATION (still called
MSR_IA32_THERM_CONTROL in include/asm-i386/msr.h, and I think this would
need a fix) register, that let set a reduced CPU duty cycle. So
On Thu, 7 Jul 2005 16:06:48 -0400
Dave Jones <[EMAIL PROTECTED]> wrote:
> On Thu, Jul 07, 2005 at 10:00:27PM +0200, [EMAIL PROTECTED] wrote:
> > Enabling, say, a duty cycle of 12.5% means that the CPU chip will be
> driven
> > by clock just one time every eight, thus reducing power
On Thu, Jul 07, 2005 at 10:00:27PM +0200, [EMAIL PROTECTED] wrote:
> Enabling, say, a duty cycle of 12.5% means that the CPU chip will be driven
> by clock just one time every eight, thus reducing power consumption and
> temperature (and it speeds down dramatically the CPU, too =).
>
> I
On Thu, Jul 07, 2005 at 10:00:27PM +0200, [EMAIL PROTECTED] wrote:
Enabling, say, a duty cycle of 12.5% means that the CPU chip will be driven
by clock just one time every eight, thus reducing power consumption and
temperature (and it speeds down dramatically the CPU, too =).
I tested
On Thu, 7 Jul 2005 16:06:48 -0400
Dave Jones [EMAIL PROTECTED] wrote:
On Thu, Jul 07, 2005 at 10:00:27PM +0200, [EMAIL PROTECTED] wrote:
Enabling, say, a duty cycle of 12.5% means that the CPU chip will be
driven
by clock just one time every eight, thus reducing power consumption and
Pedro Ramalhais found another interesting thing in:
ftp://download.intel.com/design/Pentium4/manuals/25366816.pdf
that's the IA32_CLOCK_MODULATION (still called
MSR_IA32_THERM_CONTROL in include/asm-i386/msr.h, and I think this would
need a fix) register, that let set a reduced CPU duty cycle. So
On Thu, Jul 07, 2005 at 10:22:25PM +0200, [EMAIL PROTECTED] wrote:
This hasn't been seen to save any power whatsoever that I've seen.
It drops down power rating by 1500-1800mW on my Toshiba Satellite A50
while idling at 400MHz.
I've heard a few reports that it reduces heat for a
Just a latest question: can be p4-clockmod used together with
speedstep-centrino? If not, would it make any sense to patch
speedstep-centrino to use this feature too?
I'm a little confused. How is this different from the ACPI CPU throttling
states (/proc/acpi/processor/CPUn/limit to set,
On Thu, Jul 07, 2005 at 03:51:17PM -0500, Joseph Pingenot wrote:
Just a latest question: can be p4-clockmod used together with
speedstep-centrino? If not, would it make any sense to patch
speedstep-centrino to use this feature too?
I'm a little confused. How is this different from the ACPI
On Thu, Jul 07, 2005 at 10:22:25PM +0200, [EMAIL PROTECTED] wrote:
This hasn't been seen to save any power whatsoever that I've seen.
It drops down power rating by 1500-1800mW on my Toshiba Satellite A50
while idling at 400MHz.
Do you use ACPI-based idling? If so, in which state is the CPU
On Thu, 7 Jul 2005 23:10:33 +0200
Dominik Brodowski [EMAIL PROTECTED] wrote:
Do you use ACPI-based idling? If so, in which state is the CPU in (cat
/proc/acpi/processor/*/power ? I suspect that you do not use ACPI (else
you wouldn't need the table-based approach) or that the ACPI-based idling
On Thu, Jul 07, 2005 at 04:34:14PM -0500, Joseph Pingenot wrote:
From Dominik Brodowski on Thursday, 07 July, 2005:
On Thu, Jul 07, 2005 at 03:51:17PM -0500, Joseph Pingenot wrote:
Just a latest question: can be p4-clockmod used together with
speedstep-centrino? If not, would it make any
From Dominik Brodowski on Thursday, 07 July, 2005:
On Thu, Jul 07, 2005 at 03:51:17PM -0500, Joseph Pingenot wrote:
Just a latest question: can be p4-clockmod used together with
speedstep-centrino? If not, would it make any sense to patch
speedstep-centrino to use this feature too?
I'm a
On Wed, 06 Jul 2005 15:58:53 -0400
Bill Davidsen [EMAIL PROTECTED] wrote:
[EMAIL PROTECTED] wrote:
[snip]
Moreover, I checked on Pentium M 725 and Pentium M 715 that the lowest
frequency at which the CPU can be set safely is not the 600MHz given in
datasheets, but 400MHz instead, with
On Thu, Jul 07, 2005 at 11:22:38PM +0200, [EMAIL PROTECTED] wrote:
On Thu, 7 Jul 2005 23:10:33 +0200
Dominik Brodowski [EMAIL PROTECTED] wrote:
Do you use ACPI-based idling? If so, in which state is the CPU in (cat
/proc/acpi/processor/*/power ? I suspect that you do not use ACPI (else
On Thu, Jul 07, 2005 at 11:59:28PM +0200, [EMAIL PROTECTED] wrote:
read from ACPI tables, while still keeping them available.
You're only keeping some of them available, as you overwrite one such
setting. Alternatively you can increase p.state_count by one early enough.
index =
[EMAIL PROTECTED] wrote:
> Currently, the speedstep-centrino support has built-in frequency/voltage
> pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
> BIOS ACPI.
>
> But ACPI encoding may not be available or not reliable, so why shouldn't we
> provide built-in tables for
On Wed, 6 Jul 2005 17:11:59 -0400
Dave Jones <[EMAIL PROTECTED]> wrote:
> This can't be done safely through any other means than ACPI right now.
> It needs to know intimate things about which VID line is wired to what,
> which is board specific.
I don't think it's related to 'which VID line is
On Wed, Jul 06, 2005 at 03:58:53PM -0400, Bill Davidsen wrote:
> [EMAIL PROTECTED] wrote:
> >Currently, the speedstep-centrino support has built-in frequency/voltage
> >pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
> >BIOS ACPI.
> >
> >But ACPI encoding may not be
[EMAIL PROTECTED] wrote:
Currently, the speedstep-centrino support has built-in frequency/voltage
pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
BIOS ACPI.
But ACPI encoding may not be available or not reliable, so why shouldn't we
provide built-in tables for Dothan
Hi,
On Wed, Jul 06, 2005 at 11:22:02AM +0200, [EMAIL PROTECTED] wrote:
> Currently, the speedstep-centrino support has built-in frequency/voltage
> pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
> BIOS ACPI.
>
> But ACPI encoding may not be available or not reliable, so
Currently, the speedstep-centrino support has built-in frequency/voltage
pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
BIOS ACPI.
But ACPI encoding may not be available or not reliable, so why shouldn't we
provide built-in tables for Dothan CPUs, too? Intel has released
Currently, the speedstep-centrino support has built-in frequency/voltage
pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
BIOS ACPI.
But ACPI encoding may not be available or not reliable, so why shouldn't we
provide built-in tables for Dothan CPUs, too? Intel has released
Hi,
On Wed, Jul 06, 2005 at 11:22:02AM +0200, [EMAIL PROTECTED] wrote:
Currently, the speedstep-centrino support has built-in frequency/voltage
pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
BIOS ACPI.
But ACPI encoding may not be available or not reliable, so why
[EMAIL PROTECTED] wrote:
Currently, the speedstep-centrino support has built-in frequency/voltage
pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
BIOS ACPI.
But ACPI encoding may not be available or not reliable, so why shouldn't we
provide built-in tables for Dothan
On Wed, Jul 06, 2005 at 03:58:53PM -0400, Bill Davidsen wrote:
[EMAIL PROTECTED] wrote:
Currently, the speedstep-centrino support has built-in frequency/voltage
pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
BIOS ACPI.
But ACPI encoding may not be available or
On Wed, 6 Jul 2005 17:11:59 -0400
Dave Jones [EMAIL PROTECTED] wrote:
This can't be done safely through any other means than ACPI right now.
It needs to know intimate things about which VID line is wired to what,
which is board specific.
I don't think it's related to 'which VID line is wired
[EMAIL PROTECTED] wrote:
Currently, the speedstep-centrino support has built-in frequency/voltage
pairs only for Banias CPUs. For Dothan CPUs, these tables are read from
BIOS ACPI.
But ACPI encoding may not be available or not reliable, so why shouldn't we
provide built-in tables for Dothan
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