The previous patch ("input/ti_am335x_tsc: ACK the HW_PEN irq in ISR")
acked the interrupt so we don't freeze if we don't handle an enabled
interrupt source. The interrupt core has a mechanism for this and to get
it work one should only say that it handled an interrupt if it is
actually the case.
The interrupt source IRQENB_HW_PEN is enabled in suspend and suposed to
be used as a wake up source. Once this interrupt source is unmaksed, the
devices ends up in ISR and never continues.
This change ACKs the interrupt and disables it so the system does not
freeze.
Signed-off-by: Sebastian
On 11/06/13 11:48, Mark Brown wrote:
> On Mon, Jun 10, 2013 at 10:21:58AM +0100, Srinivas KANDAGATLA wrote:
>> It is common to access regmap registers at bit level, using
>> regmap_update_bits or regmap_read functions, however the end user has to
>> take care of a mask or shifting. This becomes
This adds basic support for clocks on Rockchip rk3066 SoCs.
The clock handling thru small dt nodes is heavily inspired by the
sunxi clk code.
The plls are currently read-only, as their setting needs more
investigation. This also results in slow cpu speeds, as the apll starts
at a default of
The mfd driver creates platform data for the child devices and it is the
ti_tscadc_dev struct. This struct is copied for the two devices.
The copy of the structure makes a common lock in this structure a little
less usefull. Therefore the platform data is not a pointer to the
structure and the
I believe the whole thing should go via the MFD tree. It touches also
input & iio subsystem. I collected ACKs where I got some in the meantime.
I added Lee Jones because I hear no sign of life from Samuel.
The following changes since commit d683b96b072dc4680fc74964eca77e6a23d1fa6e:
Linux
From: "Patil, Rachna"
Current code has hard coded value written to
step enable bits. Now the bits are updated based
on how many steps are needed to be configured got
from platform data.
The user needs to take care not to exceed
the count more than 16. While using ADC and TSC
one should take
From: "Patil, Rachna"
When touchscreen and ADC are used together, this
unwanted fifo flush leads to loss of ADC data.
Signed-off-by: Patil, Rachna
Signed-off-by: Felipe Balbi
Signed-off-by: Sebastian Andrzej Siewior
---
drivers/input/touchscreen/ti_am335x_tsc.c | 10 --
1 file
From: "Patil, Rachna"
The current driver expected touchscreen input
wires(XP,XN,YP,YN) to be connected in a particular order.
Making changes to accept this as platform data.
Signed-off-by: Patil, Rachna
Signed-off-by: Felipe Balbi
[bigeasy: larger rework of the patch, no config[4][4] array,
This adds a generic devicetree board file and a dtsi for boards
based on the RK3066a SoCs from Rockchip.
Apart from the generic parts (gic, clocks, pinctrl) the only components
currently supported are the timers, uarts and mmc ports (all DesignWare-
based).
Signed-off-by: Heiko Stuebner
---
This patch removes access to platform data mfd_tscadc_board because the
platform is DT only.
Acked-by: Jonathan Cameron
Signed-off-by: Sebastian Andrzej Siewior
---
drivers/iio/adc/ti_am335x_adc.c | 21 +++--
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git
From: "Patil, Rachna"
Add DT support for client ADC driver.
[ pa...@antoniou-consulting.com : use of_get_child_by_name
instead of of_find_node_by_name ]
Acked-by: Jonathan Cameron
Signed-off-by: Pantelis Antoniou
Signed-off-by: Patil, Rachna
Signed-off-by: Felipe Balbi
[bigeasy:
From: "Patil, Rachna"
Add DT support for client touchscreen driver
[ pa...@antoniou-consulting.com : use of_get_child_by_name
instead of of_find_node_by_name ]
Signed-off-by: Pantelis Antoniou
Signed-off-by: Patil, Rachna
Signed-off-by: Felipe Balbi
[ bigeasy: shift the code to the
Uarts on all recent Rockchip SoCs are Synopsis DesignWare 8250 types.
Only their addresses vary very much.
This patch adds the necessary definitions to use any of the uart ports
for early debug purposes.
Signed-off-by: Heiko Stuebner
---
arch/arm/Kconfig.debug| 34
This patch removes access to platform data mfd_tscadc_board because the
platform is DT only.
Acked-by: Dmitry Torokhov
Signed-off-by: Sebastian Andrzej Siewior
---
drivers/input/touchscreen/ti_am335x_tsc.c | 25 +
1 file changed, 1 insertion(+), 24 deletions(-)
diff
The MFD part uses regmap without caching and is the only user of the
regmap. The child drivers, that is input(touch) and iio(adc), use direct
reg access.
There is a patch which converts them to use regmap as well but I see no
benefit at all doing this. There is a direct MMIO bus access with no
Cortex-A9 SoCs from Rockchip use a slightly modified variant of dw_mmc
controllers that seems to require the SDMMC_CMD_USE_HOLD_REG bit to
always be set.
There also seem to be no other modifications (additional register etc)
present, so to keep the footprint low, add this small variant to the
2013/6/11, Changman Lee :
> On 화, 2013-06-11 at 07:57 +0900, Namjae Jeon wrote:
>> 2013/6/10, Changman Lee :
>> > Hello, Namjae
>> Hi. Changman.
>> >
>> > If using ACL, whenever i_mode is changed we should update acl_mode
>> > which
>> > is written to xattr block, too. And vice versa.
>> > Because
SoCs like the Rockchip Cortex-A9 ones contain divider some clocks
that use the regular mechanisms for storage but allow only even
dividers and 1 to be used.
Therefore add a flag that lets _is_valid_div limit the valid dividers
to these values. _get_maxdiv is also adapted to return even values
for
dw_mci_pltfm_remove gets exported and used by dw_mmc-exynos, so should
not be static.
Signed-off-by: Heiko Stuebner
Acked-by: Jaehoon Chung
Acked-by: Seungwon Jeon
---
drivers/mmc/host/dw_mmc-pltfm.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
In a subsquent patch probe will need to do some handling of data from
the dt match table. So to prevent the need for forward declarations,
move probe and remove below the match table.
Signed-off-by: Heiko Stuebner
---
drivers/mmc/host/dw_mmc-pltfm.c | 28 ++--
1 files
Third version of basic Rockchip A9 support.
The biggest change is probably the missing pinctrl driver which already found
its way into the pinctrl tree from Linus Walleij as part of the pinconfig
generalisation and should find its way into the mainline kernel from there.
But startup of
On 11/06/13 20:14, Thierry Reding wrote:
> On Mon, Jun 10, 2013 at 04:12:07PM -0700, H Hartley Sweeten wrote:
> [...]
>> +What: /sys/class/pwm/pwmchipN/pwmX/duty
>> +Date: May 2013
>> +KernelVersion: 3.11
>> +Contact:H Hartley Sweeten
>> +Description:
>> +
Signed-off-by: Jeff Layton
Acked-by: J. Bruce Fields
---
fs/locks.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/fs/locks.c b/fs/locks.c
index 7a02064..e3140b8 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -1337,7 +1337,7 @@ int fcntl_getlease(struct file *filp)
Testing has shown that iterating over the blocked_list for deadlock
detection turns out to be a bottleneck. In order to alleviate that,
begin the process of turning it into a hashtable. We start by turning
the fl_link into a hlist_node and the global lists into hlists. A later
patch will do the
...save 3 bytes of stack space.
Signed-off-by: Jeff Layton
Acked-by: J. Bruce Fields
---
fs/locks.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/fs/locks.c b/fs/locks.c
index 1e6301b..c186649 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -791,7 +791,8 @@
commit 66189be74 (CIFS: Fix VFS lock usage for oplocked files) exported
the locks_delete_block symbol. There's already an exported helper
function that provides this capability however, so make cifs use that
instead and turn locks_delete_block back into a static function.
Note that if fl->fl_next
Break up the blocked_list into a hashtable, using the fl_owner as a key.
This speeds up searching the hash chains, which is especially significant
for deadlock detection.
Note that the initial implementation assumes that hashing on fl_owner is
sufficient. In most cases it should be, with the
When we convert over to using the i_lock to protect the i_flock list,
that will introduce a potential lock inversion problem in locks_show.
When we want to walk the i_flock list, we'll need to take the i_lock.
Rather than do that, just walk the global blocked_locks list and print
out any that are
On Tue, 11 Jun 2013, Lee Jones wrote:
> On Mon, 10 Jun 2013, Ulf Hansson wrote:
>
> > On 6 June 2013 14:17, Lee Jones wrote:
> > > This patch enables clocks to be specified from Device Tree via phandles
> > > to the "prcmu-clock" node.
> > >
> > > Cc: Mike Turquette
> > > Cc: Ulf Hansson
> >
Summary of Significant Changes:
---
v2:
- Fix potential races in deadlock detection. Manipulation of global
blocked_hash and deadlock detection are now atomic. This is a
little slower than the earlier set, but is provably correct. Also,
the patch that converts to
Signed-off-by: Jeff Layton
---
fs/locks.c | 21 +
include/linux/fs.h | 18 ++
2 files changed, 31 insertions(+), 8 deletions(-)
diff --git a/fs/locks.c b/fs/locks.c
index e3140b8..1e6301b 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -518,9 +518,10
Currently, the hashing that the locking code uses to add these values
to the blocked_hash is simply calculated using fl_owner field. That's
valid in most cases except for server-side lockd, which validates the
owner of a lock based on fl_owner and fl_pid.
In the case where you have a small number
The file_lock_list is only used for /proc/locks. The vastly common case
is for locks to be put onto the list and come off again, without ever
being traversed.
Help optimize for this use-case by moving to percpu hlist_head-s. At the
same time, we can make the locking less contentious by moving to
On Mon, 10 Jun 2013, Ulf Hansson wrote:
> On 6 June 2013 14:17, Lee Jones wrote:
> > This patch enables clocks to be specified from Device Tree via phandles
> > to the "prcmu-clock" node.
> >
> > Cc: Mike Turquette
> > Cc: Ulf Hansson
> > Signed-off-by: Lee Jones
> > ---
> >
On 11 Jun 2013, Al Viro spake thusly:
> On Mon, Jun 10, 2013 at 06:42:49PM +0100, Nix wrote:
>> Yes, my shutdown scripts are panicking the kernel again! They're not
>> causing filesystem corruption this time, but it's still fs-related.
>>
>> Here's the 3.9.5 panic, seen on an x86-32 NFS client
Having a global lock that protects all of this code is a clear
scalability problem. Instead of doing that, move most of the code to be
protected by the i_lock instead.
The exceptions are the global lists that file_lock->fl_link sits on.
Those still need a global lock of some sort, so wrap just
Sound deadlock detection requires that we hold the file-lock state
steady while checking for them, and also ensure that updates to that
state are atomic with respect to those checks.
For the checking and insertion side, push the acquisition of the
global lock into __posix_lock_file and ensure
Hello.
On 11-06-2013 14:36, Sekhar Nori wrote:
From: KV Sujith
Add struct davinci_gpio_platform_data davinci gpio module.
Signed-off-by: KV Sujith
Signed-off-by: Philip Avinash
As Linus commented before, this should be merged with 03/11.
---
Move the fl_link list handling routines into a separate set of helpers.
Also move the global list handling out of locks_insert_block, and into
the caller that ends up triggering it as that allows us to eliminate the
IS_POSIX check there.
Signed-off-by: Jeff Layton
Acked-by: J. Bruce Fields
---
There's no reason we have to protect the blocked_hash and file_lock_list
with the same spinlock. With the tests I have, breaking it in two gives
a barely measurable performance benefit, but it seems reasonable to make
this locking as granular as possible.
Signed-off-by: Jeff Layton
---
When we convert the file_lock_list to a set of percpu lists, we'll need
a way to iterate over them in order to output /proc/locks info. Add
some seq_list_*_percpu helpers to handle that.
Signed-off-by: Jeff Layton
---
fs/seq_file.c| 54
This patch enables clocks to be specified from Device Tree via phandles
to the "prcc-kernel-clock" node.
Cc: Mike Turquette
Cc: Ulf Hansson
Signed-off-by: Lee Jones
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index ff02a26..c9ac350 100644
---
PRCC (peripheral and kernel) clocks are specified using a property tuple
< base bit>, where 'base' is the peripheral (1, 2, 3, 5 or 6),
and bit is read-in value into that peripheral stipulated by the hardware
specification.
Cc: Mike Turquette
Cc: Ulf Hansson
Signed-off-by: Lee Jones
diff
sd can't be NULL in init_sched_groups_power() and so checking it for NULL isn't
useful. In case it is required, then also we need to rearrange the code a bit as
we already accessed invalid pointer sd to get sg: sg = sd->groups.
Signed-off-by: Viresh Kumar
---
kernel/sched/core.c | 2 +-
1 file
In build_sched_groups() we don't need to call get_group() for cpus which are
already covered in previous iterations. So, call get_group() after checking if
cpu is covered or not.
Signed-off-by: Viresh Kumar
---
kernel/sched/core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
In the beginning of build_sched_groups() we called sched_domain_span() and
cached its return value in span. Few statements later we are calling it again to
get the same pointer.
Lets use the cached value instead as it hasn't changed in between.
Signed-off-by: Viresh Kumar
---
Hi Peter/Ingo,
This set contains few more minor fixes that I could find for code responsible
for creating sched domains. They are rebased of my earlier fixes:
Part 1:
https://lkml.org/lkml/2013/6/4/253
Part 2:
https://lkml.org/lkml/2013/6/10/141
They should be applied in this order to avoid
Hello,
On 6/11/2013 4:34 AM, Bjorn Helgaas wrote:
[+cc Marek]
On Mon, Jun 3, 2013 at 6:44 AM, Michal Simek wrote:
> Check that dma_ops are initialized correctly.
>
> Signed-off-by: Michal Simek
> ---
> Functions dma_mmap_attrs(), dma_get_sgtable_attrs()
> already have this checking.
>
> ---
On Tue, Jun 11, 2013 at 12:48 PM, Thierry Reding
wrote:
> On Tue, May 28, 2013 at 01:12:12PM -0600, Keith Packard wrote:
>> Thierry Reding writes:
>>
>>
>> > That doesn't sound right. Maybe drmIoctl() needs fixing instead. Looking
>> > at the history, drmIoctl() was introduced to automatically
Add new at91sam9 watchdog properties to the documentation.
Signed-off-by: Boris BREZILLON
---
.../devicetree/bindings/watchdog/atmel-wdt.txt | 30 ++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
Changing size of a file on server and local update (fuse_write_update_size)
should be always protected by inode->i_mutex. Otherwise a race like this is
possible:
1. Process 'A' calls fallocate(2) to extend file (~FALLOC_FL_KEEP_SIZE).
fuse_file_fallocate() sends FUSE_FALLOCATE request to the
The driver can be used on either arm or arm64 platforms, but
the latter doesn't have any platform-specific configuration
options, so it must be possible to manually enable the driver.
As the gpiolib is optional for arm64 arch, the gpio/led code
must be compiled conditionally.
Signed-off-by:
Set default watchdog options in every SoC compatible with the sam9 watchdog.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91sam9260.dtsi |5 +
arch/arm/boot/dts/at91sam9263.dtsi |5 +
arch/arm/boot/dts/at91sam9g45.dtsi |5 +
arch/arm/boot/dts/at91sam9n12.dtsi |
Add watchdog specific config for kizbox board.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/kizbox.dts |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts
index 02df191..928f6ee 100644
---
Hello,
This patch series is a porposal to enhance the sam9 watchdog timer support.
The at91sam9 watchdog timer cannot configured twice, and the current
implementation only tries to configure in a static way:
- 2 seconds timeout
- wdt restart every 500ms
If the timer has already been configured
The at91sam9 watchdog timer cannot configured twice, and the current
implementation only tries to configure in a static way:
- 2 seconds timeout
- wdt restart every 500ms
If the timer has already been configured with different values, it returns an
error and do not create any watchdog device.
On Tue, Jun 11, 2013 at 12:43 AM, Oliver Schinagl
wrote:
> On 06/06/13 21:16, Andy Shevchenko wrote:
>> On Sun, Jun 2, 2013 at 5:58 PM, Oliver Schinagl
>> wrote:
>>> From: Oliver Schinagl
>>> + if (likely((SID_SIZE))) {
>>
>> Extra braces.
>> Use antipattern here.
>
> While I
On Mon, Jun 10, 2013 at 10:21:58AM +0100, Srinivas KANDAGATLA wrote:
> It is common to access regmap registers at bit level, using
> regmap_update_bits or regmap_read functions, however the end user has to
> take care of a mask or shifting. This becomes overhead when such use
> cases are high.
On Tue, May 28, 2013 at 01:12:12PM -0600, Keith Packard wrote:
> Thierry Reding writes:
>
>
> > That doesn't sound right. Maybe drmIoctl() needs fixing instead. Looking
> > at the history, drmIoctl() was introduced to automatically loop if a
> > signal was received (commit
> > I have mentioned it in description as -> "Corrected logic in read/write
> config space to display right device number on bus 0"
> >
> > > Device 0:00.0 is usually the root complex, and device 0:01.0, 0:02.0
> > > etc are the root ports. The change proposed above makes 0:00.0 the
> > > first
Mark Brown wrote:
> I don't think you're using the usual definition of "register map" here.
> You seem to be switching between talking about this object model the
> device has and device registers - perhaps the objects are also registers
> sometimes?
Yes, in Atmel Object Protocol "instances" of
On 5/22/2013 12:40 PM, Philip Avinash wrote:
> From: KV Sujith
>
> Add struct davinci_gpio_platform_data davinci gpio module.
>
> Signed-off-by: KV Sujith
> Signed-off-by: Philip Avinash
As Linus commented before, this should be merged with 03/11.
> ---
>
On Tue, Jun 11, 2013 at 01:11:17PM +0300, Tuomas Tynkkynen wrote:
> Hi,
>
> Here's two simple bugfixes for the Tegra memory controllers.
>
> v2: Fix a dumb bug in the bit masking.
>
> Tuomas Tynkkynen (2):
> memory: tegra20-mc: Fix hang in IRQ handler.
> memory: tegra30-mc: Fix IRQ handler.
Hi Pavel,
On Tue, Jun 11, 2013, Johan Hedberg wrote:
> On Mon, Jun 10, 2013, Pavel Machek wrote:
> > < HCI Command: Delete Stored Link Key (0x03|0x0012) plen 7
> > bdaddr 00:00:00:00:00:00 all 1
> > > HCI Event: Command Complete (0x0e) plen 4
> > Delete Stored Link Key (0x03|0x0012) ncmd
On Tue, Jun 11, 2013 at 10:13:38AM +0530, Jay Agarwal wrote:
> > * PGP Signed by an unknown key
> >
> > On Tue, Jun 04, 2013 at 01:17:15PM -0600, Stephen Warren wrote:
> > > On 06/04/2013 12:57 PM, Jay Agarwal wrote:
> > [...]
> > > > struct tegra_pcie_port {
> > > > @@ -384,7 +408,7 @@ static
On Mon, Jun 10, 2013 at 04:12:07PM -0700, H Hartley Sweeten wrote:
[...]
> +What:/sys/class/pwm/pwmchipN/pwmX/duty
> +Date:May 2013
> +KernelVersion: 3.11
> +Contact: H Hartley Sweeten
> +Description:
> + Sets the PWM duty cycle in
On Tue, Jun 11, 2013 at 03:53:17PM +0800, Lai Jiangshan wrote:
> On 06/11/2013 08:51 AM, Linus Torvalds wrote:
> > On Mon, Jun 10, 2013 at 5:44 PM, Steven Rostedt wrote:
> >>
> >> OK, I haven't found a issue here yet, but youss are beiing trickssy! We
> >> don't like trickssy, and we must find
Hi,
Here's two simple bugfixes for the Tegra memory controllers.
v2: Fix a dumb bug in the bit masking.
Tuomas Tynkkynen (2):
memory: tegra20-mc: Fix hang in IRQ handler.
memory: tegra30-mc: Fix IRQ handler.
drivers/memory/tegra20-mc.c | 5 -
drivers/memory/tegra30-mc.c | 9 ++---
In Tegra20 any memory controller interrupt would cause an
infinite loop in the IRQ handler.
Signed-off-by: Tuomas Tynkkynen
---
drivers/memory/tegra20-mc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/memory/tegra20-mc.c b/drivers/memory/tegra20-mc.c
index
In Tegra30 any memory controller interrupt would cause an infinite loop in the
IRQ handler. Additionally, a garbage pointer was used to read the MC
status registers, which causes wrong values to be printed if a MC error
occurred.
Signed-off-by: Tuomas Tynkkynen
---
drivers/memory/tegra30-mc.c |
On 06/10/2013 11:36 PM, Thierry Reding wrote:
> On Mon, Jun 10, 2013 at 12:13:43PM +0300, Tuomas Tynkkynen wrote:
>> In Tegra20 memory controller any MC interrupt would cause an
>> infinite loop in the IRQ handler.
>>
>> Signed-off-by: Tuomas Tynkkynen
>> ---
>> drivers/memory/tegra20-mc.c | 5
On Mon, Jun 10, 2013 at 05:51:14PM -0700, Linus Torvalds wrote:
> On Mon, Jun 10, 2013 at 5:44 PM, Steven Rostedt wrote:
> >
> > OK, I haven't found a issue here yet, but youss are beiing trickssy! We
> > don't like trickssy, and we must find preiouss!!!
Heh! You should see what it looks
2013/6/11 Joshua C. :
> 2013/6/10 Yinghai Lu :
>> On Mon, Jun 10, 2013 at 3:55 AM, Sergey Meirovich
>> wrote:
>>
>>> patches 1,2(latest one) have not helped me on 3.9.5:
>>
>> So v1:
>> https://patchwork.kernel.org/patch/2694981/
>> https://patchwork.kernel.org/patch/2694971/
>>
>> and v2:
>>
> > Nice and simple implementation using standard Clk APIs.
> Hi Lee,
>
> I may be a bit tired, but I am having a bit hard to follow the steps
> taken in this patch set. :-)
>
> I should of course tell you why:
> 1. You start out by adding DT definitions in the DT files, should that
> not be
On Mon, Jun 10, 2013 at 08:44:40PM -0400, Steven Rostedt wrote:
> On Sun, 2013-06-09 at 12:36 -0700, Paul E. McKenney wrote:
>
> > +#else /* #ifndef CONFIG_TICKET_LOCK_QUEUED */
> > +
> > +bool tkt_spin_pass(arch_spinlock_t *ap, struct __raw_tickets inc);
> > +
> > +static __always_inline void
On Mon, Jun 10, 2013 at 09:04:09PM -0400, Steven Rostedt wrote:
> On Sun, 2013-06-09 at 12:36 -0700, Paul E. McKenney wrote:
> > Breaking up locks is better than implementing high-contention locks, but
> > if we must have high-contention locks, why not make them automatically
> > switch between
On Tue 11-06-13 10:35:01, Piotr Nowojski wrote:
> W dniu 07.06.2013 17:36, Michal Hocko pisze:
> >On Fri 07-06-13 17:13:55, Piotr Nowojski wrote:
> >>W dniu 06.06.2013 17:57, Michal Hocko pisze:
> >In our system we have hit some very annoying situation (bug?) with
> >cgroups. I'm writing
From: "Michael S. Tsirkin"
Date: Thu, 6 Jun 2013 15:20:39 +0300
> If device has an owner, we shouldn't touch ubuf_info
> since it might be in use.
>
> Signed-off-by: Michael S. Tsirkin
Applied.
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From: "Michael S. Tsirkin"
Date: Thu, 6 Jun 2013 15:20:46 +0300
> vhost_net_clear_ubuf_info didn't clear ubuf_info
> after kfree, this could trigger double free.
> Fix this and simplify this code to make it more robust: make sure
> ubuf info is always freed through vhost_net_clear_ubuf_info.
>
On Tue, 11 Jun 2013, Prashant Gaikwad wrote:
> Why not implement these APIs in DFLL clock driver itself and pass RST address
> register to driver?
The DFLL DVCO reset registers are CAR registers, not DFLL registers.
Functions that operate on registers in one IP block shouldn't be located
in
Kishon
> Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; Balbi, Felipe
> Subject: Re: [PATCH v2 2/7] usb: phy: dsps: adding usbphy driver for am33xx
> platform
>> +
>> +res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_wkup");
>> +phy->phy_wkup =
On Mon, Jun 10, 2013 at 11:17 AM, Lee Jones wrote:
> On Wed, 15 May 2013, Linus Walleij wrote:
>
>> On Wed, May 15, 2013 at 11:51 AM, Lee Jones wrote:
>>
>> > Now DMA DT bindings exist and are in use by he MMC and UART drivers, it
>> > should be possible to remove them from the auxdata
Hi Benjamin,
Are you still working on this problem ?
Thanks. :)
On 05/21/2013 10:27 AM, Benjamin LaHaise wrote:
On Tue, May 21, 2013 at 10:07:52AM +0800, Tang Chen wrote:
I'm not saying using two callbacks before and after migration is better.
I don't want to use
On Tue, Jun 11, 2013 at 07:49:12AM +0100, Matt Fleming wrote:
> OK, I chickened out of sending this in my latest pull request
> after reading Linus' -rc5 email about him not wanting to see any
> non-critical changes. I've stuck it in the 'next' branch with the rest
> of the stuff for v3.11.
Yep,
On Mon, Jun 10, 2013 at 11:15 AM, Lee Jones wrote:
> On Wed, 15 May 2013, Linus Walleij wrote:
>
>> On Wed, May 15, 2013 at 11:51 AM, Lee Jones wrote:
>>
>> > It was required to pass DMA channel configuration information to the
>> > MMC driver before the new DMA API was in place. Now that it is,
On 11/06/2013 10:32, Eric Dumazet wrote:
On Tue, 2013-06-11 at 09:49 +0300, Eliezer Tamir wrote:
I would like to hear opinions on what needs to be added to make this
feature complete.
The list I have so far is:
1. add a socket option
Yes, please. I do not believe all sockets on the machine
(2013/06/11 15:50), Gleb Natapov wrote:
On Mon, Jun 10, 2013 at 05:28:23PM -0300, Marcelo Tosatti wrote:
On Mon, Jun 10, 2013 at 07:38:34PM +0300, Gleb Natapov wrote:
Guest traces contain vcpu number and not pid (because guest is unaware
of host PID).
No, guest trace is just a regular ftrace
2013/6/10 Yinghai Lu :
> On Mon, Jun 10, 2013 at 3:55 AM, Sergey Meirovich
> wrote:
>
>> patches 1,2(latest one) have not helped me on 3.9.5:
>
> So v1:
> https://patchwork.kernel.org/patch/2694981/
> https://patchwork.kernel.org/patch/2694971/
>
> and v2:
>
On Mon, Jun 10, 2013 at 10:16:04PM +0900, Takuya Yoshikawa wrote:
> On Mon, 10 Jun 2013 10:57:50 +0300
> Gleb Natapov wrote:
>
> > On Fri, Jun 07, 2013 at 04:51:25PM +0800, Xiao Guangrong wrote:
>
> > > +
> > > +/*
> > > + * Return values of handle_mmio_page_fault_common:
> > > + *
Change log from v1:
o declare *static* to f2fs_dirty_inode (reported by kbuild-test-robot)
From 6b523242fa7b301653e83496fb065d5c0cbe7968 Mon Sep 17 00:00:00 2001
From: Jaegeuk Kim
Date: Mon, 10 Jun 2013 09:17:01 +0900
Subject: [PATCH] f2fs: avoid freqeunt write_inode calls
Cc:
On Mon, 10 Jun 2013, Ulf Hansson wrote:
> On 6 June 2013 14:17, Lee Jones wrote:
> > PRCC (peripheral and kernel) clocks are specified using a property tuple
> > < base bit>, where 'base' is the peripheral (1, 2, 3, 5 or 6),
> > and bit is read-in value into that peripheral stipulated by the
> > This patch enables clocks to be specified from Device Tree via phandles
> > to the "prcc-kernel-clock" node.
> >
> > Cc: Mike Turquette
> > Cc: Ulf Hansson
> > Signed-off-by: Lee Jones
>
> Could you please fold this patch into a "common PRCC device tree
> support" patch instead. Thus
When FUNCTION_GRAPH_TRACER is enabled, ftrace can profile kernel functions
and print basic statistics about them. Unfortunately, running stddev
calculation is wrong. This patch corrects it implementing Welford’s method:
s^2 = 1 / (n * (n-1)) * (n * \Sum (x_i)^2 - (\Sum x_i)^2) .
Refactor function_stat_show() code grouping avg and stddev calculations
inside a single function (function_stat_calc()). We are now able to call
it from different places.
Signed-off-by: Juri Lelli
Cc: Steven Rostedt
Cc: Frederic Weisbecker
Cc: Ingo Molnar
---
kernel/trace/ftrace.c | 46
Perform a simple test comparing static and running (implemented by
function_stat_calc()) average and stddev calculations.
Signed-off-by: Juri Lelli
Cc: Steven Rostedt
Cc: Frederic Weisbecker
Cc: Ingo Molnar
---
kernel/trace/trace_selftest.c | 72 +
1
While profiling kernel functions via ftrace I noticed values of s^2 that
seemed odd. I implemented a test to verify correctness of averages and
s^2 calculations and proved the latter to be wrong. Then I fixed them up.
The first patch refactors function_stat_show() code a bit in order to be
able
Hi Samuel,
if nobody has objections I think this set is ready to get merged. As
Nico mentioned in:
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-June/173541.html
since we would like to get it merged through the ARM SoC tree owing to
dependencies between this code and ARM power
The struct cpufreq_driver has been extended to embrace the information
related to boost support.
When "boost_mode" device tree attribute is defined for a platform, the
low_level_boost pointer is filled with proper address. The
.low_level_boost field filled to NULL, indicates that boost is not
The Intel's hardware based boost solution driver has been changed to cooperate
with
common cpufreq boost framework.
The global sysfs boost attribute entry code
(/sys/devices/system/cpu/cpufreq/boost)
has been moved to a core cpufreq code. This attribute is now only visible,
when cpufreq driver
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