[patch] rapidio: use after free in unregister function

2013-07-05 Thread Dan Carpenter
We need to use the _safe version of list_for_each_entry() because we
are freeing the iterator.

Signed-off-by: Dan Carpenter dan.carpen...@oracle.com

diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c
index f4f30af..84ac64a 100644
--- a/drivers/rapidio/rio.c
+++ b/drivers/rapidio/rio.c
@@ -1701,7 +1701,7 @@ EXPORT_SYMBOL_GPL(rio_register_scan);
 int rio_unregister_scan(int mport_id, struct rio_scan *scan_ops)
 {
struct rio_mport *port;
-   struct rio_scan_node *scan;
+   struct rio_scan_node *scan, *tmp;
 
pr_debug(RIO: %s for mport_id=%d\n, __func__, mport_id);
 
@@ -1715,7 +1715,7 @@ int rio_unregister_scan(int mport_id, struct rio_scan 
*scan_ops)
(mport_id == RIO_MPORT_ANY  port-nscan == scan_ops))
port-nscan = NULL;
 
-   list_for_each_entry(scan, rio_scans, node)
+   list_for_each_entry_safe(scan, tmp, rio_scans, node)
if (scan-mport_id == mport_id) {
list_del(scan-node);
kfree(scan);
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Re: [PATCH] sched: smart wake-affine

2013-07-05 Thread Michael Wang
On 07/05/2013 01:41 PM, Mike Galbraith wrote:
[snip]

 Have you tried to use more loops and groups? will that show even bigger
 regressions?
 
 Nope, less on either side.
 
 hackbench -g 100 -l 1000
avg
 3.10.0-regress21.89521.56421.77721.95822.09321.857
  1.000
 3.10.0-regressx   22.84423.26823.05623.23122.37522.954
  1.050
 
 hackbench -g 1 -l 10
avg
 3.10.0-regress29.91329.71130.39530.21330.23630.093
  1.000
 3.10.0-regressx   30.39231.00330.72831.00830.38930.704
  1.020

Hmm...I'm not expecting to reserve all of the 15%, but this still seems
a little bit more...

PeterZ has suggested some optimization which I sent out yesterday, I
suppose they haven't been included into this test yet, correct?

Since currently I could not reproduce the issue on my box with that
patch, I suppose it may solved that issue ;-)

Regards,
Michael Wang

 
 BTW, is this the results of 10 group and 40 sockets == 400 tasks?
 
 Yeah, stock.
 
 Off to do some body/mind tuning.  Bavarian mushrooms don't hide as well
 as memory access thingies.. and I can still out run 'em.
 
 -Mike 
 
 
 
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Re: [GIT PULL] core/mutexes changes for v3.11: W/W mutex support

2013-07-05 Thread Ingo Molnar

* Maarten Lankhorst maarten.lankho...@canonical.com wrote:

 Hey,
 
 Op 03-07-13 02:54, Linus Torvalds schreef:
  On Mon, Jul 1, 2013 at 1:22 AM, Ingo Molnar mi...@kernel.org wrote:
  Please pull the latest core-mutexes-for-linus git tree from:
 
 git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 
  core-mutexes-for-linus
 
 HEAD: 166989e366ffa66108b2f37b870e66b85b2185ad locking-selftests: 
  Handle unexpected failures more strictly
 
  This tree adds support for wound/wait style locks, which the graphics guys
  would like to make use of in the TTM graphics subsystem.
  So I pulled this, but I'm not particularly happy with how this (very
  unusual) lock pollutes linux/mutex.h that pretty much every single
  file ends up including.
 
  So I'd really prefer to see the ww_mutex() support split up into
  linux/ww_mutex.h, rather than making the compiler have to parse and
  remember that stuff when 99.99% of all files do not care about it or
  need it.
 
 Sounds good to me, but can it wait until with the drm pull is done?

The ordering should not matter much as the combination will be tested in 
linux-next anyway.

 Preliminary diff below.

Looks good to me at first sight. Please send a tested, changelogged, 
signed off version.

Thanks,

Ingo
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Re: [PATCH 3/5] drivers/misc: rf/ad9361: AD9361 device driver for Radio phy

2013-07-05 Thread pankaj chauhan
On 7/4/2013 1:06 AM, Mark Brown wrote:
 On Thu, Jun 20, 2013 at 04:05:20PM +0530, pankaj chauhan wrote:
 
 Yes modifying registers from user space is part of the patch set and
 register read/write interface is aimed only for two purposes:

 1. Debugging : taking register dumps etc.
 
 Use regmap, it should have the infrastructure you need here.
 
Thanks! I looked into regmap, and it is exactly what we want. We'll
remove reg read/write from our patch and use regmap.
 2. Initializing AD9361 using Low level script generated by ADI GUI tool.
 
 This sounds like generating a firmmware blob that the driver can load.
 You may have to cook the GUI output to be more amenable to loading in
 the kernel (or persuade the GUI guys to generate something useful here).
 
Yes it is kind of generating firmware blob from GUI tool. They reason
why we choose to initialize AD9361 using script generated by GUI tool
was lack of our insight in AD9361, and script is the quickest way to
bring-up AD9361. This GUI is developed by analog devices, so we don't
have much control on it. Lars and Robin are developing full fledged
driver for Ad9661, We intend to use that driver only, that's why in next
version of patch we'll remove AD9361 driver from our patchset, and
integrate with Lars' driver once it is available.


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Re: [GIT PULL] perf changes for v3.11

2013-07-05 Thread Ingo Molnar

* Peter Zijlstra pet...@infradead.org wrote:

 On Tue, Jul 02, 2013 at 05:50:29PM -0700, Linus Torvalds wrote:
  On Mon, Jul 1, 2013 at 2:03 AM, Ingo Molnar mi...@kernel.org wrote:
  
  git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 
   perf-core-for-linus
  
   Kernel improvements:
  
* AMD IOMMU uncore PMU support by Suravee Suthikulpanit001a
  
  This one prints a really annoying error message if you're not on an
  AMD platform:
  
  +   if (!amd_iommu_pc_supported()) {
  +   pr_err(perf: amd_iommu PMU not installed. No support!\n);
  +   return -ENODEV;
  +   }
  
  and you know what? That's not acceptable. It damn well is *not* an
  error to not have an AMD IOMMU.
  
  It should - at most - be a pr_info(). Maybe nothing at all. pr_err()
  is just totally out of line.
 
 Quite; it prints enough stuff when it does find one so I'm all for 
 scrapping that one print when it doesn't find it.
 
 Sorry for not seeing that; when I initially read that code I thought it 
 was for the case where the hardware was expected to have the device but 
 we couldn't find it for some weird reason.
 
 ---
 Subject: perf, amd: Do not print an error when the device is not present
 
 As Linus said its not an error to not have an AMD IOMMU; esp. when you're not
 even running on an AMD platform.
 
 Requested-by: Linus Torvalds torva...@linux-foundation.org

Applied to perf/urgent, thanks!

( The pedantic in me changed that tag to Reported-by as we treat console 
  spam as bugs. )

Thanks,

Ingo
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[PATCH V2 2/2] DMA: Freescale: update driver to support 8-channel DMA engine

2013-07-05 Thread hongbo.zhang
From: Hongbo Zhang hongbo.zh...@freescale.com

This patch adds support to 8-channel DMA engine, thus the driver works for both
the new 8-channel and the legacy 4-channel DMA engines.

Signed-off-by: Hongbo Zhang hongbo.zh...@freescale.com
---
 drivers/dma/fsldma.c |5 -
 drivers/dma/fsldma.h |2 +-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 4fc2980..7732de2 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev,
WARN_ON(fdev-feature != chan-feature);
 
chan-dev = fdev-dev;
-   chan-id = ((res.start - 0x100)  0xfff)  7;
+   chan-id = (res.start  0xfff)  0x300 ?
+  ((res.start - 0x100)  0xfff)  7 :
+  ((res.start - 0x200)  0xfff)  7;
if (chan-id = FSL_DMA_MAX_CHANS_PER_DEVICE) {
dev_err(fdev-dev, too many channels for device\n);
err = -EINVAL;
@@ -1435,6 +1437,7 @@ static int fsldma_of_remove(struct platform_device *op)
 }
 
 static const struct of_device_id fsldma_of_ids[] = {
+   { .compatible = fsl,elo3-dma, },
{ .compatible = fsl,eloplus-dma, },
{ .compatible = fsl,elo-dma, },
{}
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index f5c3879..1ffc244 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -112,7 +112,7 @@ struct fsldma_chan_regs {
 };
 
 struct fsldma_chan;
-#define FSL_DMA_MAX_CHANS_PER_DEVICE 4
+#define FSL_DMA_MAX_CHANS_PER_DEVICE 8
 
 struct fsldma_device {
void __iomem *regs; /* DGSR register base */
-- 
1.7.9.5



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Re: [URGENT rfc patch 0/3] tsc clocksource bug fix

2013-07-05 Thread Alex Shi
On 07/05/2013 01:58 PM, Thomas Gleixner wrote:
  
  Ingo had merged your branch into sched/core. :)
  
  commit f9bed7021710a3e45c331f7d7781de914cc1b939
  Merge: 7e76057 67dd331
  Author: Ingo Molnar mi...@kernel.org
  Date:   Wed May 29 11:21:59 2013 +0200
  
  Merge branch 'timers/urgent'
 Not really.
 
 tip$ git branch --contains f9bed70217
 * master
 
 tip$ git branch --contains 5d33b883ae
 * master
   timers/core
 
 So you are testing tip/master not tip/sched/core.

You'r right. I mixed them. sorry.

-- 
Thanks
Alex
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[PATCH V2 0/2] DMA: Freescale: Add support for 8-channel DMA engine

2013-07-05 Thread hongbo.zhang
From: Hongbo Zhang hongbo.zh...@freescale.com

Hi Vinod, Dan, Leo and Scott, please have a look at these V2 patches.

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch set
adds support this DMA engine.

V1-v2 changes:
- removed the codes handling the register dgsr1, since it isn't used corrently
- renamed the DMA DT compatible to fsl,elo3-dma
- renamed the new dts files to elo3-dma-n.dtsi


Hongbo Zhang (2):
  DMA: Freescale: Add new 8-channel DMA engine device tree nodes
  DMA: Freescale: update driver to support 8-channel DMA engine

 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi   |   90 +++
 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi   |   90 +++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi |4 +-
 drivers/dma/fsldma.c|5 +-
 drivers/dma/fsldma.h|2 +-
 5 files changed, 187 insertions(+), 4 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi

-- 
1.7.9.5



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[PATCH V2 1/2] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

2013-07-05 Thread hongbo.zhang
From: Hongbo Zhang hongbo.zh...@freescale.com

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
the device tree nodes for them.

Signed-off-by: Hongbo Zhang hongbo.zh...@freescale.com
---
 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi   |   90 +++
 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi   |   90 +++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi |4 +-
 3 files changed, 182 insertions(+), 2 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi

diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi 
b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
new file mode 100644
index 000..50cd911
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
@@ -0,0 +1,90 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x10 ]
+ *
+ * Copyright 2011-2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *   names of its contributors may be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma0: dma@100300 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = fsl,elo3-dma;
+   reg = 0x100300 0x4 0x100600 0x4;
+   ranges = 0x0 0x100100 0x500;
+   cell-index = 0;
+   dma-channel@0 {
+   compatible = fsl,eloplus-dma-channel;
+   reg = 0x0 0x80;
+   cell-index = 0;
+   interrupts = 28 2 0 0;
+   };
+   dma-channel@80 {
+   compatible = fsl,eloplus-dma-channel;
+   reg = 0x80 0x80;
+   cell-index = 1;
+   interrupts = 29 2 0 0;
+   };
+   dma-channel@100 {
+   compatible = fsl,eloplus-dma-channel;
+   reg = 0x100 0x80;
+   cell-index = 2;
+   interrupts = 30 2 0 0;
+   };
+   dma-channel@180 {
+   compatible = fsl,eloplus-dma-channel;
+   reg = 0x180 0x80;
+   cell-index = 3;
+   interrupts = 31 2 0 0;
+   };
+   dma-channel@300 {
+   compatible = fsl,eloplus-dma-channel;
+   reg = 0x300 0x80;
+   cell-index = 4;
+   interrupts = 76 2 0 0;
+   };
+   dma-channel@380 {
+   compatible = fsl,eloplus-dma-channel;
+   reg = 0x380 0x80;
+   cell-index = 5;
+   interrupts = 77 2 0 0;
+   };
+   dma-channel@400 {
+   compatible = fsl,eloplus-dma-channel;
+   reg = 0x400 0x80;
+   cell-index = 6;
+   interrupts = 78 2 0 0;
+   };
+   dma-channel@480 {
+   compatible = fsl,eloplus-dma-channel;
+   reg = 0x480 0x80;
+   cell-index = 7;
+   interrupts = 79 2 0 0;
+   };
+};
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi 
b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
new file mode 100644
index 000..c1aec68
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
@@ -0,0 +1,90 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x101000 ]
+ *
+ * Copyright 2011-2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following 

Re: [PATCH] clocksource/cadence_ttc: Reuse clocksource as sched_clock

2013-07-05 Thread Thomas Gleixner
On Wed, 3 Jul 2013, Soren Brinkmann wrote:

 Reuse the TTC clocksource timer as sched clock, too. Since only a single
 sched clock is supported in Linux, this feature optional and can be
 selected through Kconfig.

This changelog doesn't make sense.

There can be only one active sched_clock, but that does no mean, that
you cannot have different implementations compiled in.

So if you disable this config which sched_clock is your kernel using?
And if you enable it, how is guaranteed that you end up with the ttc
sched_clock as the active one? Just due to initcall ordering?

Thanks,

tglx
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[GIT PULL] irqdomain refactoring for v3.11

2013-07-05 Thread Grant Likely
Hi Linus,

Please pull the following irqdomain tree.

The following changes since commit 317ddd256b9c24b0d78fa8018f80f1e495481a10:

  Linux 3.10-rc5 (2013-06-08 17:41:04 -0700)

are available in the git repository at:

  git://git.secretlab.ca/git/linux tags/irqdomain-for-linus

for you to fetch changes up to 798f0fd188be3656991c8745104b5ee045769a5f:

  irq: fix checkpatch error (2013-06-24 14:02:43 +0100)


(from the branch description for irqdomain/next local branch)

clone of devicetree/test
irqdomain refactoring for v3.11

This is the long awaited simplification of irqdomain. It gets rid of the
different types of irq domains and instead both linear and tree mappings
can be supported in a single domain. Doing this removes a lot of special
case code and makes irq domains simpler to understand overall.


Grant Likely (12):
  Merge remote-tracking branch 'tip/irq/for-arm' into irqdomain/next
  irqdomain: Relax failure path on setting up mappings
  irqdomain: Replace LEGACY mapping with LINEAR
  irqdomain: Add a name field
  irqdomain: merge linear and tree reverse mappings.
  irqdomain: Eliminate revmap type
  irqdomain: Clean up aftermath of irq_domain refactoring
  irqdomain: Beef up debugfs output
  irqdomain: Refactor irq_domain_associate_many()
  irqdomain: remove irq_domain_generate_simple()
  irqdomain: make irq_linear_revmap() a fast path again
  irqdomain: Include hwirq number in /proc/interrupts

Kefeng Wang (1):
  irq: fix checkpatch error

 arch/powerpc/platforms/cell/beat_interrupt.c |   2 +-
 arch/powerpc/platforms/powermac/smp.c|   2 +-
 arch/x86/kernel/devicetree.c |   4 +-
 include/linux/irq.h  |  47 ++-
 include/linux/irqdomain.h| 140 ---
 kernel/irq/generic-chip.c| 299 --
 kernel/irq/irqdomain.c   | 585 +--
 kernel/irq/proc.c|   2 +
 8 files changed, 569 insertions(+), 512 deletions(-)
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Re: [PATCH v5 5/7] thermal:boost: Automatic enable/disable of BOOST feature

2013-07-05 Thread Lukasz Majewski
On Fri, 05 Jul 2013 05:31:42 +, R, Durgadoss wrote:
Hi Durga,

 Hi Lukasz,
 
  -Original Message-
  From: Lukasz Majewski [mailto:l.majew...@majess.pl]
  Sent: Friday, July 05, 2013 2:28 AM
  To: R, Durgadoss
  Cc: Lukasz Majewski; Viresh Kumar; Rafael J. Wysocki; Zhang, Rui;
  Eduardo Valentin; cpuf...@vger.kernel.org; Linux PM list; Jonghwa
  Lee; linux-kernel; Andre Przywara; Daniel Lezcano; Kukjin Kim;
  Myungjoo Ham Subject: Re: [PATCH v5 5/7] thermal:boost: Automatic
  enable/disable of BOOST feature
  
  On Thu, 4 Jul 2013 17:19:04 +
  R, Durgadoss durgados...@intel.com wrote:
  Hi,
  
 
 [Cut.]
 
@@ -326,6 +327,15 @@ static void monitor_thermal_zone(struct
thermal_zone_device *tz)
 static void handle_non_critical_trips(struct
thermal_zone_device *tz, int trip, enum thermal_trip_type
trip_type) {
+   if (cpufreq_boost_supported()) {
+   tz-overheated = true;
+   cpufreq_boost_trigger_state(0);
+   if (!tz-polling_delay) {
+   tz-boost_polling = true;
+   tz-polling_delay = 1000;
+   }
+   }
+
if (tz-governor)
tz-governor-throttle(tz, trip);
 }
@@ -453,6 +463,27 @@ static void
thermal_zone_device_check(struct work_struct *work)
struct thermal_zone_device *tz = container_of(work,
struct thermal_zone_device,
  poll_queue.work);
+   long trip_temp;
+
+   if (cpufreq_boost_supported()  tz-overheated) {
  
   Not all thermal drivers support trip points. So, we first need a
   if (tz-ops-get_trip_temp) check here.
  
  Ok, thanks for tip. Bluntly speaking, I thought, that all SoCs
  supported by thermal set trip points.
 
 We would wish to get there. But not the reality today ;)

Ok, I see :-).

 
  
  
+   tz-ops-get_trip_temp(tz, 0, trip_temp);
+   /*
+* Enable boost again only when current
temperature is less
+* than 75% of trip_temp[0]
+*/
+   if ((tz-temperature + (trip_temp  2)) 
trip_temp) {
  
   Another way would be to use the get_trend APIs for this thermal
   zone. If the trend is cooling we can re-enable boost otherwise
   not.
  
  Trend evaluation seems like a good complementary idea.
  
  However, I would also like to have the relative temperature drop
  measurement (if possible) like above (to 75% of the first trip
  point).
  
  Then I would be more confident, that everything cooled down and
  that I can start boost again.
  
  
+   tz-overheated = false;
+   if (tz-boost_polling) {
+   tz-boost_polling = false;
+   tz-polling_delay = 0;
+   monitor_thermal_zone(tz);
+   }
  
   Overall, I believe this will work well only if the thermal zone is
   CPU.
  
  My assumption:
  
  When I enable boost at CPU, then I also shall cool down the CPU. And
  the CPU zone seemed a natural choice.
  
  However I might be missing something, so hints are welcome.
  
  
   Another suggestion is: We tried hard to remove all throttling
   logic from thermal_core.c.
  
  By throttling logic you mean:
  if ((tz-temperature + (trip_temp  2)) and other conditions (like
  trend measurement)?
 
 Yes. That is correct.

Ok.

 
  
   May be we should include this kind of logic in
   step_wise.c ?
  
  It sounds interesting (since -throttle at thermal_core.c is called
  always when needed), but I'm afraid of a code duplication when one
  use Boost with fair_share or other thermal governor.
 
 right. So, for the time being, (as part of this patch series)
 I am Okay to have this code in thermal_core.c. From the thermal
 subsystem perspective, we will (need to) work out a better/
 cleaner/easier approach for this later.

Thanks for understanding. I'm going to embed the trend checking in the
next version of this patch (to be more confident that I can reenable
boost).

 
 Thanks,
 Durga
 


-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [PATCH 3/3] clocksource: fix can not set tsc as clocksource bug

2013-07-05 Thread Alex Shi
On 07/05/2013 01:41 PM, Thomas Gleixner wrote:
Unlikely, but if we have 3 watched clocksources which have the HRES
bit set, you'd call 3 times clocksource_select().
   Also the reselect must be called outside the watchdog_lock region.
  
  Sorry for stupid, the watchdog_lock used protect watchdog related
  resource. but clocksource_select doesn't touch them. So, I know it isn't
  necessary to put reselect under this lock. Just don't know why the
  reselect *must* be called outside of it?
   clocksource_select()
 timekeeping_notify()
   stop_machine()
 get_online_cpus()
 might_sleep()
 mutex_lock()
 
 So we need to be in preemptible context when we call clocksource_select().

understand! many thanks!

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[tip:x86/urgent] x86/tracing: Add irq_enter/exit() in smp_trace_reschedule_interrupt()

2013-07-05 Thread tip-bot for Seiji Aguchi
Commit-ID:  4787c368a9bca39e173d702389ee2eaf0520abc1
Gitweb: http://git.kernel.org/tip/4787c368a9bca39e173d702389ee2eaf0520abc1
Author: Seiji Aguchi seiji.agu...@hds.com
AuthorDate: Fri, 28 Jun 2013 14:02:11 -0400
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Tue, 2 Jul 2013 09:52:31 +0200

x86/tracing: Add irq_enter/exit() in smp_trace_reschedule_interrupt()

Reschedule vector tracepoints may be called in cpu idle state.
This causes lockdep check warning below.

The tracepoint requires rcu but for accuracy it also
requires irq_enter() (tracepoints record the irq context), thus,
the tracepoint interrupt handler should be calling irq_enter()
and not rcu_irq_enter() (irq_enter() calls rcu_irq_enter()).

So, add irq_enter/exit() to smp_trace_reschedule_interrupt()
with common pre/post processing functions, smp_entering_irq()
and exiting_irq() (exiting_irq() calls just irq_exit()
 in arch/x86/include/asm/apic.h),
because these can be shared among reschedule, call_function,
and call_function_single vectors.

[   50.720557] Testing event reschedule_exit:
[   50.721349]
[   50.721502] ===
[   50.721835] [ INFO: suspicious RCU usage. ]
[   50.722169] 3.10.0-rc6-4-gcf910e8 #190 Not tainted
[   50.722582] ---
[   50.722915] 
/c/kernel-tests/src/linux/arch/x86/include/asm/trace/irq_vectors.h:50 
suspicious rcu_dereference_check() usage!
[   50.723770]
[   50.723770] other info that might help us debug this:
[   50.723770]
[   50.724385]
[   50.724385] RCU used illegally from idle CPU!
[   50.724385] rcu_scheduler_active = 1, debug_locks = 0
[   50.725232] RCU used illegally from extended quiescent state!
[   50.725690] no locks held by swapper/0/0.
[   50.726010]
[   50.726010] stack backtrace:
[...]

Signed-off-by: Seiji Aguchi seiji.agu...@hds.com
Reviewed-by: Steven Rostedt rost...@goodmis.org
Link: http://lkml.kernel.org/r/51cdcfa3.9080...@hds.com
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 arch/x86/kernel/smp.c | 29 ++---
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index f4fe0b8..cdaa347 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -265,23 +265,30 @@ void smp_reschedule_interrupt(struct pt_regs *regs)
 */
 }
 
-void smp_trace_reschedule_interrupt(struct pt_regs *regs)
+static inline void smp_entering_irq(void)
 {
ack_APIC_irq();
+   irq_enter();
+}
+
+void smp_trace_reschedule_interrupt(struct pt_regs *regs)
+{
+   /*
+* Need to call irq_enter() before calling the trace point.
+* __smp_reschedule_interrupt() calls irq_enter/exit() too (in
+* scheduler_ipi(). This is OK, since those functions are allowed
+* to nest.
+*/
+   smp_entering_irq();
trace_reschedule_entry(RESCHEDULE_VECTOR);
__smp_reschedule_interrupt();
trace_reschedule_exit(RESCHEDULE_VECTOR);
+   exiting_irq();
/*
 * KVM uses this interrupt to force a cpu out of guest mode
 */
 }
 
-static inline void call_function_entering_irq(void)
-{
-   ack_APIC_irq();
-   irq_enter();
-}
-
 static inline void __smp_call_function_interrupt(void)
 {
generic_smp_call_function_interrupt();
@@ -290,14 +297,14 @@ static inline void __smp_call_function_interrupt(void)
 
 void smp_call_function_interrupt(struct pt_regs *regs)
 {
-   call_function_entering_irq();
+   smp_entering_irq();
__smp_call_function_interrupt();
exiting_irq();
 }
 
 void smp_trace_call_function_interrupt(struct pt_regs *regs)
 {
-   call_function_entering_irq();
+   smp_entering_irq();
trace_call_function_entry(CALL_FUNCTION_VECTOR);
__smp_call_function_interrupt();
trace_call_function_exit(CALL_FUNCTION_VECTOR);
@@ -312,14 +319,14 @@ static inline void 
__smp_call_function_single_interrupt(void)
 
 void smp_call_function_single_interrupt(struct pt_regs *regs)
 {
-   call_function_entering_irq();
+   smp_entering_irq();
__smp_call_function_single_interrupt();
exiting_irq();
 }
 
 void smp_trace_call_function_single_interrupt(struct pt_regs *regs)
 {
-   call_function_entering_irq();
+   smp_entering_irq();
trace_call_function_single_entry(CALL_FUNCTION_SINGLE_VECTOR);
__smp_call_function_single_interrupt();
trace_call_function_single_exit(CALL_FUNCTION_SINGLE_VECTOR);
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Re: scheduling while atomic hang.

2013-07-05 Thread Ingo Molnar

* H. Peter Anvin h...@zytor.com wrote:

 On 07/03/2013 07:49 PM, Linus Torvalds wrote:
  [816f42bf] __schedule+0x94f/0x9c0
  [816f487e] schedule_user+0x2e/0x70
  [816f6de4] retint_careful+0x12/0x2e
 
 This call trace does indeed indicate that we took a hardware
 interrupt which caused a reschedule.  It doesn't necessarily have to
 be a quantum expiration interrupt, it could just as easily be an I/O
 completion interrupt.

Too bad the kernel stack frame at this point is so small [we are just 
before return to userspace], so we don't really get our usual trace of 
recent activities via the '?' entries ...

It would be nice to have a full-kernel-stack backtrace printout as an 
option, which prints entries 'above' the current RSP.

I've Cc:-ed Frederic, maybe he has interest in implementing that?

Thanks,

Ingo
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[tip:perf/urgent] perf/x86/amd: Do not print an error when the device is not present

2013-07-05 Thread tip-bot for Peter Zijlstra
Commit-ID:  100ac5331519866afa9b000b10642b00cb6d03dd
Gitweb: http://git.kernel.org/tip/100ac5331519866afa9b000b10642b00cb6d03dd
Author: Peter Zijlstra pet...@infradead.org
AuthorDate: Wed, 3 Jul 2013 09:55:42 +0200
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Fri, 5 Jul 2013 08:27:15 +0200

perf/x86/amd: Do not print an error when the device is not present

As Linus said its not an error to not have an AMD IOMMU; esp.
when you're not even running on an AMD platform.

Reported-by: Linus Torvalds torva...@linux-foundation.org
Signed-off-by: Peter Zijlstra pet...@infradead.org
Acked-by: Suravee Suthikulpanit suravee.suthikulpa...@amd.com
Cc: Arnaldo Carvalho de Melo a...@infradead.org
Link: 
http://lkml.kernel.org/r/20130703075542.gf23...@twins.programming.kicks-ass.net
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 arch/x86/kernel/cpu/perf_event_amd_iommu.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_amd_iommu.c 
b/arch/x86/kernel/cpu/perf_event_amd_iommu.c
index 0db655e..639d128 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_iommu.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_iommu.c
@@ -491,10 +491,8 @@ static struct perf_amd_iommu __perf_iommu = {
 static __init int amd_iommu_pc_init(void)
 {
/* Make sure the IOMMU PC resource is available */
-   if (!amd_iommu_pc_supported()) {
-   pr_err(perf: amd_iommu PMU not installed. No support!\n);
+   if (!amd_iommu_pc_supported())
return -ENODEV;
-   }
 
_init_perf_amd_iommu(__perf_iommu, amd_iommu);
 
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Re: [PATCH] perf: fix interrupt handler timing harness

2013-07-05 Thread Ingo Molnar

* Stephane Eranian eran...@google.com wrote:

 This patch fixes a serious bug in:
 
 commit 14c63f17b1fde5a575a28e96547a22b451c71fb5
 Author: Dave Hansen dave.han...@linux.intel.com
 Date:   Fri Jun 21 08:51:36 2013 -0700
 
 perf: Drop sample rate when sampling is too slow
 
 
 There was an misunderstanding on the API of the do_div()
 macro. It returns the remainder of the division and this
 was not what the function expected leading to disabling the
 interrupt latency watchdog.
 
 This patch also remove a duplicate assignment in
 perf_sample_event_took().
 
 Signed-off-by: Stephane Eranian eran...@google.com

Thanks Stephane - I've applied this to perf/urgent and will get it to 
Linus ASAP.

Ingo
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Re: amba-pl08x and 'get_signal' namespace collision/build error

2013-07-05 Thread Vinod Koul
On Wed, Jul 03, 2013 at 11:27:12AM -0700, Olof Johansson wrote:
 This has now hit the mainline kernel, and several defconfigs (nhk815,
 lpc32xx and the spear ones) are broken there.
 
 Vinod, when are you sending up your pull request with the fix? It'd be
 good to see it go in soon.
It should be on its way by the weekend

Thanks
~Vinod
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Re: [patch] rapidio: use after free in unregister function

2013-07-05 Thread Ryan Mallon
On 05/07/13 16:02, Dan Carpenter wrote:
 We need to use the _safe version of list_for_each_entry() because we
 are freeing the iterator.
 
 Signed-off-by: Dan Carpenter dan.carpen...@oracle.com
 
 diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c
 index f4f30af..84ac64a 100644
 --- a/drivers/rapidio/rio.c
 +++ b/drivers/rapidio/rio.c
 @@ -1701,7 +1701,7 @@ EXPORT_SYMBOL_GPL(rio_register_scan);
  int rio_unregister_scan(int mport_id, struct rio_scan *scan_ops)
  {
   struct rio_mport *port;
 - struct rio_scan_node *scan;
 + struct rio_scan_node *scan, *tmp;
  
   pr_debug(RIO: %s for mport_id=%d\n, __func__, mport_id);
  
 @@ -1715,7 +1715,7 @@ int rio_unregister_scan(int mport_id, struct rio_scan 
 *scan_ops)
   (mport_id == RIO_MPORT_ANY  port-nscan == scan_ops))
   port-nscan = NULL;
  
 - list_for_each_entry(scan, rio_scans, node)
 + list_for_each_entry_safe(scan, tmp, rio_scans, node)
   if (scan-mport_id == mport_id) {
   list_del(scan-node);
   kfree(scan);

It looks like an mport_id can only be assigned to one scan entry (see
rio_register_scan), so you can use list_for_each_entry and break; after
the kfree(scan); instead.

~Ryan

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Re: [PATCH] include: net: Add parameter desc to fix warning when generating docs

2013-07-05 Thread Johannes Berg
On Fri, 2013-07-05 at 09:18 +1200, Sam Bristow wrote:
 'make htmldocs' was generating a warning about a missing parameter description
 for gfp.

Thanks, but I already have it in my tree. Also, you forgot to sign off
on the patch anyway.

johannes

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Re: [RFC PATCH 01/13] misc: atmel_ssc: add device tree DMA support

2013-07-05 Thread Richard Genoud
2013/7/5 Bo Shen voice.s...@atmel.com:
 Yes, I aware this issue.
 Actually the system not hang, the resource all are occupied by the
 interrupt. This because, we enable the interrupt, when once interrupt occur,
 I try many methods to clear it, however we can not clear it. So, it
 generates the interrupt all the time. It seems the system hang.

 Temp solution: not enable the interrupt. use the following patch to disable
 the interrupt.
 ---8---
 diff --git a/sound/soc/atmel/atmel_ssc_dai.c
 b/sound/soc/atmel/atmel_ssc_dai.c
 index 0ecf356..bb53dea 100644
 --- a/sound/soc/atmel/atmel_ssc_dai.c
 +++ b/sound/soc/atmel/atmel_ssc_dai.c
 @@ -649,7 +649,7 @@ static int atmel_ssc_prepare(struct snd_pcm_substream
 *substream,
 dma_params = ssc_p-dma_params[dir];

 ssc_writel(ssc_p-ssc-regs, CR, dma_params-mask-ssc_enable);
 -   ssc_writel(ssc_p-ssc-regs, IER, dma_params-mask-ssc_error);
 +   ssc_writel(ssc_p-ssc-regs, IDR, dma_params-mask-ssc_error);

 pr_debug(%s enabled SSC_SR=0x%08x\n,
 dir ? receive : transmit,
 ---8---

 BTW, I am checking this with our IP team, if find the real solution, I will
 fix it.

ok, I'll rebase my patches on that.

Thanks !

Best Regards,
Richard
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Re: scheduling while atomic hang.

2013-07-05 Thread Frederic Weisbecker
On Fri, Jul 05, 2013 at 08:51:13AM +0200, Ingo Molnar wrote:
 
 * H. Peter Anvin h...@zytor.com wrote:
 
  On 07/03/2013 07:49 PM, Linus Torvalds wrote:
   [816f42bf] __schedule+0x94f/0x9c0
   [816f487e] schedule_user+0x2e/0x70
   [816f6de4] retint_careful+0x12/0x2e
  
  This call trace does indeed indicate that we took a hardware
  interrupt which caused a reschedule.  It doesn't necessarily have to
  be a quantum expiration interrupt, it could just as easily be an I/O
  completion interrupt.
 
 Too bad the kernel stack frame at this point is so small [we are just 
 before return to userspace], so we don't really get our usual trace of 
 recent activities via the '?' entries ...
 
 It would be nice to have a full-kernel-stack backtrace printout as an 
 option, which prints entries 'above' the current RSP.
 
 I've Cc:-ed Frederic, maybe he has interest in implementing that?

Yeah that sounds interesting. I may give it a try.

Thanks.
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Re: [patch] rapidio: use after free in unregister function

2013-07-05 Thread Dan Carpenter
On Fri, Jul 05, 2013 at 05:06:14PM +1000, Ryan Mallon wrote:
 On 05/07/13 16:02, Dan Carpenter wrote:
 It looks like an mport_id can only be assigned to one scan entry (see
 rio_register_scan), so you can use list_for_each_entry and break; after
 the kfree(scan); instead.

Yeah.  You're right.  I'll resend.

regards,
dan carpenter

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Re: [PATCH V2] dma: mmp_pdma: support for getting residual bytes

2013-07-05 Thread Vinod Koul
On Tue, Jun 18, 2013 at 04:41:20PM +0800, Xiang Wang wrote:
 From: Xiang Wang wa...@marvell.com
 
 In some of our drivers (e.g. UART) we may stop a running DMA
 before it finishes. So we need APIs to know how many bytes
 have been transferred.
 
 Signed-off-by: Xiang Wang wa...@marvell.com
 ---
  drivers/dma/mmp_pdma.c |   88 +++
  1 files changed, 80 insertions(+), 8 deletions(-)
 
 diff --git a/drivers/dma/mmp_pdma.c b/drivers/dma/mmp_pdma.c
 index c26699f..57cd047 100644
 --- a/drivers/dma/mmp_pdma.c
 +++ b/drivers/dma/mmp_pdma.c
 @@ -104,7 +104,8 @@ struct mmp_pdma_chan {
   spinlock_t desc_lock;   /* Descriptor list lock */
   struct list_head chain_pending; /* Link descriptors queue for pending */
   struct list_head chain_running; /* Link descriptors queue for running */
 - bool idle;  /* channel statue machine */
 + enum dma_status status; /* channel status machine */
 + u32 bytes_residue;
  
   struct dma_pool *desc_pool; /* Descriptors pool */
  };
 @@ -270,7 +271,7 @@ static void start_pending_queue(struct mmp_pdma_chan 
 *chan)
   struct mmp_pdma_desc_sw *desc;
  
   /* still in running, irq will start the pending list */
 - if (!chan-idle) {
 + if (chan-status == DMA_IN_PROGRESS) {
   dev_dbg(chan-dev, DMA controller still busy\n);
   return;
   }
 @@ -307,7 +308,64 @@ static void start_pending_queue(struct mmp_pdma_chan 
 *chan)
*/
   set_desc(chan-phy, desc-async_tx.phys);
   enable_chan(chan-phy);
 - chan-idle = false;
 + chan-status = DMA_IN_PROGRESS;
 + chan-bytes_residue = 0;
 +}
 +
 +/*
 + * Get the number of pending bytes. Should be called with desc_lock held
 + * because we are accessing desc list.
 + */
 +static u32 mmp_pdma_get_bytes_residue(struct mmp_pdma_chan *chan)
 +{
 + u32 reg, orig_pos, cur_pos, ddadr, residue = 0;
 + bool running_desc_found = false;
 + struct mmp_pdma_desc_sw *desc_sw;
 +
 + /*
 +  * When a phy channel is unavailable, maybe it has been freed, return
 +  * last stored value for safe.
 +  */
 + if (!chan-phy)
 + return chan-bytes_residue;
 +
 + reg = (chan-phy-idx  4) + DDADR;
 + ddadr = readl_relaxed(chan-phy-base + reg);
 +
 + /* iterate over all descriptors to sum up the number of pending bytes */
and why?

Residue does not mean sum of all pending bytes across all descriptors submitted
You need to find the residue of current descriptor only and return

 + list_for_each_entry(desc_sw, chan-chain_running, node) {
 + /* for the case of a running descriptor */
 + if (desc_sw-desc.ddadr == ddadr  !running_desc_found) {
 + switch (chan-dir) {
 + case DMA_DEV_TO_MEM:
 + case DMA_MEM_TO_MEM:
 + reg = (chan-phy-idx  4) + DTADR;
 + cur_pos = readl_relaxed(chan-phy-base + reg);
 + orig_pos = desc_sw-desc.dtadr;
 + break;
 +
 + case DMA_MEM_TO_DEV:
 + reg = (chan-phy-idx  4) + DSADR;
 + cur_pos = readl_relaxed(chan-phy-base + reg);
 + orig_pos = desc_sw-desc.dsadr;
 + break;
 +
 + default:
 + cur_pos = 0;
 + orig_pos = 0;
This makes no sense...

 + }
 + residue = (u32)(desc_sw-desc.dcmd  DCMD_LENGTH)
 + + orig_pos - cur_pos;
 + running_desc_found = true;
 + continue;
 + }
 +
 + /* for the case of following un-started descriptors*/
 + if (running_desc_found)
 + residue += (u32)(desc_sw-desc.dcmd  DCMD_LENGTH);
 + }
 +
 + return residue;
  }
  
  
 @@ -381,7 +439,7 @@ static int mmp_pdma_alloc_chan_resources(struct dma_chan 
 *dchan)
   chan-phy-vchan = NULL;
   chan-phy = NULL;
   }
 - chan-idle = true;
 + chan-status = DMA_SUCCESS;
   chan-dev_addr = 0;
   return 1;
  }
 @@ -409,7 +467,7 @@ static void mmp_pdma_free_chan_resources(struct dma_chan 
 *dchan)
  
   dma_pool_destroy(chan-desc_pool);
   chan-desc_pool = NULL;
 - chan-idle = true;
 + chan-status = DMA_SUCCESS;
   chan-dev_addr = 0;
   if (chan-phy) {
   chan-phy-vchan = NULL;
 @@ -588,9 +646,16 @@ static int mmp_pdma_control(struct dma_chan *dchan, enum 
 dma_ctrl_cmd cmd,
   spin_lock_irqsave(chan-desc_lock, flags);
   mmp_pdma_free_desc_list(chan, chan-chain_pending);
   mmp_pdma_free_desc_list(chan, chan-chain_running);
 + chan-bytes_residue = 0;
   

Re: [PATCH v2] dma: mmp_pdma: fix a memory alloc error

2013-07-05 Thread Vinod Koul
On Tue, Jun 18, 2013 at 02:21:58PM +0800, Xiang Wang wrote:
 From: Xiang Wang wa...@marvell.com
 
 pdev-phy is of type struct mmp_pdma_phy *. But when
 allocating memory for it, struct mmp_pdma_chan is used
 by mistake.
 
 Signed-off-by: Xiang Wang wa...@marvell.com
 ---
  drivers/dma/mmp_pdma.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/drivers/dma/mmp_pdma.c b/drivers/dma/mmp_pdma.c
 index c26699f..18ac57f 100644
 --- a/drivers/dma/mmp_pdma.c
 +++ b/drivers/dma/mmp_pdma.c
 @@ -801,7 +801,7 @@ static int mmp_pdma_probe(struct platform_device *op)
   }
  
   pdev-phy = devm_kzalloc(pdev-dev,
 - dma_channels * sizeof(struct mmp_pdma_chan), GFP_KERNEL);
 + dma_channels * sizeof(*pdev-phy), GFP_KERNEL);
While at it, can you make the flag GFP_NOWAIT. that is the recommendation for
dmac drivers

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Re: [PATCH 1/2] Initial support for Allwinner's Security ID fuses

2013-07-05 Thread Oliver Schinagl

Hey Greg,

Thanks for the blog post :) it was very helpful and at least something 
good came from the less-nice bit of the discussion, but:


On 26-06-13 19:51, Greg KH wrote:

On Wed, Jun 26, 2013 at 10:32:09AM +0200, Oliver Schinagl wrote:

On 24-06-13 23:46, Greg KH wrote:

On Mon, Jun 24, 2013 at 11:21:16PM +0200, Oliver Schinagl wrote:

On 06/24/13 20:15, Greg KH wrote:

On Mon, Jun 24, 2013 at 07:11:35PM +0200, Oliver Schinagl wrote:

Hey Greg,
On 06/24/13 18:04, Greg KH wrote:

On Mon, Jun 24, 2013 at 11:29:42AM +0200, Maxime Ripard wrote:

Hi Greg,

On Mon, Jun 17, 2013 at 03:58:47PM -0700, Greg KH wrote:

On Mon, Jun 17, 2013 at 10:59:37PM +0200, Oliver Schinagl wrote:


[..]


+static int __init sunxi_sid_probe(struct platform_device *pdev)
+{
+   u8 entropy[SID_SIZE];
+   unsigned int i;
+   struct resource *res;
+   void __iomem *sid_reg_base;
+   int ret;
+
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   sid_reg_base = devm_ioremap_resource(pdev-dev, res);
+   if (IS_ERR(sid_reg_base))
+   return PTR_ERR(sid_reg_base);
+   platform_set_drvdata(pdev, sid_reg_base);
+
+   ret = device_create_bin_file(pdev-dev, sid_bin_attr);
+   if (ret)
+   return ret;


You just raced with userspace, having the file show up after the device
was announced to users that it was there.  Please use the proper device
file api to add default attributes to prevent this from happening.


Sorry if the question looks dumb, but what kind of race can we generate
here?


Userspace gets told about the device from the driver core, udev runs and
reads all of the attributes, then your probe function comes along and
adds a new attribute.  Userspace will then not know about it at all.


The device_create_bin_file is the last call that we make (if we except
the entropy stuff, but it doesn't really matter here), so after we
created the file, we have everything properly initialised so that our
functions can be called, right?

And another dumb question for you, what is the proper device file API
you are referring to ? :)


Please read Documentation/driver_model/device.txt and see the section on
Attributes for what to do.  If you have specific questions after reading
that, please let me know.

Since Maxime kinda asked for me, I hope you don't mind me following up.

That doc doesn't mention the binary interface at all. Initially I
had both devices up, the 'read' device as a textual representation
and added the binary one later. Maxime and I decided the binary one
made more sense, as the only textual user would be a human and they
don't poke that entry that often.

So what default way exists for binary files or how would that be solved?


The same interface should work just fine for binary files, have you
tried it?

I'll just take the plunge and make myself look stupid ;)

I tried to change things around, used DEVICE_ATTR(eeprom, S_IRUGO,
sid_read, NULL); So far so good I'd hope.


Ick, no.


Of course now I'll have to change the function's parameters from

static ssize_t sid_read(struct file *fd, struct kobject *kobj,
struct bin_attribute *attr, char *buf,
loff_t pos, size_t size)

to

static ssize_t sid_read(struct device *dev,
struct device_attribute *attr, char *buf)


Which is what do you do not want, as you find out:


But now, I'm missing things like 'pos' and 'size', both which
determine the requested bytes. True, in this specific driver we are
talking about 'only' 16 bytes, but what if it weren't but a few MiB
and in sysfs we want to read some random byte, will we have to put
the entire blok into the buffer?

So sorry for not understanding, but ... I don't understand :)


Stick with a binary attribute, and attach that to the proper class
structure and all should be fine.

Ah crap, you're using a platform device.

{sigh}

Why?  Why not use a real device which has a real class, and then use
the interfaces there?

Because, as I was told, this really is a platform device. If you
have some example code I can look at and learn from that would be
awesome. I'm still learning after all, and apparently I'm doing it
wrong now :)


I was wrong, you can do this with a platform device just fine.  Set the
groups field in your platform device-device structure, and all will
work properly, right?

Not for me :(

Firstly, I have a platform_driver structure, but it has a .driver field 
and i can set the .groups field there just fine, as your blog post said 
I believe, so that got me on the right track.


static struct platform_driver sunxi_sid_driver = {
.probe = sunxi_sid_probe,
.remove = sunxi_sid_remove,
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,
.of_match_table = sunxi_sid_of_match,
.groups = sunxi_sid_attr_groups,
},
};
module_platform_driver(sunxi_sid_driver);


After jumping through a 

[PATCH] mutex: move ww_mutex definitions to ww_mutex.h

2013-07-05 Thread Maarten Lankhorst
Op 05-07-13 08:23, Ingo Molnar schreef:
 * Maarten Lankhorst maarten.lankho...@canonical.com wrote:

 Hey,

 Op 03-07-13 02:54, Linus Torvalds schreef:
 On Mon, Jul 1, 2013 at 1:22 AM, Ingo Molnar mi...@kernel.org wrote:
 Please pull the latest core-mutexes-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 
 core-mutexes-for-linus

HEAD: 166989e366ffa66108b2f37b870e66b85b2185ad locking-selftests: 
 Handle unexpected failures more strictly

 This tree adds support for wound/wait style locks, which the graphics guys
 would like to make use of in the TTM graphics subsystem.
 So I pulled this, but I'm not particularly happy with how this (very
 unusual) lock pollutes linux/mutex.h that pretty much every single
 file ends up including.

 So I'd really prefer to see the ww_mutex() support split up into
 linux/ww_mutex.h, rather than making the compiler have to parse and
 remember that stuff when 99.99% of all files do not care about it or
 need it.
 Sounds good to me, but can it wait until with the drm pull is done?
 The ordering should not matter much as the combination will be tested in 
 linux-next anyway.

 Preliminary diff below.
 Looks good to me at first sight. Please send a tested, changelogged, 
 signed off version.

 Thanks,

   Ingo

It turns out that the 'fix' for merging with drm-next is changing 1 line in
linux/reservation.h, from including mutex.h to ww_mutex.h.

I did that in below diff, but that hunk can safely be ignored if drm-next
is not merged yet. But in that case drm-next will need that hunk.

8---

Move the definitions for wound/wait mutexes out to a separate header, 
ww_mutex.h.
This reduces clutter in mutex.h, and increases readability.

Signed-off-by: Maarten Lankhorst maarten.lankho...@canonical.com
---
 include/linux/mutex.h   | 358 -
 include/linux/reservation.h |   2 +-
 include/linux/ww_mutex.h| 380 
 kernel/mutex.c  |   1 +
 lib/locking-selftest.c  |   1 +
 5 files changed, 383 insertions(+), 359 deletions(-)
 create mode 100644 include/linux/ww_mutex.h

diff --git a/include/linux/mutex.h b/include/linux/mutex.h
index 3793ed7..ccd4260 100644
--- a/include/linux/mutex.h
+++ b/include/linux/mutex.h
@@ -78,40 +78,6 @@ struct mutex_waiter {
 #endif
 };
 
-struct ww_class {
-   atomic_long_t stamp;
-   struct lock_class_key acquire_key;
-   struct lock_class_key mutex_key;
-   const char *acquire_name;
-   const char *mutex_name;
-};
-
-struct ww_acquire_ctx {
-   struct task_struct *task;
-   unsigned long stamp;
-   unsigned acquired;
-#ifdef CONFIG_DEBUG_MUTEXES
-   unsigned done_acquire;
-   struct ww_class *ww_class;
-   struct ww_mutex *contending_lock;
-#endif
-#ifdef CONFIG_DEBUG_LOCK_ALLOC
-   struct lockdep_map dep_map;
-#endif
-#ifdef CONFIG_DEBUG_WW_MUTEX_SLOWPATH
-   unsigned deadlock_inject_interval;
-   unsigned deadlock_inject_countdown;
-#endif
-};
-
-struct ww_mutex {
-   struct mutex base;
-   struct ww_acquire_ctx *ctx;
-#ifdef CONFIG_DEBUG_MUTEXES
-   struct ww_class *ww_class;
-#endif
-};
-
 #ifdef CONFIG_DEBUG_MUTEXES
 # include linux/mutex-debug.h
 #else
@@ -136,11 +102,8 @@ static inline void mutex_destroy(struct mutex *lock) {}
 #ifdef CONFIG_DEBUG_LOCK_ALLOC
 # define __DEP_MAP_MUTEX_INITIALIZER(lockname) \
, .dep_map = { .name = #lockname }
-# define __WW_CLASS_MUTEX_INITIALIZER(lockname, ww_class) \
-   , .ww_class = ww_class
 #else
 # define __DEP_MAP_MUTEX_INITIALIZER(lockname)
-# define __WW_CLASS_MUTEX_INITIALIZER(lockname, ww_class)
 #endif
 
 #define __MUTEX_INITIALIZER(lockname) \
@@ -150,49 +113,13 @@ static inline void mutex_destroy(struct mutex *lock) {}
__DEBUG_MUTEX_INITIALIZER(lockname) \
__DEP_MAP_MUTEX_INITIALIZER(lockname) }
 
-#define __WW_CLASS_INITIALIZER(ww_class) \
-   { .stamp = ATOMIC_LONG_INIT(0) \
-   , .acquire_name = #ww_class _acquire \
-   , .mutex_name = #ww_class _mutex }
-
-#define __WW_MUTEX_INITIALIZER(lockname, class) \
-   { .base = { \__MUTEX_INITIALIZER(lockname) } \
-   __WW_CLASS_MUTEX_INITIALIZER(lockname, class) }
-
 #define DEFINE_MUTEX(mutexname) \
struct mutex mutexname = __MUTEX_INITIALIZER(mutexname)
 
-#define DEFINE_WW_CLASS(classname) \
-   struct ww_class classname = __WW_CLASS_INITIALIZER(classname)
-
-#define DEFINE_WW_MUTEX(mutexname, ww_class) \
-   struct ww_mutex mutexname = __WW_MUTEX_INITIALIZER(mutexname, ww_class)
-
-
 extern void __mutex_init(struct mutex *lock, const char *name,
 struct lock_class_key *key);
 
 /**
- * ww_mutex_init - initialize the w/w mutex
- * @lock: the mutex to be initialized
- * @ww_class: the w/w class the mutex should belong to
- *
- * Initialize the w/w mutex to unlocked state and 

[PATCH] irqchip: sun4i: Staticize sun4i_irq_ack()

2013-07-05 Thread Axel Lin
sun4i_irq_ack() is only referenced in this file, so make it static.

Signed-off-by: Axel Lin axel@ingics.com
---
 drivers/irqchip/irq-sun4i.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-sun4i.c b/drivers/irqchip/irq-sun4i.c
index b66d4ae..a5438d8 100644
--- a/drivers/irqchip/irq-sun4i.c
+++ b/drivers/irqchip/irq-sun4i.c
@@ -38,7 +38,7 @@ static struct irq_domain *sun4i_irq_domain;
 
 static asmlinkage void __exception_irq_entry sun4i_handle_irq(struct pt_regs 
*regs);
 
-void sun4i_irq_ack(struct irq_data *irqd)
+static void sun4i_irq_ack(struct irq_data *irqd)
 {
unsigned int irq = irqd_to_hwirq(irqd);
unsigned int irq_off = irq % 32;
-- 
1.8.1.2



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Re: [PATCH] input: don't call input_dev_release_keys() in resume

2013-07-05 Thread Oskar Andero
Hi Dmitry,

On 18:33 Thu 04 Apr , Dmitry Torokhov wrote:
 Hi Oskar,
 
 On Thu, Mar 07, 2013 at 03:01:22PM +0100, oskar.and...@sonymobile.com wrote:
  From: Aleksej Makarov aleksej.maka...@sonymobile.com
 
  When waking up the platform by pressing a specific key, sending a
  release on that key makes it impossible to react on the event in
  user-space.
 
 
 No, we can not simply not release keys after resume from suspend, as
 this leads to keys being stuck. Consider you are holding an 'I' key on
 your external USB keyboard and close your laptop's lid. Then you release
 the key and leave. Later you come back, open the lid waking the laptop
 and observe endless stream of 'I' in your open terminal.
 
 Maybe we should release the keys during suspend time? I am not sure how
 Android infrastructure will react to this though...

I finally got the time to try this out. Releasing the keys in suspend
also solves our problem. Would such patch work for the USB keyboard
case you described? Theoretically, I think it should, right?

So, basically:

static int input_dev_suspend(struct device *dev)
 {
struct input_dev *input_dev = to_input_dev(dev);
 
-   mutex_lock(input_dev-mutex);
-
-   if (input_dev-users)
-   input_dev_toggle(input_dev, false);
-
-   mutex_unlock(input_dev-mutex);
+   input_reset_device(input_dev);
 
return 0;
 }
 
 static int input_dev_resume(struct device *dev)
 {
-   struct input_dev *input_dev = to_input_dev(dev);
-
-   input_reset_device(input_dev);
-
return 0;
 }

Should I send the patch?

-Oskar
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Re: [RFC] clk: add flags to distinguish xtal clocks

2013-07-05 Thread Luciano Coelho
On Thu, 2013-07-04 at 16:19 -0700, Mike Turquette wrote:
 Quoting Luciano Coelho (2013-07-04 15:37:45)
  On Thu, 2013-07-04 at 15:25 -0700, Mike Turquette wrote:
   Or is it the same clock input and basically the problem is that you need
   to know what kind of waveform to expect (e.g. square versus sine)?
  
  It's the same clock input in the chip's perspective.  One clock input
  that can be any of the combinations I mentioned above.  Again, I'm not
  familiar with clocks, so I guess the square vs. sine explanation is
  plausible.  What I could see in the firmware is that it handles the
  clocks differently if they're xtal or not.
 
 OMAP has a similar thing where sys_clkin (the fast reference clock for
 the chip) can be 19.2, 26, 38.4, etc. This is easy to handle since only
 the rates matter.

Right, this part is easy and I already have the code for that.  What I'm
missing is a way to pass this XTAL flag to the chip.


 In your case you need some extra metadata to know what to do. I'm really
 not sure if CLK_IS_TYPE_XTAL is the most useful form this metadata can
 take. It would be best to know if the waveform is what you really need
 to know, or perhaps something else. For instance you might be affected
 by some clock signal stabilization time. Can you talk to your hardware
 guys and figure it out? I'd rather model the actual needs instead of
 just tossing a flag in there.

I get your point.  I have tried to investigate how this flag is used by
the firmware and I could see that it is used to set different buffer
gains and delays when waking up (I guess this means when the clock is
starting, so probably related to stabilization time).  They specify two
modes, boost and normal and use different delay values for each.

As I said, I don't know almost anything about clocks, so all this
doesn't make much sense to me.  But maybe you can get an idea?

--
Cheers,
Luca.

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Re: [PATCH] include/asm-generic/io.h: add dummy fuctions to support 'COMPILE_TEST' in 'asm-generic'.

2013-07-05 Thread Chen Gang F T
Hello All:

It seems 'asm-generic' dislikes 'mad users' (e.g allmodconfig,
randconfig, and me).

I guess the main reason is: 'asm-generic' thinks what mad users talk
about is useless in real world, so it is just noisy.

I can understand, at least what I talk about is not for urgent things.
(maybe 'asm-generic' also thinks it not important either, every members
have their own opinions).

Next, I still use allmodconfig/randconfig for some architectures which I
am interested in (and also for learning compilers), but I will skip all
things which are related with 'asm-generic', since it dislikes me (a mad
user).

At last, I make an apologize to 'asm-generic' for my mad discussing.

Bye !!


On 07/05/2013 08:48 AM, Chen Gang F T wrote:
 On 07/05/2013 08:14 AM, Stephen Rothwell wrote:
 On Fri, 05 Jul 2013 08:03:31 +0800 Chen Gang F T 
 chen.gang.flying.transfor...@gmail.com wrote:

 When a module select COMPILE_TEST=y (e.g with allmodconfig), it has
 right to compile under the architecture which no related HW support.

 If it can not pass compiling, at least it is not the module's issue,
 neither the architecture's issue.

 We have to look for who has duty on it. At least now, it seems only
 'asm-generic' can be qualified to play this unlucky role.
 You keep saying this, but others have told you that this is not the
 problem.

 
 In real world, it is not the problem.
 
 But for 'mad users' (e.g. allmodconfig, randconfig, and me too), they
 have not provided enough reason for it (prove that is not a problem for
 'mad users').
 
 
 Could you provide your suggestions or completions for this issue ?
 If something doesn't build for a particular config, then either it needs
 to be fixed or excluded from building in that particular config.
 
 I agree with you, if get rid of 'COMPILE_TEST'.
 
 Thanks.
 


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Re: [PATCH v2 4/7] perf, x86: Save/resotre LBR stack during context switch

2013-07-05 Thread Peter Zijlstra
On Fri, Jul 05, 2013 at 01:36:24PM +0800, Yan, Zheng wrote:
 On 07/04/2013 08:45 PM, Peter Zijlstra wrote:
  On Mon, Jul 01, 2013 at 03:23:04PM +0800, Yan, Zheng wrote:
  
  @@ -2488,25 +2508,31 @@ static void perf_branch_stack_sched_in(struct 
  task_struct *prev,
   
 list_for_each_entry_rcu(pmu, pmus, entry) {
 cpuctx = this_cpu_ptr(pmu-pmu_cpu_context);
  +  task_ctx = cpuctx-task_ctx;
   
 /*
  -   * check if the context has at least one
  -   * event using PERF_SAMPLE_BRANCH_STACK
  +   * force flush the branch stack if there are cpu-wide events
  +   * using PERF_SAMPLE_BRANCH_STACK
  +   *
  +   * save/restore the branch stack if the task context has
  +   * at least one event using PERF_SAMPLE_BRANCH_STACK
  */
  -  if (cpuctx-ctx.nr_branch_stack  0
  -   pmu-flush_branch_stack) {
  -
  +  bool force_flush = cpuctx-ctx.nr_branch_stack  0;
  +  if (pmu-branch_stack_sched 
  +  (force_flush ||
  +   (task_ctx  task_ctx-nr_branch_stack  0))) {
 pmu = cpuctx-ctx.pmu;
   
  -  perf_ctx_lock(cpuctx, cpuctx-task_ctx);
  +  perf_ctx_lock(cpuctx, task_ctx);
   
 perf_pmu_disable(pmu);
   
  -  pmu-flush_branch_stack();
  +  pmu-branch_stack_sched(task_ctx,
  +  sched_in, force_flush);
   
 perf_pmu_enable(pmu);
   
  -  perf_ctx_unlock(cpuctx, cpuctx-task_ctx);
  +  perf_ctx_unlock(cpuctx, task_ctx);
 }
 }
   
  
  I never really like this; and yes I know I wrote part of that. Is there
  any way we can get rid of this and to it 'properly' through the events
  that get scheduled?
  
  After all; the LBR usage is through the events, so scheduling the events
  should also manage the LBR state.
  
  What is missing for that to work?
  
 
 the LBR is shared resource, can be used by multiple events at the same time.

Yeah so? There's tons of shared resources in the PMU already.

 Strictly speaking,LBR is associated with task, not event.

Wrong!, it _is_ associated with events. Events is all there is. Event can be
associated with tasks, but that's completely irrelevant.

 One example is
 there are 5 events using the LBR stack feature, but there are only 4 counters.
 So these events need schedule. Saving/restoring LBR on the basis of event is
 clearly wrong.

Different scheduling and you're wrong. Look at perf_rotate_context(), we'd
disable everything at perf_pmu_disable() and enable the entire thing at
perf_pmu_enable(), on both sides we'd have the LBR running.

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Re: [PATCH] irqchip: sun4i: Staticize sun4i_irq_ack()

2013-07-05 Thread Maxime Ripard
Hi Axel,

On Fri, Jul 05, 2013 at 03:41:10PM +0800, Axel Lin wrote:
 sun4i_irq_ack() is only referenced in this file, so make it static.
 
 Signed-off-by: Axel Lin axel@ingics.com

Acked-by: Maxime Ripard maxime.rip...@free-electrons.com

Thanks!
Maxime

-- 
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Embedded Linux, Kernel and Android engineering
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Re: [PATCH v2] f2fs: fix readdir incorrectness

2013-07-05 Thread Jaegeuk Kim
Chang log from v1:
 o fix another scenario

From 2ee3c8144187ab230d0f47f9b95e5406af87ada8 Mon Sep 17 00:00:00 2001
From: Jaegeuk Kim jaegeuk@samsung.com
Date: Fri, 5 Jul 2013 14:06:04 +0900
Subject: [PATCH] f2fs: fix readdir incorrectness
Cc: linux-fsde...@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-f2fs-de...@lists.sourceforge.net

In the previous Al Viro's readdir patch set, there occurs a bug when
running
xfstest: 006 as follows.

[Error output]
alpha size = 4, name length = 6, total files = 4096, nproc=1
1023 files created
rm: cannot remove `/mnt/f2fs/permname.15150/a': Directory not empty

[Correct output]
alpha size = 4, name length = 6, total files = 4096, nproc=1
4097 files created

This bug is due to the misupdate of directory position in ctx.
So, this patch fixes this.

CC: Al Viro v...@zeniv.linux.org.uk
Signed-off-by: Jaegeuk Kim jaegeuk@samsung.com
---
 fs/f2fs/dir.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/fs/f2fs/dir.c b/fs/f2fs/dir.c
index 9d1cd42..dffc4f7 100644
--- a/fs/f2fs/dir.c
+++ b/fs/f2fs/dir.c
@@ -634,19 +634,19 @@ static int f2fs_readdir(struct file *file, struct
dir_context *ctx)
if (bit_pos = NR_DENTRY_IN_BLOCK)
break;
 
-   ctx-pos += bit_pos - start_bit_pos;
de = dentry_blk-dentry[bit_pos];
if (de-file_type  F2FS_FT_MAX)
d_type = f2fs_filetype_table[de-file_type];
else
d_type = DT_UNKNOWN;
if (!dir_emit(ctx,
- dentry_blk-filename[bit_pos],
- le16_to_cpu(de-name_len),
- le32_to_cpu(de-ino), d_type))
-   goto success;
-   slots = GET_DENTRY_SLOTS(le16_to_cpu(de-name_len));
-   bit_pos += slots;
+   dentry_blk-filename[bit_pos],
+   le16_to_cpu(de-name_len),
+   le32_to_cpu(de-ino), d_type))
+   goto stop;
+
+   bit_pos += GET_DENTRY_SLOTS(le16_to_cpu(de-name_len));
+   ctx-pos = n * NR_DENTRY_IN_BLOCK + bit_ops;
}
bit_pos = 0;
ctx-pos = (n + 1) * NR_DENTRY_IN_BLOCK;
@@ -654,7 +654,7 @@ static int f2fs_readdir(struct file *file, struct
dir_context *ctx)
f2fs_put_page(dentry_page, 1);
dentry_page = NULL;
}
-success:
+stop:
if (dentry_page  !IS_ERR(dentry_page)) {
kunmap(dentry_page);
f2fs_put_page(dentry_page, 1);
-- 
1.8.3.1.437.g0dbd812



-- 
Jaegeuk Kim
Samsung

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[PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-05 Thread Jingoo Han
Exynos PCIe IP consists of Synopsys specific part and Exynos
specific part. Only core block is a Synopsys designware part;
other parts are Exynos specific.
Also, the Synopsys designware part can be shared with other
platforms; thus, it can be split two parts such as Synopsys
designware part and Exynos specific part.

Signed-off-by: Jingoo Han jg1@samsung.com
Cc: Pratyush Anand pratyush.an...@st.com
Cc: Mohit KUMAR mohit.ku...@st.com
---
 drivers/pci/host/Makefile  |1 +
 drivers/pci/host/pcie-designware.c |  907 +++-
 drivers/pci/host/pcie-designware.h |   72 +++
 drivers/pci/host/pcie-exynos.c |  619 
 4 files changed, 862 insertions(+), 737 deletions(-)
 create mode 100644 drivers/pci/host/pcie-designware.h
 create mode 100644 drivers/pci/host/pcie-exynos.c

diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
index 086d850..7e59864 100644
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
 obj-$(CONFIG_PCIE_DW) += pcie-designware.o
+obj-$(CONFIG_PCI_EXYNOS) += pcie-exynos.o
diff --git a/drivers/pci/host/pcie-designware.c 
b/drivers/pci/host/pcie-designware.c
index 26bdbda..48a52f5 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -1,5 +1,5 @@
 /*
- * PCIe host controller driver for Samsung EXYNOS SoCs
+ * Synopsys Designware PCIe host controller driver
  *
  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  * http://www.samsung.com
@@ -11,64 +11,13 @@
  * published by the Free Software Foundation.
  */
 
-#include linux/clk.h
-#include linux/delay.h
-#include linux/gpio.h
-#include linux/interrupt.h
 #include linux/kernel.h
-#include linux/list.h
 #include linux/module.h
-#include linux/of.h
-#include linux/of_address.h
-#include linux/of_gpio.h
-#include linux/of_pci.h
 #include linux/pci.h
 #include linux/pci_regs.h
-#include linux/platform_device.h
-#include linux/resource.h
-#include linux/signal.h
-#include linux/slab.h
 #include linux/types.h
 
-struct pcie_port_info {
-   u32 cfg0_size;
-   u32 cfg1_size;
-   u32 io_size;
-   u32 mem_size;
-   phys_addr_t io_bus_addr;
-   phys_addr_t mem_bus_addr;
-};
-
-struct pcie_port {
-   struct device   *dev;
-   u8  controller;
-   u8  root_bus_nr;
-   void __iomem*dbi_base;
-   void __iomem*elbi_base;
-   void __iomem*phy_base;
-   void __iomem*purple_base;
-   u64 cfg0_base;
-   void __iomem*va_cfg0_base;
-   u64 cfg1_base;
-   void __iomem*va_cfg1_base;
-   u64 io_base;
-   u64 mem_base;
-   spinlock_t  conf_lock;
-   struct resource cfg;
-   struct resource io;
-   struct resource mem;
-   struct pcie_port_info   config;
-   struct clk  *clk;
-   struct clk  *bus_clk;
-   int irq;
-   int reset_gpio;
-};
-
-/*
- * Exynos PCIe IP consists of Synopsys specific part and Exynos
- * specific part. Only core block is a Synopsys designware part;
- * other parts are Exynos specific.
- */
+#include pcie-designware.h
 
 /* Synopsis specific PCIE configuration registers */
 #define PCIE_PORT_LINK_CONTROL 0x710
@@ -108,69 +57,14 @@ struct pcie_port {
 #define PCIE_ATU_FUNC(x)   (((x)  0x7)  16)
 #define PCIE_ATU_UPPER_TARGET  0x91C
 
-/* Exynos specific PCIE configuration registers */
-
-/* PCIe ELBI registers */
-#define PCIE_IRQ_PULSE 0x000
-#define IRQ_INTA_ASSERT(0x1  0)
-#define IRQ_INTB_ASSERT(0x1  2)
-#define IRQ_INTC_ASSERT(0x1  4)
-#define IRQ_INTD_ASSERT(0x1  6)
-#define PCIE_IRQ_LEVEL 0x004
-#define PCIE_IRQ_SPECIAL   0x008
-#define PCIE_IRQ_EN_PULSE  0x00c
-#define PCIE_IRQ_EN_LEVEL  0x010
-#define PCIE_IRQ_EN_SPECIAL0x014
-#define PCIE_PWR_RESET 0x018
-#define PCIE_CORE_RESET0x01c
-#define PCIE_CORE_RESET_ENABLE (0x1  0)
-#define PCIE_STICKY_RESET  0x020
-#define PCIE_NONSTICKY_RESET   0x024
-#define PCIE_APP_INIT_RESET0x028
-#define PCIE_APP_LTSSM_ENABLE  0x02c
-#define PCIE_ELBI_RDLH_LINKUP  0x064
-#define PCIE_ELBI_LTSSM_ENABLE 0x1
-#define PCIE_ELBI_SLV_AWMISC   0x11c
-#define PCIE_ELBI_SLV_ARMISC   0x120
-#define PCIE_ELBI_SLV_DBI_ENABLE   (0x1  21)
-
-/* PCIe Purple registers */
-#define PCIE_PHY_GLOBAL_RESET  0x000
-#define 

Re: KVM VM shutdown triggers BUG from network bridge code in 3.9.9

2013-07-05 Thread Cong Wang
On Fri, 05 Jul 2013 at 04:30 GMT, Robert Hancock hancock...@gmail.com wrote:
 I've run into a problem after updating to Fedora 19 where if I shut down 
 a Windows 7 KVM virtual machine, the machine hits a kernel panic. There 
 are a few reports of this on 3.9.8 and 3.9.9 kernels here:

 https://bugzilla.redhat.com/show_bug.cgi?id=981437

 The panic is kernel BUG at kernel/timer.c:729! and the stack traces 
 all seem basically the same, something like this one (captured with kdump):

   #7 [880214d25c10] mod_timer+501 at 8106d905
   #8 [880214d25c50] br_multicast_del_pg.isra.20+261 at 
 a0731d25 [bridge]

Yeah, I got some similar bug report on Fedora...

Could you try the following patch? Thanks!

--

diff --git a/net/bridge/br_multicast.c b/net/bridge/br_multicast.c
index 81befac..69af490 100644
--- a/net/bridge/br_multicast.c
+++ b/net/bridge/br_multicast.c
@@ -270,7 +270,7 @@ static void br_multicast_del_pg(struct net_bridge *br,
del_timer(p-timer);
call_rcu_bh(p-rcu, br_multicast_free_pg);
 
-   if (!mp-ports  !mp-mglist 
+   if (!mp-ports  !mp-mglist  mp-timer_armed 
netif_running(br-dev))
mod_timer(mp-timer, jiffies);
 

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[PATCH] f2fs: add proc entry to monitor current usage of segments

2013-07-05 Thread Jaegeuk Kim
You can monitor valid block counts of whole segments in:
  /proc/fs/f2fs/sdb1/segment_info.

Signed-off-by: Jaegeuk Kim jaegeuk@samsung.com
---
 fs/f2fs/f2fs.h  |  1 +
 fs/f2fs/super.c | 46 ++
 2 files changed, 47 insertions(+)

diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index 82e187f..e3a611d 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -365,6 +365,7 @@ enum page_type {
 
 struct f2fs_sb_info {
struct super_block *sb; /* pointer to VFS super block */
+   struct proc_dir_entry *s_proc;  /* proc entry */
struct buffer_head *raw_super_buf;  /* buffer head of raw sb */
struct f2fs_super_block *raw_super; /* raw super block pointer */
int s_dirty;/* dirty flag for checkpoint */
diff --git a/fs/f2fs/super.c b/fs/f2fs/super.c
index d48d995..1ed0279 100644
--- a/fs/f2fs/super.c
+++ b/fs/f2fs/super.c
@@ -18,6 +18,7 @@
 #include linux/parser.h
 #include linux/mount.h
 #include linux/seq_file.h
+#include linux/proc_fs.h
 #include linux/random.h
 #include linux/exportfs.h
 #include linux/blkdev.h
@@ -31,6 +32,7 @@
 #define CREATE_TRACE_POINTS
 #include trace/events/f2fs.h
 
+static struct proc_dir_entry *f2fs_proc_root;
 static struct kmem_cache *f2fs_inode_cachep;
 
 enum {
@@ -404,6 +406,11 @@ static void f2fs_put_super(struct super_block *sb)
 {
struct f2fs_sb_info *sbi = F2FS_SB(sb);
 
+   if (sbi-s_proc) {
+   remove_proc_entry(segment_info, sbi-s_proc);
+   remove_proc_entry(sb-s_id, f2fs_proc_root);
+   }
+
f2fs_destroy_stats(sbi);
stop_gc_thread(sbi);
 
@@ -521,6 +528,36 @@ static int f2fs_show_options(struct seq_file *seq, struct 
dentry *root)
return 0;
 }
 
+static int segment_info_seq_show(struct seq_file *seq, void *offset)
+{
+   struct super_block *sb = seq-private;
+   struct f2fs_sb_info *sbi = F2FS_SB(sb);
+   unsigned int total_segs = 
le32_to_cpu(sbi-raw_super-segment_count_main);
+   int i;
+
+   for (i = 0; i  total_segs; i++) {
+   seq_printf(seq, %u, get_valid_blocks(sbi, i, 1));
+   if (i != 0  (i % 10) == 0)
+   seq_puts(seq, \n);
+   else
+   seq_puts(seq,  );
+   }
+   return 0;
+}
+
+static int segment_info_open_fs(struct inode *inode, struct file *file)
+{
+   return single_open(file, segment_info_seq_show, PDE_DATA(inode));
+}
+
+static const struct file_operations f2fs_seq_segment_info_fops = {
+   .owner = THIS_MODULE,
+   .open = segment_info_open_fs,
+   .read = seq_read,
+   .llseek = seq_lseek,
+   .release = single_release,
+};
+
 static int f2fs_remount(struct super_block *sb, int *flags, char *data)
 {
struct f2fs_sb_info *sbi = F2FS_SB(sb);
@@ -947,6 +984,13 @@ static int f2fs_fill_super(struct super_block *sb, void 
*data, int silent)
if (err)
goto fail;
 
+   if (f2fs_proc_root)
+   sbi-s_proc = proc_mkdir(sb-s_id, f2fs_proc_root);
+
+   if (sbi-s_proc)
+   proc_create_data(segment_info, S_IRUGO, sbi-s_proc,
+f2fs_seq_segment_info_fops, sb);
+
if (test_opt(sbi, DISCARD)) {
struct request_queue *q = bdev_get_queue(sb-s_bdev);
if (!blk_queue_discard(q))
@@ -1033,12 +1077,14 @@ static int __init init_f2fs_fs(void)
if (err)
goto fail;
f2fs_create_root_stats();
+   f2fs_proc_root = proc_mkdir(fs/f2fs, NULL);
 fail:
return err;
 }
 
 static void __exit exit_f2fs_fs(void)
 {
+   remove_proc_entry(fs/f2fs, NULL);
f2fs_destroy_root_stats();
unregister_filesystem(f2fs_fs_type);
destroy_checkpoint_caches();
-- 
1.8.3.1.437.g0dbd812

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[PATCH 4/6] cpufreq: performance: Add support to collect CPUs load periodically

2013-07-05 Thread Chanwoo Choi
This patch collect CPUs load when cpufreq governos is performance.
The collected CPUs load is used for providing data through debugfs file.
- /sys/kernel/debug/cpufreq/cpuX/load_table

And this patch create basic sysfs file as below:
- /sys/devices/system/cpu/cpufreq/performance/ignore_nice (rw)
- /sys/devices/system/cpu/cpufreq/performance/sampling_rate (rw)
- /sys/devices/system/cpu/cpufreq/performance/sampling_rate_min (r)

Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Myungjoo Ham myungjoo@samsung.com
---
 drivers/cpufreq/cpufreq_governor.h|   1 +
 drivers/cpufreq/cpufreq_performance.c | 156 +-
 2 files changed, 154 insertions(+), 3 deletions(-)

diff --git a/drivers/cpufreq/cpufreq_governor.h 
b/drivers/cpufreq/cpufreq_governor.h
index 55ef8c6..7ad4d3b 100644
--- a/drivers/cpufreq/cpufreq_governor.h
+++ b/drivers/cpufreq/cpufreq_governor.h
@@ -198,6 +198,7 @@ struct common_dbs_data {
/* Common across governors */
#define GOV_ONDEMAND0
#define GOV_CONSERVATIVE1
+   #define GOV_PERFORMANCE 2
int governor;
struct attribute_group *attr_group_gov_sys; /* one governor - system */
struct attribute_group *attr_group_gov_pol; /* one governor - policy */
diff --git a/drivers/cpufreq/cpufreq_performance.c 
b/drivers/cpufreq/cpufreq_performance.c
index ceee068..15195fc9 100644
--- a/drivers/cpufreq/cpufreq_performance.c
+++ b/drivers/cpufreq/cpufreq_performance.c
@@ -17,10 +17,158 @@
 #include linux/cpufreq.h
 #include linux/init.h
 
+#ifdef CONFIG_CPU_FREQ_STAT
+
+#include linux/kernel_stat.h
+#include linux/slab.h
+
+#include cpufreq_governor.h
+
+#define pf_cpu_dbs_info_s  cpu_dbs_info_s
+#define pf_dbs_tuners  dbs_tuners
+
+static DEFINE_PER_CPU(struct pf_cpu_dbs_info_s, pf_cpu_dbs_info);
+static struct common_dbs_data pf_dbs_cdata;
+
+static ssize_t store_sampling_rate(struct dbs_data *dbs_data, const char *buf,
+   size_t count)
+{
+   struct pf_dbs_tuners *tuners = dbs_data-tuners;
+   unsigned int input;
+   int ret;
+   ret = sscanf(buf, %u, input);
+
+   if (ret != 1)
+   return -EINVAL;
+
+   tuners-sampling_rate = max(input, dbs_data-min_sampling_rate);
+   return count;
+}
+
+static ssize_t store_ignore_nice(struct dbs_data *dbs_data, const char *buf,
+   size_t count)
+{
+   struct pf_dbs_tuners *tuners = dbs_data-tuners;
+   unsigned int input, j;
+   int ret;
+
+   ret = sscanf(buf, %u, input);
+   if (ret != 1)
+   return -EINVAL;
+
+   if (input  1)
+   input = 1;
+
+   if (input == tuners-ignore_nice) /* nothing to do */
+   return count;
+
+   tuners-ignore_nice = input;
+
+   /* we need to re-evaluate prev_cpu_idle */
+   for_each_online_cpu(j) {
+   struct pf_cpu_dbs_info_s *dbs_info;
+   dbs_info = per_cpu(pf_cpu_dbs_info, j);
+   dbs_info-cdbs.prev_cpu_idle = get_cpu_idle_time(j,
+   dbs_info-cdbs.prev_cpu_wall, 0);
+   if (tuners-ignore_nice)
+   dbs_info-cdbs.prev_cpu_nice =
+   kcpustat_cpu(j).cpustat[CPUTIME_NICE];
+   }
+   return count;
+}
+
+show_store_one(pf, sampling_rate);
+show_store_one(pf, ignore_nice);
+declare_show_sampling_rate_min(pf);
+
+gov_sys_pol_attr_rw(sampling_rate);
+gov_sys_pol_attr_rw(ignore_nice);
+gov_sys_pol_attr_ro(sampling_rate_min);
+
+static struct attribute *dbs_attributes_gov_sys[] = {
+   sampling_rate_min_gov_sys.attr,
+   sampling_rate_gov_sys.attr,
+   ignore_nice_gov_sys.attr,
+   NULL
+};
+
+static struct attribute_group pf_attr_group_gov_sys = {
+   .attrs = dbs_attributes_gov_sys,
+   .name = performance,
+};
+
+static struct attribute *dbs_attributes_gov_pol[] = {
+   sampling_rate_min_gov_pol.attr,
+   sampling_rate_gov_pol.attr,
+   ignore_nice_gov_pol.attr,
+   NULL
+};
+
+static struct attribute_group pf_attr_group_gov_pol = {
+   .attrs = dbs_attributes_gov_pol,
+   .name = performance,
+};
+
+static void pf_dbs_timer(struct work_struct *work)
+{
+   struct pf_cpu_dbs_info_s *dbs_info = container_of(work,
+   struct pf_cpu_dbs_info_s, cdbs.work.work);
+   unsigned int cpu = dbs_info-cdbs.cur_policy-cpu;
+   struct dbs_data *dbs_data = dbs_info-cdbs.cur_policy-governor_data;
+   unsigned int delay = 0;
+
+   delay = usecs_to_jiffies(dbs_data-min_sampling_rate);
+
+   mutex_lock(dbs_info-cdbs.timer_mutex);
+   dbs_check_cpu(dbs_data, cpu);
+   gov_queue_work(dbs_data, dbs_info-cdbs.cur_policy, delay, false);
+   mutex_unlock(dbs_info-cdbs.timer_mutex);
+}
+
+static int pf_init(struct dbs_data *dbs_data)
+{
+   struct pf_dbs_tuners *tuners;
+
+   tuners = 

[PATCH 0/6] cpufreq: Add 'load_table' debugfs file to show colleced CPUs load

2013-07-05 Thread Chanwoo Choi
This patchset add 'load_table' debugfs file to provide collected CPUs data.
The load_table debugfs file gives below CPU datas.
- measured time
- old CPU frequency
- new CPU frequency
- each CPU load

These data will mean the change of CPU frequency according to CPUs load at
specific measured time. Also, the user can determine the storage size of 
colleced
CPUs data. The range is from 10 to 1000.

Second, previous performance/powersave governor haven't calculated CPUs load
becuase these governor didn't change CPU frequency according to CPUs load. But,
load_table debugfs file always should indicate the collected CPUs data 
regardless
of the kind of cpufreq governor. So, the patch3/4/5 implement that performance/
powersave governor will check periodically CPUs load by calling dbs_check_cpu()
with timer.

Finally, the patch 6 explain the detailed description of load_table debugfs 
file.

Thanks,
Chanwoo Choi

[Test Result]
- the kind of SoC : Samsung EXYNOS4412
- a range of frequency : 200 ~ 1400MHz

- Ondemand governor and the number of online CPU is 4
Time(ms)   Old Freq(Hz) New Freq(Hz) CPU0 CPU1 CPU2 CPU3
23820  50   50   53   86   273   
23920  50   40   66   40   042   
24020  40   40   71   71   10   52   
24120  40   30   33   27   45   65   
24220  30   30   437   71   34   
24320  30   30   185   38   16   
24420  30   20   641   15   51   
24520  20   20   12   62   151   
24620  20   20   951   058   
24720  20   20   32   32   11   27 

- Performance governor and the number of online CPU is 4
Time(ms)   Old Freq(Hz) New Freq(Hz) CPU0 CPU1 CPU2 CPU3 
3425930140  140  0000
3425945140  140  0000
3425960140  140  0000
3427105140  140  0000
3427109140  140  0033   100  
3428135140  140  0000
3428425140  140  0000
3429385140  140  0000
3429400140  140  0000
3429415140  140  0000

- Powersave governor and the number of online CPU is 4
Time(ms)   Old Freq(Hz) New Freq(Hz) CPU0 CPU1 CPU2 CPU3 
345194520   20   3002
345393020   20   0101
345394520   20   2200
345396020   20   1010
345506520   20   0000
345507520   20   1510
345557020   20   0000
345560520   20   0003
345635020   20   0000
345636020   20   41   239   43   

- Powersave governor and the number of online CPU is 2 (CPU[1-2] is offline)
Time(ms)   Old Freq(Hz) New Freq(Hz) CPU0 CPU3 
350193020   20   00
350204020   20   00
350210020   20   75   16   
350257520   20   00
350302520   20   11   2
350310020   20   62   14   
350345520   20   10
350393020   20   39
350400020   20   65   15   
350444020   20   10

Chanwoo Choi (6):
  cpufreq: Add debugfs directory for cpufreq
  cpufreq: stats: Add 'load_table' debugfs file to show accumulated data of CPUs
  cpufreq: Update governor core to support all governors
  cpufreq: performance: Add support to collect CPUs load periodically
  cpufreq: powersave: Add support to collect CPUs load periodically
  Documentation: cpufreq: load_table: Update load_table debugfs file 
documentation

 Documentation/cpu-freq/cpufreq-stats.txt |  39 -
 drivers/cpufreq/Kconfig  |   6 +
 drivers/cpufreq/cpufreq.c|  61 
 drivers/cpufreq/cpufreq_governor.c   |  37 -
 drivers/cpufreq/cpufreq_governor.h   |  11 ++
 drivers/cpufreq/cpufreq_performance.c| 156 ++-
 drivers/cpufreq/cpufreq_powersave.c  | 158 ++-
 drivers/cpufreq/cpufreq_stats.c  | 256 ---
 include/linux/cpufreq.h  |   7 +
 9 files changed, 692 insertions(+), 39 deletions(-)

-- 
1.8.0

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[PATCH 3/6] cpufreq: Update governor core to support all governors

2013-07-05 Thread Chanwoo Choi
The cpufreq_governor.c only support ondemand and conservative governor.
So, this patch update governor core to support all governors.

Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Myungjoo Ham myungjoo@samsung.com
---
 drivers/cpufreq/cpufreq_governor.c | 24 +++-
 drivers/cpufreq/cpufreq_governor.h |  9 +
 2 files changed, 28 insertions(+), 5 deletions(-)

diff --git a/drivers/cpufreq/cpufreq_governor.c 
b/drivers/cpufreq/cpufreq_governor.c
index 3e73107..ea282f8 100644
--- a/drivers/cpufreq/cpufreq_governor.c
+++ b/drivers/cpufreq/cpufreq_governor.c
@@ -86,6 +86,7 @@ void dbs_check_cpu(struct dbs_data *dbs_data, int cpu)
struct cpu_dbs_common_info *cdbs = dbs_data-cdata-get_cpu_cdbs(cpu);
struct od_dbs_tuners *od_tuners = dbs_data-tuners;
struct cs_dbs_tuners *cs_tuners = dbs_data-tuners;
+   struct cs_dbs_tuners *tuners = dbs_data-tuners;
struct cpufreq_policy *policy;
 #ifdef CONFIG_CPU_FREQ_STAT
struct cpufreq_freqs freq = {0};
@@ -96,8 +97,10 @@ void dbs_check_cpu(struct dbs_data *dbs_data, int cpu)
 
if (dbs_data-cdata-governor == GOV_ONDEMAND)
ignore_nice = od_tuners-ignore_nice;
-   else
+   else if (dbs_data-cdata-governor == GOV_CONSERVATIVE)
ignore_nice = cs_tuners-ignore_nice;
+   else
+   ignore_nice = tuners-ignore_nice;
 
policy = cdbs-cur_policy;
 
@@ -174,7 +177,8 @@ void dbs_check_cpu(struct dbs_data *dbs_data, int cpu)
cpufreq_notify_transition(policy, freq, CPUFREQ_LOADCHECK);
 #endif
 
-   dbs_data-cdata-gov_check_cpu(cpu, max_load);
+   if (dbs_data-cdata-gov_check_cpu)
+   dbs_data-cdata-gov_check_cpu(cpu, max_load);
 }
 EXPORT_SYMBOL_GPL(dbs_check_cpu);
 
@@ -239,9 +243,12 @@ static void set_sampling_rate(struct dbs_data *dbs_data,
if (dbs_data-cdata-governor == GOV_CONSERVATIVE) {
struct cs_dbs_tuners *cs_tuners = dbs_data-tuners;
cs_tuners-sampling_rate = sampling_rate;
-   } else {
+   } else if (dbs_data-cdata-governor == GOV_ONDEMAND) {
struct od_dbs_tuners *od_tuners = dbs_data-tuners;
od_tuners-sampling_rate = sampling_rate;
+   } else {
+   struct dbs_tuners *tuners = dbs_data-tuners;
+   tuners-sampling_rate = sampling_rate;
}
 }
 
@@ -251,9 +258,11 @@ int cpufreq_governor_dbs(struct cpufreq_policy *policy,
struct dbs_data *dbs_data;
struct od_cpu_dbs_info_s *od_dbs_info = NULL;
struct cs_cpu_dbs_info_s *cs_dbs_info = NULL;
+   struct cpu_dbs_info_s *dbs_info = NULL;
struct od_ops *od_ops = NULL;
struct od_dbs_tuners *od_tuners = NULL;
struct cs_dbs_tuners *cs_tuners = NULL;
+   struct dbs_tuners *tuners = NULL;
struct cpu_dbs_common_info *cpu_cdbs;
unsigned int sampling_rate, latency, ignore_nice, j, cpu = policy-cpu;
int io_busy = 0;
@@ -353,13 +362,18 @@ int cpufreq_governor_dbs(struct cpufreq_policy *policy,
cs_dbs_info = dbs_data-cdata-get_cpu_dbs_info_s(cpu);
sampling_rate = cs_tuners-sampling_rate;
ignore_nice = cs_tuners-ignore_nice;
-   } else {
+   } else if (dbs_data-cdata-governor == GOV_ONDEMAND) {
od_tuners = dbs_data-tuners;
od_dbs_info = dbs_data-cdata-get_cpu_dbs_info_s(cpu);
sampling_rate = od_tuners-sampling_rate;
ignore_nice = od_tuners-ignore_nice;
od_ops = dbs_data-cdata-gov_ops;
io_busy = od_tuners-io_is_busy;
+   } else {
+   tuners = dbs_data-tuners;
+   dbs_info = dbs_data-cdata-get_cpu_dbs_info_s(cpu);
+   sampling_rate = tuners-sampling_rate;
+   ignore_nice = tuners-ignore_nice;
}
 
switch (event) {
@@ -394,7 +408,7 @@ int cpufreq_governor_dbs(struct cpufreq_policy *policy,
cs_dbs_info-down_skip = 0;
cs_dbs_info-enable = 1;
cs_dbs_info-requested_freq = policy-cur;
-   } else {
+   } else if (dbs_data-cdata-governor == GOV_ONDEMAND) {
od_dbs_info-rate_mult = 1;
od_dbs_info-sample_type = OD_NORMAL_SAMPLE;
od_ops-powersave_bias_init_cpu(cpu);
diff --git a/drivers/cpufreq/cpufreq_governor.h 
b/drivers/cpufreq/cpufreq_governor.h
index e16a961..55ef8c6 100644
--- a/drivers/cpufreq/cpufreq_governor.h
+++ b/drivers/cpufreq/cpufreq_governor.h
@@ -163,6 +163,10 @@ struct cs_cpu_dbs_info_s {
unsigned int enable:1;
 };
 
+struct cpu_dbs_info_s {
+   struct cpu_dbs_common_info cdbs;
+};
+
 /* Per policy Governers sysfs tunables */
 struct od_dbs_tuners {
unsigned int ignore_nice;
@@ -183,6 +187,11 @@ struct 

[PATCH v5 2/6] cpufreq: stats: Add 'load_table' debugfs file to show accumulated data of CPUs

2013-07-05 Thread Chanwoo Choi
This patch add new 'load_table' debugfs file to show previous accumulated data
of CPUs load as following path and add CPUFREQ_LOADCHECK notification to
CPUFREQ_TRANSITION_NOTIFIER notifier chain.
- /sys/kernel/debug/cpufreq/cpuX/load_table

When governor calculates CPUs load on dbs_check_cpu(), governor send
CPUFREQ_LOADCHECK notification with CPUs load, so that cpufreq_stats
accumulates calculated CPUs load on 'load_table' storage.

This debugfs file is used to judge the correct system state or determine
suitable system resource according to current CPUs load on user-space.

This debugfs file include following data:
- Measurement point of time
- CPU frequency
- Per-CPU load

Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Myungjoo Ham myungjoo@samsung.com
---
Changes since v4:
- Reset the data of CPUs load when cpufreq governor is performance or powersave
- Move code about creating debugfs directory to below first patch
: [PATCH 1/2] cpufreq: Add debugfs directory for cpufreq

Changes since v3:
- Extend a range of accumulated data (10 ~ 1000)
- Add unit information of time/freq and align 'Time' field as left for 
readability
- Use CONFIG_CPU_FREQ_STAT depdendency instead of CONFIG_CPU_FREQ_STAT_DETATILS
- Initialize load of offline CPUx as zero(0)
- Create/remove debugfs root directory on cpufreq_stats_init/exit() because
  debugfs root is used on all CPUs.

Changes since v2:
- Code clean according to Viresh Kumar's comment
- Show both old frequency and new frequency on 'load_table' debugfs file
- Change debufs file patch as below
  old: /sys/kernel/debugfs/cpufreq/load_table
  new: /sys/kernel/debugfs/cpufreq/cpuX/load_table

Changes since v1:
- Set maximum storage size to save CPUs load on Kconfig
- Use spinlock to synchronize read/write operation for CPUs load
- Use local variable instead of global variable(struct cpufreq_freqs *freqs)
- Use pointer of data structure to get correct size of data structure
  in sizeof() macro instead of structure name
  : sizeof(struct cpufreq_freqs) - sizeof(*stat-load_table)
- Change time unit from nanosecond to microsecond
- Remove unnecessary memory copy

Following Test result :
- Cpufreq governor : ondemand governor
- Test application : MP3 play + Picture Audo-slide application
- NR_CPU_LOAD_STORAGE : 10
- command : cat /sys/kernel/debug/cpufreq/cpu0/load_table

 drivers/cpufreq/Kconfig|   6 +
 drivers/cpufreq/cpufreq.c  |   4 +
 drivers/cpufreq/cpufreq_governor.c |  13 ++
 drivers/cpufreq/cpufreq_stats.c| 256 +
 include/linux/cpufreq.h|   6 +
 5 files changed, 261 insertions(+), 24 deletions(-)

diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
index 534fcb8..5c3f406 100644
--- a/drivers/cpufreq/Kconfig
+++ b/drivers/cpufreq/Kconfig
@@ -36,6 +36,12 @@ config CPU_FREQ_STAT
 
  If in doubt, say N.
 
+config NR_CPU_LOAD_STORAGE
+   int Maximum storage size to save CPU load (10-1000)
+   range 10 1000
+   depends on CPU_FREQ_STAT
+   default 10
+
 config CPU_FREQ_STAT_DETAILS
bool CPU frequency translation statistics details
depends on CPU_FREQ_STAT
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index bc01c8e..8a2c4c2 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -297,6 +297,10 @@ void __cpufreq_notify_transition(struct cpufreq_policy 
*policy,
if (likely(policy)  likely(policy-cpu == freqs-cpu))
policy-cur = freqs-new;
break;
+   case CPUFREQ_LOADCHECK:
+   srcu_notifier_call_chain(cpufreq_transition_notifier_list,
+   CPUFREQ_LOADCHECK, freqs);
+   break;
}
 }
 /**
diff --git a/drivers/cpufreq/cpufreq_governor.c 
b/drivers/cpufreq/cpufreq_governor.c
index dc9b72e..3e73107 100644
--- a/drivers/cpufreq/cpufreq_governor.c
+++ b/drivers/cpufreq/cpufreq_governor.c
@@ -87,6 +87,9 @@ void dbs_check_cpu(struct dbs_data *dbs_data, int cpu)
struct od_dbs_tuners *od_tuners = dbs_data-tuners;
struct cs_dbs_tuners *cs_tuners = dbs_data-tuners;
struct cpufreq_policy *policy;
+#ifdef CONFIG_CPU_FREQ_STAT
+   struct cpufreq_freqs freq = {0};
+#endif
unsigned int max_load = 0;
unsigned int ignore_nice;
unsigned int j;
@@ -148,6 +151,9 @@ void dbs_check_cpu(struct dbs_data *dbs_data, int cpu)
continue;
 
load = 100 * (wall_time - idle_time) / wall_time;
+#ifdef CONFIG_CPU_FREQ_STAT
+   freq.load[j] = load;
+#endif
 
if (dbs_data-cdata-governor == GOV_ONDEMAND) {
int freq_avg = __cpufreq_driver_getavg(policy, j);
@@ -161,6 +167,13 @@ void dbs_check_cpu(struct dbs_data *dbs_data, int cpu)
max_load = load;
}
 
+#ifdef CONFIG_CPU_FREQ_STAT
+ 

[PATCH 6/6] Documentation: cpufreq: load_table: Update load_table debugfs file documentation

2013-07-05 Thread Chanwoo Choi
This patch add the detailed description of 'load_table' debugfs file to show
collected CPUs load and the change of CPU frequency.

Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Myungjoo Ham myungjoo@samsung.com
---
 Documentation/cpu-freq/cpufreq-stats.txt | 39 
 1 file changed, 35 insertions(+), 4 deletions(-)

diff --git a/Documentation/cpu-freq/cpufreq-stats.txt 
b/Documentation/cpu-freq/cpufreq-stats.txt
index fc64749..8c2e4f2 100644
--- a/Documentation/cpu-freq/cpufreq-stats.txt
+++ b/Documentation/cpu-freq/cpufreq-stats.txt
@@ -18,10 +18,12 @@ Contents
 1. Introduction
 
 cpufreq-stats is a driver that provides CPU frequency statistics for each CPU.
-These statistics are provided in /sysfs as a bunch of read_only interfaces. 
This
-interface (when configured) will appear in a separate directory under cpufreq
-in /sysfs (sysfs root/devices/system/cpu/cpuX/cpufreq/stats/) for each CPU.
-Various statistics will form read_only files under this directory.
+These statistics are provided in /sysfs and /debugfs as a bunch of read_only
+interfaces. This interface (when configured) will appear in a separate 
directory
+under cpufreq in below directory list for each CPU. Various statistics will 
form
+read_only files under this directory.
+- /sysfs (sysfs root/devices/system/cpu/cpuX/cpufreq/stats/)
+- /debugfs (sysfs root/kernel/debug/cpufreq/cpuX/)
 
 This driver is designed to be independent of any particular cpufreq_driver
 that may be running on your CPU. So, it will work with any cpufreq_driver.
@@ -33,6 +35,7 @@ cpufreq stats provides following statistics (explained in 
detail below).
 -  time_in_state
 -  total_trans
 -  trans_table
+-  load_table
 
 All the statistics will be from the time the stats driver has been inserted 
 to the time when a read of a particular statistic is done. Obviously, stats 
@@ -95,6 +98,28 @@ contains the actual freq values for each row and column for 
better readability.
   280: 0 0 0 2 0 
 

 
+-  load_table
+This gives the collected CPUs data which include measured time, old CPU
+frequency, new CPU frequency and each CPU load. The cat output will have
+measured time old CPU frequency new CPU frequency CPUs load ... pair
+in each line, which will mean the change of CPU frequency according to CPUs 
load
+at measured time.
+
+
+mysystem:/sys/kernel/debug/cpufreq/cpu0 # cat load_table
+Time(ms)   Old Freq(Hz) New Freq(Hz) CPU0 CPU1 CPU2 CPU3
+23820  50   50   53   86   273
+23920  50   40   66   40   042
+24020  40   40   71   71   10   52
+24120  40   30   33   27   45   65
+24220  30   30   437   71   34
+24320  30   30   185   38   16
+24420  30   20   641   15   51
+24520  20   20   12   62   151
+24620  20   20   951   058
+24720  20   20   32   32   11   27
+
+
 
 3. Configuring cpufreq-stats
 
@@ -104,6 +129,7 @@ Config Main Menu
CPU Frequency scaling  ---
[*] CPU Frequency scaling
*   CPU frequency translation statistics 
+   (10)Maximum storage size to save CPU load (10-1000)
[*] CPU frequency translation statistics details
 
 
@@ -113,6 +139,11 @@ cpufreq-stats.
 CPU frequency translation statistics (CONFIG_CPU_FREQ_STAT) provides the
 basic statistics which includes time_in_state and total_trans.
 
+Maximum storage size to save CPU load (10-1000) (depends on CONFIG_CPU_FREQ_
+STAT) indicates the total number of load_table data and provides collected data
+which include old cpu frequency, new cpu frequency and CPUs load. The user can
+determine the storage size of collected CPUs data. The range is from 10 to 
1000.
+
 CPU frequency translation statistics details (CONFIG_CPU_FREQ_STAT_DETAILS)
 provides fine grained cpufreq stats by trans_table. The reason for having a
 separate config option for trans_table is:
-- 
1.8.0

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[PATCH 1/6] cpufreq: Add debugfs directory for cpufreq

2013-07-05 Thread Chanwoo Choi
This patch create debugfs root directory and child directory according to
the number of CPUs for CPUFreq as below debugfs directory path:
- /sys/kernel/debug/cpufreq/cpuX

If many CPUs share only one cpufreq policy, other CPU(except for CPU0) create
a link for debugfs directory of CPU0.
- /sys/kernel/debug/cpufreq/cpu0
- /sys/kernel/debug/cpufreq/cpu[1-(N-1)] - /sys/kernel/debug/cpufreq/cpu0

And then cpufreq may need to create debugfs specific file below of debugfs
directory of cpufreq. (e.g., /sys/kernel/debug/cpufreq/cpu0/load_table)

Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Myungjoo Ham myungjoo@samsung.com
---
 drivers/cpufreq/cpufreq.c | 57 +++
 include/linux/cpufreq.h   |  1 +
 2 files changed, 58 insertions(+)

diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 2d53f47..bc01c8e 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -23,6 +23,7 @@
 #include linux/notifier.h
 #include linux/cpufreq.h
 #include linux/delay.h
+#include linux/debugfs.h
 #include linux/interrupt.h
 #include linux/spinlock.h
 #include linux/device.h
@@ -47,6 +48,10 @@ static DEFINE_PER_CPU(char[CPUFREQ_NAME_LEN], 
cpufreq_cpu_governor);
 #endif
 static DEFINE_RWLOCK(cpufreq_driver_lock);
 
+/* The cpufreq_debugfs is used to create debugfs root directory for CPUFreq. */
+#define MAX_DEBUGFS_NAME_LEN   CPUFREQ_NAME_LEN
+static struct dentry *cpufreq_debugfs;
+
 /*
  * cpu_policy_rwsem is a per CPU reader-writer semaphore designed to cure
  * all cpufreq/hotplug/workqueue/etc related lock issues.
@@ -726,6 +731,20 @@ static int cpufreq_add_dev_symlink(unsigned int cpu,
cpufreq_cpu_put(managed_policy);
return ret;
}
+
+   if (cpufreq_debugfs) {
+   char symlink_name[MAX_DEBUGFS_NAME_LEN];
+   char target_name[MAX_DEBUGFS_NAME_LEN];
+
+   sprintf(symlink_name, cpu%d, j);
+   sprintf(target_name, ./cpu%d, cpu);
+   managed_policy-cpu_debugfs[j] = debugfs_create_symlink(
+   symlink_name,
+   cpufreq_debugfs,
+   target_name);
+   if (!managed_policy-cpu_debugfs[j])
+   pr_debug(creating debugfs symlink failed\n);
+   }
}
return ret;
 }
@@ -746,6 +765,22 @@ static int cpufreq_add_dev_interface(unsigned int cpu,
if (ret)
return ret;
 
+   /* prepare interface data for debugfs */
+   if (cpufreq_debugfs) {
+   char name[MAX_DEBUGFS_NAME_LEN];
+   int size, i;
+
+   sprintf(name, cpu%d, policy-cpu);
+   size = sizeof(struct dentry*) * NR_CPUS;
+   i = cpu;
+
+   policy-cpu_debugfs = devm_kzalloc(dev, size, GFP_KERNEL);
+   policy-cpu_debugfs[i] = debugfs_create_dir(name,
+   cpufreq_debugfs);
+   if (!policy-cpu_debugfs[i])
+   pr_debug(creating debugfs directory failed\n);
+   }
+
/* set up files for this cpu device */
drv_attr = cpufreq_driver-attr;
while ((drv_attr)  (*drv_attr)) {
@@ -839,6 +874,20 @@ static int cpufreq_add_policy_cpu(unsigned int cpu, 
unsigned int sibling,
return ret;
}
 
+   if (cpufreq_debugfs) {
+   char symlink_name[MAX_DEBUGFS_NAME_LEN];
+   char target_name[MAX_DEBUGFS_NAME_LEN];
+
+   sprintf(symlink_name, cpu%d, cpu);
+   sprintf(target_name, ./cpu%d, sibling);
+   policy-cpu_debugfs[cpu] = debugfs_create_symlink(
+   symlink_name,
+   cpufreq_debugfs,
+   target_name);
+   if (!policy-cpu_debugfs[cpu])
+   pr_debug(creating debugfs symlink failed\n);
+   }
+
return 0;
 }
 #endif
@@ -1046,6 +1095,7 @@ static int __cpufreq_remove_dev(struct device *dev, 
struct subsys_interface *sif
 
if (cpu != data-cpu) {
sysfs_remove_link(dev-kobj, cpufreq);
+   debugfs_remove(data-cpu_debugfs[cpu]);
} else if (cpus  1) {
/* first sibling now owns the new sysfs dir */
cpu_dev = get_cpu_device(cpumask_first(data-cpus));
@@ -1068,6 +1118,9 @@ static int __cpufreq_remove_dev(struct device *dev, 
struct subsys_interface *sif
return -EINVAL;
}
 
+   debugfs_remove_recursive(data-cpu_debugfs[cpu]);
+   

[PATCH 5/6] cpufreq: powersave: Add support to collect CPUs load periodically

2013-07-05 Thread Chanwoo Choi
This patch collect CPUs load and create create basic sysfs file as below:
- /sys/devices/system/cpu/cpufreq/powersave/ignore_nice (rw)
- /sys/devices/system/cpu/cpufreq/powersave/sampling_rate (rw)
- /sys/devices/system/cpu/cpufreq/powersave/sampling_rate_min (r)

Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Myungjoo Ham myungjoo@samsung.com
---
 drivers/cpufreq/cpufreq_governor.h  |   1 +
 drivers/cpufreq/cpufreq_powersave.c | 158 +++-
 2 files changed, 156 insertions(+), 3 deletions(-)

diff --git a/drivers/cpufreq/cpufreq_governor.h 
b/drivers/cpufreq/cpufreq_governor.h
index 7ad4d3b..a926c74 100644
--- a/drivers/cpufreq/cpufreq_governor.h
+++ b/drivers/cpufreq/cpufreq_governor.h
@@ -199,6 +199,7 @@ struct common_dbs_data {
#define GOV_ONDEMAND0
#define GOV_CONSERVATIVE1
#define GOV_PERFORMANCE 2
+   #define GOV_POWERSAVE   3
int governor;
struct attribute_group *attr_group_gov_sys; /* one governor - system */
struct attribute_group *attr_group_gov_pol; /* one governor - policy */
diff --git a/drivers/cpufreq/cpufreq_powersave.c 
b/drivers/cpufreq/cpufreq_powersave.c
index 2d948a1..39c7857 100644
--- a/drivers/cpufreq/cpufreq_powersave.c
+++ b/drivers/cpufreq/cpufreq_powersave.c
@@ -17,9 +17,159 @@
 #include linux/cpufreq.h
 #include linux/init.h
 
+#ifdef CONFIG_CPU_FREQ_STAT
+
+#include linux/kernel_stat.h
+#include linux/slab.h
+
+#include cpufreq_governor.h
+
+#define ps_cpu_dbs_info_s  cpu_dbs_info_s
+#define ps_dbs_tuners  dbs_tuners
+
+static DEFINE_PER_CPU(struct cpu_dbs_info_s, ps_cpu_dbs_info);
+static struct common_dbs_data ps_dbs_cdata;
+
+static ssize_t store_sampling_rate(struct dbs_data *dbs_data, const char *buf,
+   size_t count)
+{
+   struct dbs_tuners *tuners = dbs_data-tuners;
+   unsigned int input;
+   int ret;
+   ret = sscanf(buf, %u, input);
+
+   if (ret != 1)
+   return -EINVAL;
+
+   tuners-sampling_rate = max(input, dbs_data-min_sampling_rate);
+   return count;
+}
+
+static ssize_t store_ignore_nice(struct dbs_data *dbs_data, const char *buf,
+   size_t count)
+{
+   struct dbs_tuners *tuners = dbs_data-tuners;
+   unsigned int input, j;
+   int ret;
+
+   ret = sscanf(buf, %u, input);
+   if (ret != 1)
+   return -EINVAL;
+
+   if (input  1)
+   input = 1;
+
+   if (input == tuners-ignore_nice) /* nothing to do */
+   return count;
+
+   tuners-ignore_nice = input;
+
+   /* we need to re-evaluate prev_cpu_idle */
+   for_each_online_cpu(j) {
+   struct ps_cpu_dbs_info_s *dbs_info;
+   dbs_info = per_cpu(ps_cpu_dbs_info, j);
+   dbs_info-cdbs.prev_cpu_idle = get_cpu_idle_time(j,
+   dbs_info-cdbs.prev_cpu_wall, 0);
+   if (tuners-ignore_nice)
+   dbs_info-cdbs.prev_cpu_nice =
+   kcpustat_cpu(j).cpustat[CPUTIME_NICE];
+   }
+   return count;
+}
+
+show_store_one(ps, sampling_rate);
+show_store_one(ps, ignore_nice);
+declare_show_sampling_rate_min(ps);
+
+gov_sys_pol_attr_rw(sampling_rate);
+gov_sys_pol_attr_rw(ignore_nice);
+gov_sys_pol_attr_ro(sampling_rate_min);
+
+static struct attribute *dbs_attributes_gov_sys[] = {
+   sampling_rate_min_gov_sys.attr,
+   sampling_rate_gov_sys.attr,
+   ignore_nice_gov_sys.attr,
+   NULL
+};
+
+static struct attribute_group ps_attr_group_gov_sys = {
+   .attrs = dbs_attributes_gov_sys,
+   .name = powersave,
+};
+
+static struct attribute *dbs_attributes_gov_pol[] = {
+   sampling_rate_min_gov_pol.attr,
+   sampling_rate_gov_pol.attr,
+   ignore_nice_gov_pol.attr,
+   NULL
+};
+
+static struct attribute_group ps_attr_group_gov_pol = {
+   .attrs = dbs_attributes_gov_pol,
+   .name = powersave,
+};
+
+static void ps_dbs_timer(struct work_struct *work)
+{
+   struct cpu_dbs_info_s *dbs_info = container_of(work,
+   struct cpu_dbs_info_s, cdbs.work.work);
+   unsigned int cpu = dbs_info-cdbs.cur_policy-cpu;
+   struct dbs_data *dbs_data = dbs_info-cdbs.cur_policy-governor_data;
+   struct dbs_tuners *tuners = dbs_data-tuners;
+   unsigned int delay = 0;
+
+   delay = max(tuners-sampling_rate, dbs_data-min_sampling_rate);
+   delay = usecs_to_jiffies(delay);
+
+   mutex_lock(dbs_info-cdbs.timer_mutex);
+   dbs_check_cpu(dbs_data, cpu);
+   gov_queue_work(dbs_data, dbs_info-cdbs.cur_policy, delay, false);
+   mutex_unlock(dbs_info-cdbs.timer_mutex);
+}
+
+static int ps_init(struct dbs_data *dbs_data)
+{
+   struct dbs_tuners *tuners;
+
+   tuners = kzalloc(sizeof(struct dbs_tuners), GFP_KERNEL);
+   if (!tuners) {
+   

Re: [PATCH v2 4/7] perf, x86: Save/resotre LBR stack during context switch

2013-07-05 Thread Yan, Zheng
On 07/05/2013 04:15 PM, Peter Zijlstra wrote:
 On Fri, Jul 05, 2013 at 01:36:24PM +0800, Yan, Zheng wrote:
 On 07/04/2013 08:45 PM, Peter Zijlstra wrote:
 On Mon, Jul 01, 2013 at 03:23:04PM +0800, Yan, Zheng wrote:

 @@ -2488,25 +2508,31 @@ static void perf_branch_stack_sched_in(struct 
 task_struct *prev,
  
list_for_each_entry_rcu(pmu, pmus, entry) {
cpuctx = this_cpu_ptr(pmu-pmu_cpu_context);
 +  task_ctx = cpuctx-task_ctx;
  
/*
 -   * check if the context has at least one
 -   * event using PERF_SAMPLE_BRANCH_STACK
 +   * force flush the branch stack if there are cpu-wide events
 +   * using PERF_SAMPLE_BRANCH_STACK
 +   *
 +   * save/restore the branch stack if the task context has
 +   * at least one event using PERF_SAMPLE_BRANCH_STACK
 */
 -  if (cpuctx-ctx.nr_branch_stack  0
 -   pmu-flush_branch_stack) {
 -
 +  bool force_flush = cpuctx-ctx.nr_branch_stack  0;
 +  if (pmu-branch_stack_sched 
 +  (force_flush ||
 +   (task_ctx  task_ctx-nr_branch_stack  0))) {
pmu = cpuctx-ctx.pmu;
  
 -  perf_ctx_lock(cpuctx, cpuctx-task_ctx);
 +  perf_ctx_lock(cpuctx, task_ctx);
  
perf_pmu_disable(pmu);
  
 -  pmu-flush_branch_stack();
 +  pmu-branch_stack_sched(task_ctx,
 +  sched_in, force_flush);
  
perf_pmu_enable(pmu);
  
 -  perf_ctx_unlock(cpuctx, cpuctx-task_ctx);
 +  perf_ctx_unlock(cpuctx, task_ctx);
}
}
  

 I never really like this; and yes I know I wrote part of that. Is there
 any way we can get rid of this and to it 'properly' through the events
 that get scheduled?

 After all; the LBR usage is through the events, so scheduling the events
 should also manage the LBR state.

 What is missing for that to work?


 the LBR is shared resource, can be used by multiple events at the same time.
 
 Yeah so? There's tons of shared resources in the PMU already.

we should restore the LBR callstack only when task schedule in. restoring the 
LBR
callstack at any other time will make the LBR callstack and actual callchain of 
program
mismatch. this property make the LBR different from counters.

 
 Strictly speaking,LBR is associated with task, not event.
 
 Wrong!, it _is_ associated with events. Events is all there is. Event can be
 associated with tasks, but that's completely irrelevant.
 
 One example is
 there are 5 events using the LBR stack feature, but there are only 4 
 counters.
 So these events need schedule. Saving/restoring LBR on the basis of event is
 clearly wrong.
 
 Different scheduling and you're wrong. Look at perf_rotate_context(), we'd
 disable everything at perf_pmu_disable() and enable the entire thing at
 perf_pmu_enable(), on both sides we'd have the LBR running.
 

yes,on both sides we'd have the LBR running. but there is no need to 
save/restore
the LBR stack in this case. we should save the LBR stack only when task 
schedule out,
and restore the LBR stack when task schedule in. So I think it's more natural to
manage the LBR state when switching perf task context.

Regards
Yan, Zheng 




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[3.5.y.z extended stable] Linux 3.5.7.16

2013-07-05 Thread Luis Henriques
I am announcing the release of the Linux 3.5.7.16 kernel.

The updated 3.5.y tree can be found at: 
  git://kernel.ubuntu.com/ubuntu/linux.git linux-3.5.y
and can be browsed at:
  
http://kernel.ubuntu.com/git?p=ubuntu/linux.git;h=refs/heads/linux-3.5.y;a=shortlog

The diff from v3.5.7.15 is posted as a follow-up to this email.

The 3.5.y extended stable tree is maintained by the Ubuntu Kernel Team.
For more info, see https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable

 -Luis

-- 
 Makefile |   2 +-
 arch/arm/include/asm/cacheflush.h|   4 +-
 arch/arm/mm/flush.c  |  33 
 arch/arm/mm/nommu.c  |   6 +
 arch/tile/lib/exports.c  |   2 +
 arch/x86/Kconfig |   1 +
 arch/x86/kvm/x86.c   |   5 +-
 drivers/bluetooth/btmrvl_main.c  |   9 +-
 drivers/clk/clk.c|   1 +
 drivers/gpu/drm/radeon/radeon_ring.c |   7 +
 drivers/input/touchscreen/cyttsp_core.c  |   2 +-
 drivers/net/bonding/bond_alb.c   |   6 +
 drivers/net/bonding/bonding.h|  13 ++
 drivers/net/ethernet/broadcom/tg3.c  |  38 +
 drivers/net/ethernet/freescale/gianfar_ptp.c |   1 +
 drivers/net/ethernet/realtek/8139cp.c|   1 +
 drivers/net/ethernet/realtek/r8169.c |  34 +++-
 drivers/net/ethernet/renesas/sh_eth.c|  15 +-
 drivers/net/team/team.c  |   2 +-
 drivers/net/team/team_mode_roundrobin.c  |   2 +
 drivers/net/wan/dlci.c   |  26 ++-
 drivers/net/wireless/iwlwifi/iwl-agn-rxon.c  |   2 +-
 drivers/scsi/qla2xxx/tcm_qla2xxx.c   |   6 +-
 drivers/target/iscsi/iscsi_target_erl0.c |   4 +-
 drivers/tty/serial/pch_uart.c|  29 +++-
 drivers/usb/serial/ti_usb_3410_5052.c|   3 +-
 drivers/usb/serial/ti_usb_3410_5052.h|   4 +-
 fs/exec.c|  16 +-
 fs/ncpfs/dir.c   |   9 --
 fs/ubifs/dir.c   |  54 +--
 include/linux/perf_event.h   |   3 +-
 include/linux/rculist_nulls.h|   7 +-
 include/linux/socket.h   |   3 +
 kernel/events/core.c | 233 ++-
 kernel/events/hw_breakpoint.c|   4 +-
 kernel/events/internal.h |   4 +
 net/bluetooth/l2cap_core.c   |   3 +
 net/compat.c |  13 +-
 net/ipv4/ip_gre.c|   2 +-
 net/ipv4/ipip.c  |   2 +-
 net/ipv4/tcp.c   |   7 +-
 net/ipv4/tcp_input.c |  23 +--
 net/ipv4/tcp_output.c|  10 +-
 net/ipv6/addrconf.c  |   4 +-
 net/ipv6/ip6_output.c|   2 +-
 net/l2tp/l2tp_ppp.c  |   6 +-
 net/netlabel/netlabel_domainhash.c   |  69 
 net/packet/af_packet.c   |   5 +-
 net/sctp/outqueue.c  |   8 +-
 net/sctp/socket.c|   6 +
 net/socket.c |  61 ---
 sound/usb/card.c |  22 ++-
 sound/usb/mixer.c|   1 +
 53 files changed, 630 insertions(+), 205 deletions(-)

Anders Hammarquist (1):
  USB: serial: ti_usb_3410_5052: new device id for Abbot strip port cable

Anderson Lizardo (1):
  Bluetooth: Fix crash in l2cap_build_cmd() with small MTU

Andy Lutomirski (2):
  net: Block MSG_CMSG_COMPAT in send(m)msg and recv(m)msg
  net: Unbreak compat_sys_{send,recv}msg

Artem Bityutskiy (2):
  UBIFS: prepare to fix a horrid bug
  UBIFS: fix a horrid bug

Chris Metcalf (1):
  tilepro: work around module link error with gcc 4.7

Clemens Ladisch (1):
  ALSA: usb-audio: work around Android accessory firmware bug

Daniel Borkmann (2):
  net: sctp: fix NULL pointer dereference in socket destruction
  packet: packet_getname_spkt: make sure string is always 0-terminated

Daniel Drake (1):
  Bluetooth: btmrvl: fix thread stopping race

Dave Chiluk (1):
  ncpfs: fix rmdir returns Device or resource busy

Eric Dumazet (5):
  tcp: fix tcp_md5_hash_skb_data()
  ipv6: fix possible crashes in ip6_cork_release()
  tcp: xps: fix reordering issues
  ip_tunnel: fix kernel panic with icmp_dest_unreach
  net: force a reload of first item in hlist_nulls_for_each_entry_rcu

Ferruh Yigit (1):
  Input: cyttsp - fix memcpy size param

Gao feng (1):
  ipv6: assign rt6_info to inet6_ifaddr in init_loopback

Gavin Shan (1):
  net/tg3: Avoid delay during MMIO access

Guillaume Nault (2):
  l2tp: Fix PPP header erasure and memory leak
  l2tp: Fix sendmsg() return value

Jerome Glisse (1):

[PATCH] of: match the compatible in the order set by the dts file

2013-07-05 Thread Huang Shijie
If we set the uart compatible in the dts file like this:
   --
compatible = fsl,imx6q-uart, fsl,imx21-uart;
   --

and we set the uart compatible in the uart driver like this:
   --
{ .compatible = fsl,imx1-uart, ... },
{ .compatible = fsl,imx21-uart, ... },
{ .compatible = fsl,imx6q-uart, ... },
{ /* sentinel */ }
   --

the current code will match the fsl,imx21-uart in the end.

Of course, this is not what we want. We want it to match the fsl,imx6q-uart.

This patch rewrites the match code, and make it to check the compatible
in the order set by the DTS file.

Signed-off-by: Huang Shijie b32...@freescale.com
---
 drivers/of/base.c |   29 +
 1 files changed, 25 insertions(+), 4 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index 0d61fc5..b13846b 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -622,10 +622,14 @@ static
 const struct of_device_id *__of_match_node(const struct of_device_id *matches,
   const struct device_node *node)
 {
+   struct of_device_id *old = (struct of_device_id *)matches;
+   const char *cp;
+   int cplen, l;
+
if (!matches)
return NULL;
 
-   while (matches-name[0] || matches-type[0] || matches-compatible[0]) {
+   while (matches-name[0] || matches-type[0]) {
int match = 1;
if (matches-name[0])
match = node-name
@@ -633,13 +637,30 @@ const struct of_device_id *__of_match_node(const struct 
of_device_id *matches,
if (matches-type[0])
match = node-type
 !strcmp(matches-type, node-type);
-   if (matches-compatible[0])
-   match = __of_device_is_compatible(node,
-  matches-compatible);
if (match)
return matches;
matches++;
}
+
+   /* Check the compatible in the order set by the DTS file. */
+   cp = __of_get_property(node, compatible, cplen);
+   if (!cp)
+   return NULL;
+
+   while (cplen  0) {
+   matches = old;
+
+   while (matches-compatible[0]) {
+   if (!of_compat_cmp(cp, matches-compatible,
+   strlen(matches-compatible)))
+   return matches;
+   matches++;
+   }
+
+   l = strlen(cp) + 1;
+   cp += l;
+   cplen -= l;
+   }
return NULL;
 }
 
-- 
1.7.1


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[PATCH] ACPI / power: add missing newline to debug messages

2013-07-05 Thread Mika Westerberg
There are few places in power.c where debug messages have no newline at the
end. Reading such debug messages from dmesg is not fun so fix this by
adding the missing newlines.

Signed-off-by: Mika Westerberg mika.westerb...@linux.intel.com
---
 drivers/acpi/power.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/acpi/power.c b/drivers/acpi/power.c
index 288bb27..5c28c89 100644
--- a/drivers/acpi/power.c
+++ b/drivers/acpi/power.c
@@ -279,7 +279,7 @@ static int acpi_power_on_unlocked(struct 
acpi_power_resource *resource)
 
if (resource-ref_count++) {
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- Power resource [%s] already on,
+ Power resource [%s] already on\n,
  resource-name));
} else {
result = __acpi_power_on(resource);
@@ -325,7 +325,7 @@ static int acpi_power_off_unlocked(struct 
acpi_power_resource *resource)
 
if (!resource-ref_count) {
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
- Power resource [%s] already off,
+ Power resource [%s] already off\n,
  resource-name));
return 0;
}
-- 
1.8.3.2

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[PATCH RFC] genirq: Genric chip: Use DIV_ROUND_UP to count numchips

2013-07-05 Thread Axel Lin
The number of interrupts in a domain may be not divisible by the number of
interrupts each chip handles.
Integer division may truncate the result, thus use DIV_ROUND_UP to count
numchips.

Signed-off-by: Axel Lin axel@ingics.com
---
Seems all users of irq_alloc_domain_generic_chips() in current code do not
have this issue. I just found the issue while reading the code.

In the commit 02c981c0 of ARM: CSR: Adding CSR SiRFprimaII board support
It set SIRFSOC_INTENAL_IRQ_END to 59.
So I think this might be a possible case for some hardware.

 kernel/irq/generic-chip.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index 10e663a..452d6f2 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -275,7 +275,7 @@ int irq_alloc_domain_generic_chips(struct irq_domain *d, 
int irqs_per_chip,
if (d-gc)
return -EBUSY;
 
-   numchips = d-revmap_size / irqs_per_chip;
+   numchips = DIV_ROUND_UP(d-revmap_size, irqs_per_chip);
if (!numchips)
return -EINVAL;
 
-- 
1.8.1.2



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[tip:timers/core] clocksource: Reselect clocksource when watchdog validated high-res capability

2013-07-05 Thread tip-bot for Thomas Gleixner
Commit-ID:  332962f2c88868ed3cdab466870baaa34dd58612
Gitweb: http://git.kernel.org/tip/332962f2c88868ed3cdab466870baaa34dd58612
Author: Thomas Gleixner t...@linutronix.de
AuthorDate: Thu, 4 Jul 2013 22:46:45 +0200
Committer:  Thomas Gleixner t...@linutronix.de
CommitDate: Fri, 5 Jul 2013 11:09:28 +0200

clocksource: Reselect clocksource when watchdog validated high-res capability

Up to commit 5d33b883a (clocksource: Always verify highres capability)
we had no sanity check when selecting a clocksource, which prevented
that a non highres capable clocksource is used when the system already
switched to highres/nohz mode.

The new sanity check works as Alex and Tim found out. It prevents the
TSC from being used. This happens because on x86 the boot process
looks like this:

 tsc_start_freqency_validation(TSC);
 clocksource_register(HPET);
 clocksource_done_booting();
clocksource_select()
Selects HPET which is valid for high-res

 switch_to_highres();

 clocksource_register(TSC);
TSC is not selected, because it is not yet
flagged as VALID_HIGH_RES

 clocksource_watchdog()
Validates TSC for highres, but that does not make TSC
the current clocksource.

Before the sanity check was added, we installed TSC unvalidated which
worked most of the time. If the TSC was really detected as unstable,
then the unstable logic removed it and installed HPET again.

The sanity check is correct and needed. So the watchdog needs to kick
a reselection of the clocksource, when it qualifies TSC as a valid
high res clocksource.

To solve this, we mark the clocksource which got the flag
CLOCK_SOURCE_VALID_FOR_HRES set by the watchdog with an new flag
CLOCK_SOURCE_RESELECT and trigger the watchdog thread. The watchdog
thread evaluates the flag and invokes clocksource_select() when set.

To avoid that the clocksource_done_booting() code, which is about to
install the first real clocksource anyway, needs to go through
clocksource_select and tick_oneshot_notify() pointlessly, split out
the clocksource_watchdog_kthread() list walk code and invoke the
select/notify only when called from clocksource_watchdog_kthread().

So clocksource_done_booting() can utilize the same splitout code
without the select/notify invocation and the clocksource_mutex
unlock/relock dance.

Reported-and-tested-by: Alex Shi alex@intel.com
Cc: Hans Peter Anvin h...@linux.intel.com
Cc: Tim Chen tim.c.c...@linux.intel.com
Cc: Andi Kleen andi.kl...@intel.com
Tested-by: Peter Zijlstra a.p.zijls...@chello.nl
Cc: Ingo Molnar mi...@kernel.org
Cc: Davidlohr Bueso davidlohr.bu...@hp.com
Cc: John Stultz john.stu...@linaro.org
Link: 
http://lkml.kernel.org/r/alpine.deb.2.02.1307042239150.11...@ionos.tec.linutronix.de
Signed-off-by: Thomas Gleixner t...@linutronix.de
---
 include/linux/clocksource.h |  1 +
 kernel/time/clocksource.c   | 57 +
 2 files changed, 43 insertions(+), 15 deletions(-)

diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 2f39a49..dbbf8aa 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -210,6 +210,7 @@ struct clocksource {
 #define CLOCK_SOURCE_VALID_FOR_HRES0x20
 #define CLOCK_SOURCE_UNSTABLE  0x40
 #define CLOCK_SOURCE_SUSPEND_NONSTOP   0x80
+#define CLOCK_SOURCE_RESELECT  0x100
 
 /* simplify initialization of mask field */
 #define CLOCKSOURCE_MASK(bits) (cycle_t)((bits)  64 ? ((1ULL(bits))-1) : -1)
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index e713ef7..50a8736 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -181,6 +181,7 @@ static int finished_booting;
 
 #ifdef CONFIG_CLOCKSOURCE_WATCHDOG
 static void clocksource_watchdog_work(struct work_struct *work);
+static void clocksource_select(void);
 
 static LIST_HEAD(watchdog_list);
 static struct clocksource *watchdog;
@@ -301,13 +302,30 @@ static void clocksource_watchdog(unsigned long data)
if (!(cs-flags  CLOCK_SOURCE_VALID_FOR_HRES) 
(cs-flags  CLOCK_SOURCE_IS_CONTINUOUS) 
(watchdog-flags  CLOCK_SOURCE_IS_CONTINUOUS)) {
+   /* Mark it valid for high-res. */
cs-flags |= CLOCK_SOURCE_VALID_FOR_HRES;
+
+   /*
+* clocksource_done_booting() will sort it if
+* finished_booting is not set yet.
+*/
+   if (!finished_booting)
+   continue;
+
/*
-* We just marked the clocksource as highres-capable,
-* notify the rest of the system as well so that we
-* transition into high-res mode:
+* If this is not the current clocksource let
+* the watchdog thread reselect it. Due 

system administrator

2013-07-05 Thread ADMIN
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Re: [tip:timers/core] hrtimers: Support resuming with two or more CPUs online (but stopped)

2013-07-05 Thread Artem Savkov
This commit brings up a warning about a potential deadlock in
smp_call_function_many() discussed previously:
https://lkml.org/lkml/2013/4/18/546

[ 4363.082047] PM: Restoring platform NVS memory
[ 4363.082471] [ cut here ]
[ 4363.083800] WARNING: CPU: 0 PID: 3977 at kernel/smp.c:385 
smp_call_function_many+0xbd/0x2c0()
[ 4363.085789] Modules linked in:
[ 4363.086542] CPU: 0 PID: 3977 Comm: pm-suspend Tainted: GW
3.10.0-next-20130705 #126
[ 4363.088634] Hardware name: Bochs Bochs, BIOS Bochs 01/01/2007
[ 4363.090402]  0181 88001f403d98 81d2e2b7 
821cdb2e
[ 4363.092366]   88001f403dd8 810a278c 
88001f403dd8
[ 4363.094215]     
82561898
[ 4363.096094] Call Trace:
[ 4363.096656]  IRQ  [81d2e2b7] dump_stack+0x59/0x82
[ 4363.098259]  [810a278c] warn_slowpath_common+0x8c/0xc0
[ 4363.099762]  [810a27da] warn_slowpath_null+0x1a/0x20
[ 4363.100925]  [81118fcd] smp_call_function_many+0xbd/0x2c0
[ 4363.101937]  [8110f0dd] ? trace_hardirqs_on+0xd/0x10
[ 4363.102870]  [810d7030] ? hrtimer_wakeup+0x30/0x30
[ 4363.103737]  [811193bb] smp_call_function+0x3b/0x50
[ 4363.104609]  [810d7030] ? hrtimer_wakeup+0x30/0x30
[ 4363.105455]  [8111943b] on_each_cpu+0x3b/0x120
[ 4363.106249]  [810d743c] clock_was_set+0x1c/0x30
[ 4363.107168]  [810d825c] run_hrtimer_softirq+0x2c/0x40
[ 4363.108055]  [810acf26] __do_softirq+0x216/0x450
[ 4363.108865]  [810ad297] irq_exit+0x77/0xb0
[ 4363.109618]  [81d414da] smp_apic_timer_interrupt+0x4a/0x60
[ 4363.110569]  [81d40032] apic_timer_interrupt+0x72/0x80
[ 4363.111467]  EOI  [8110eb24] ? mark_held_locks+0x134/0x160
[ 4363.112481]  [810f52af] ? arch_suspend_enable_irqs+0x2f/0x40
[ 4363.113457]  [810f528e] ? arch_suspend_enable_irqs+0xe/0x40
[ 4363.113910]  [810f54c1] suspend_enter+0x1d1/0x270
[ 4363.114320]  [810f5794] suspend_devices_and_enter+0x1a4/0x390
[ 4363.114887]  [810f5a74] enter_state+0xf4/0x150
[ 4363.115288]  [810f5aeb] pm_suspend+0x1b/0x70
[ 4363.115662]  [810f452b] state_store+0xeb/0xf0
[ 4363.116055]  [815d3fc7] kobj_attr_store+0x17/0x20
[ 4363.116468]  [8126f113] sysfs_write_file+0xb3/0x100
[ 4363.116890]  [811f0aca] vfs_write+0xda/0x170
[ 4363.117274]  [811f10b2] SyS_write+0x62/0xa0
[ 4363.117645]  [815e01fe] ? trace_hardirqs_on_thunk+0x3a/0x3f
[ 4363.118118]  [81d3f399] system_call_fastpath+0x16/0x1b
[ 4363.118558] ---[ end trace 87cc49a77badea1e ]---
[ 4363.119093] Enabling non-boot CPUs ...


On Fri, Jun 28, 2013 at 02:18:37PM -0700, tip-bot for David Vrabel wrote:
 Commit-ID:  7c4c3a0f18ba57ea2a2985034532303d2929902a
 Gitweb: http://git.kernel.org/tip/7c4c3a0f18ba57ea2a2985034532303d2929902a
 Author: David Vrabel david.vra...@citrix.com
 AuthorDate: Thu, 27 Jun 2013 11:35:44 +0100
 Committer:  Thomas Gleixner t...@linutronix.de
 CommitDate: Fri, 28 Jun 2013 23:15:06 +0200
 
 hrtimers: Support resuming with two or more CPUs online (but stopped)
 
 hrtimers_resume() only reprograms the timers for the current CPU as it
 assumes that all other CPUs are offline at this point in the resume
 process. If other CPUs are online then their timers will not be
 corrected and they may fire at the wrong time.
 
 When running as a Xen guest, this assumption is not true.  Non-boot
 CPUs are only stopped with IRQs disabled instead of offlining them.
 This is a performance optimization as disabling the CPUs would add an
 unacceptable amount of additional downtime during a live migration (
 200 ms for a 4 VCPU guest).
 
 hrtimers_resume() cannot call on_each_cpu(retrigger_next_event,...)
 as the other CPUs will be stopped with IRQs disabled.  Instead, defer
 the call to the next softirq.
 
 [ tglx: Separated the xen change out ]
 
 Signed-off-by: David Vrabel david.vra...@citrix.com
 Cc: Konrad Rzeszutek Wilk  konrad.w...@oracle.com
 Cc: John Stultz  john.stu...@linaro.org
 Cc: xen-de...@lists.xen.org
 Link: 
 http://lkml.kernel.org/r/1372329348-20841-2-git-send-email-david.vra...@citrix.com
 Signed-off-by: Thomas Gleixner t...@linutronix.de
 ---
  kernel/hrtimer.c | 15 ---
  1 file changed, 12 insertions(+), 3 deletions(-)
 
 diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
 index fd4b13b..e86827e 100644
 --- a/kernel/hrtimer.c
 +++ b/kernel/hrtimer.c
 @@ -773,15 +773,24 @@ void clock_was_set(void)
  
  /*
   * During resume we might have to reprogram the high resolution timer
 - * interrupt (on the local CPU):
 + * interrupt on all online CPUs.  However, all other CPUs will be
 + * stopped with IRQs interrupts disabled so the clock_was_set() call
 + * must be deferred to the softirq.
 + *
 + * The one-shot timer has already been programmed to fire immediately
 + * (see tick_resume_oneshot

get a kernel crash with kernel 3.10.0-1.el6.elrepo.x86_64

2013-07-05 Thread Stefan Sabolowitsch
Hi all,
I get a kernel crash with 3.10.0-1.el6.elrepo.x86_64 (on two machines the
same problem).
Never seen on v3.8.x / v3.9x

Any idea ?

Thx
Stefan

-#-#-#-#-#-#-#-#-#-#-#-#-#-#-#-#-#-#-#-#-#-#-

abrt_version:   2.0.8
cmdline:ro root=/dev/mapper/vg_ipd2-lv_root rd_NO_LUKS rd_NO_MD
SYSFONT=latarcyrheb-sun16 crashkernel=auto rd_LVM_LV=vg_ipd2/lv_swap
rd_NO_DM LANG=de_DE.UTF-8  KEYBOARDTYPE=pc KEYTABLE=de
rd_LVM_LV=vg_ipd2/lv_root rhgb quiet
kernel: 3.10.0-1.el6.elrepo.x86_64
time:   Do 04 Jul 2013 16:18:29 GMT

sosreport.tar.xz: Binary file, 1665652 bytes

backtrace:
:WARNING: at drivers/dma/ioat/dca.c:697 ioat3_dca_init+0x1f2/0x200
[ioatdma]()
:ioatdma :00:16.0: APICID_TAG_MAP set incorrectly by BIOS, disabling
DCA
:Modules linked in: ioatdma(+) i7core_edac edac_core igb hwmon dca ptp
pps_core ext4 jbd2 mbcache sd_mod crc_t10dif ahci libahci dm_mirror
dm_region_hash dm_log dm_mod
:CPU: 0 PID: 1943 Comm: modprobe Not tainted 3.10.0-1.el6.elrepo.x86_64 #1
:Hardware name: NEXCOM NSA7110/NSB7110, BIOS 1.43 11/10/2010
:a016cbfc 8802333efa68 815f50e8 8802333efaa8
:8105b2f0 a016e9c0 8802345da7c0 880234660de0
:880234679000 0002 0100 8802333efb08
:Call Trace:
:[815f50e8] dump_stack+0x19/0x21
:[8105b2f0] warn_slowpath_common+0x70/0xa0
:[8105b37f] warn_slowpath_fmt_taint+0x3f/0x50
:[a01139a1] ? alloc_dca_provider+0x21/0x40 [dca]
:[a016b142] ioat3_dca_init+0x1f2/0x200 [ioatdma]
:[a01673e0] ioat3_dma_probe+0x310/0x460 [ioatdma]
:[812ce4cb] ? __pci_set_master+0x2b/0x90
:[a0163241] ioat_pci_probe+0x1b1/0x1d0 [ioatdma]
:[812d0e0e] local_pci_probe+0x4e/0x90
:[812d0f21] __pci_device_probe+0xd1/0xe0
:[812d2262] ? pci_dev_get+0x22/0x30
:[812d22aa] pci_device_probe+0x3a/0x60
:[813cddc1] really_probe+0x61/0x210
:[813cdfae] driver_probe_device+0x3e/0x60
:[813ce07b] __driver_attach+0xab/0xb0
:[813cdfd0] ? driver_probe_device+0x60/0x60
:[813cdfd0] ? driver_probe_device+0x60/0x60
:[813cc264] bus_for_each_dev+0x94/0xb0
:[813cdc0e] driver_attach+0x1e/0x20
:[813cd658] bus_add_driver+0x1e8/0x250
:[a0157000] ? 0xa0156fff
:[813ce714] driver_register+0x74/0x160
:[a0157000] ? 0xa0156fff
:[812d23bc] __pci_register_driver+0x4c/0x50
:[a015706d] ioat_init_module+0x6d/0x1000 [ioatdma]
:[81002042] do_one_initcall+0x42/0x170
:[810c3a30] do_init_module+0x80/0x1f0
:[810c5540] load_module+0x390/0x500
:[810c3110] ? mod_sysfs_teardown+0x150/0x150
:[810c31a7] ? copy_module_from_user+0x67/0xc0
:[810c2830] ? module_sect_show+0x30/0x30
:[810c57f3] SyS_init_module+0x93/0xa0
:[816014d9] system_call_fastpath+0x16/0x1b








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Re: [PATCH 07/13] sched: Split accounting of NUMA hinting faults that pass two-stage filter

2013-07-05 Thread Mel Gorman
On Thu, Jul 04, 2013 at 03:36:38PM -0400, Johannes Weiner wrote:
 On Thu, Jul 04, 2013 at 10:23:56AM +0100, Mel Gorman wrote:
  On Wed, Jul 03, 2013 at 05:56:54PM -0400, Johannes Weiner wrote:
   On Wed, Jul 03, 2013 at 03:21:34PM +0100, Mel Gorman wrote:
Ideally it would be possible to distinguish between NUMA hinting faults
that are private to a task and those that are shared. This would require
that the last task that accessed a page for a hinting fault would be
recorded which would increase the size of struct page. Instead this 
patch
approximates private pages by assuming that faults that pass the 
two-stage
filter are private pages and all others are shared. The preferred NUMA
node is then selected based on where the maximum number of approximately
private faults were measured. Shared faults are not taken into
consideration for a few reasons.
   
   Ingo had a patch that would just encode a few bits of the PID along
   with the last_nid (last_cpu in his case) member of struct page.  No
   extra space required and should be accurate enough.
   
  
  Yes, I'm aware of it. I noted in the changelog that ideally we'd record
  the task both to remind myself and so that the patch that introduces it
  could refer to this changelog so there is some sort of logical progression
  for reviewers.
  
  I was not keen on the use of last_cpu because I felt there was an implicit
  assumption that scanning would always be fast enough to record hinting
  faults before a task got moved to another CPU for any reason. I feared this
  would be worse as memory and task sizes increased. That's why I stayed
  with tracking the nid for the two-stage filter until it could be proven
  it was insufficient for some reason.
  
  The lack of anything resembling pid tracking now is that the series is
  already a bit of a mouthful and I thought the other parts were more
  important for now.
 
 Fair enough.
 

I prototyped a node/pid tracker where node is used for misplaced
detection and pid is used for private/shared detection. Tests running.
I'll include it in the next release if it works out.

   Otherwise this is blind to sharedness within the node the task is
   currently running on, right?
   
  
  Yes, it is.
  
First, if there are many tasks sharing the page then they'll all move
towards the same node. The node will be compute overloaded and then
scheduled away later only to bounce back again. Alternatively the shared
tasks would just bounce around nodes because the fault information is
effectively noise. Either way accounting for shared faults the same as
private faults may result in lower performance overall.
   
   When the node with many shared pages is compute overloaded then there
   is arguably not an optimal node for the tasks and moving them off is
   inevitable. 
  
  Yes. If such an event occurs then the ideal is that the task interleaves
  between a subset of nodes. The situation could be partially detected by
  tracking if the number of historical faults is approximately larger than
  the preferred node and then interleave between the top N nodes most faulted
  nodes until the working set fits. Starting the interleave should just be
  a matter of coding. The difficulty is correctly backing off that if there
  is a phase change.
 
 Agreed, optimizing second-best placement can be dealt with later.  I'm
 worried about optimal placement, though.
 
 And I'm worried about skewing memory access statistics in order to
 steer future situations the CPU load balancer should handle instead.
 

And I'm worried about shared accesses drowning out any useful data. Ok,
at the very least I can test this

diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 1647a87..26b57b0 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -4092,7 +4092,8 @@ static bool migrate_locality_prepare(struct task_struct 
*p, struct lb_env *env,
 /* Returns true if the destination node has incurred more faults */
 static bool migrate_improves_locality(struct task_struct *p, struct lb_env 
*env)
 {
-   int src_nid, dst_nid;
+   int src_nid, dst_nid, priv;
+   unsigned long src_faults = 0, dst_faults = 0;
 
if (!migrate_locality_prepare(p, env, src_nid, dst_nid))
return false;
@@ -4101,12 +4102,13 @@ static bool migrate_improves_locality(struct 
task_struct *p, struct lb_env *env)
if (p-numa_preferred_nid == dst_nid)
return true;
 
-   /*
-* Move towards node if there were a higher number of private
-* NUMA hinting faults recorded on it
-*/
-   if (p-numa_faults[task_faults_idx(dst_nid, 1)] 
-   p-numa_faults[task_faults_idx(src_nid, 1)])
+   /* Move towards node if there were more NUMA hinting faults recorded */
+   for (priv = 0; priv  2; priv++) {
+   src_faults += p-numa_faults[task_faults_idx(src_nid, priv)];
+   dst_faults += 

[tip:irq/urgent] genirq: generic chip: Use DIV_ROUND_UP to calculate numchips

2013-07-05 Thread tip-bot for Axel Lin
Commit-ID:  002fca5df168922103a2bb52748f9984e6de80b2
Gitweb: http://git.kernel.org/tip/002fca5df168922103a2bb52748f9984e6de80b2
Author: Axel Lin axel@ingics.com
AuthorDate: Fri, 5 Jul 2013 17:13:12 +0800
Committer:  Thomas Gleixner t...@linutronix.de
CommitDate: Fri, 5 Jul 2013 11:39:25 +0200

genirq: generic chip: Use DIV_ROUND_UP to calculate numchips

The number of interrupts in a domain may be not divisible by the
number of interrupts each chip handles. Integer division may truncate
the result, thus use DIV_ROUND_UP to count numchips.

Seems all users of irq_alloc_domain_generic_chips() in current code do
not have this issue. I just found the issue while reading the code.

Signed-off-by: Axel Lin axel@ingics.com
Cc: Grant Likely grant.lik...@linaro.org
Cc: Tony Lindgren t...@atomide.com
Cc: Arnd Bergmann a...@arndb.de
Link: http://lkml.kernel.org/r/1373015592.18252.2.camel@phoenix
Signed-off-by: Thomas Gleixner t...@linutronix.de
---
 kernel/irq/generic-chip.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index 1c39ecc..2f274f3 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -278,7 +278,7 @@ int irq_alloc_domain_generic_chips(struct irq_domain *d, 
int irqs_per_chip,
if (d-revmap_type != IRQ_DOMAIN_MAP_LINEAR)
return -EINVAL;
 
-   numchips = d-revmap_data.linear.size / irqs_per_chip;
+   numchips = DIV_ROUND_UP(d-revmap_data.linear.size, irqs_per_chip);
if (!numchips)
return -EINVAL;
 
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[tip:irq/urgent] irqchip: vt8500: Staticize local symbols

2013-07-05 Thread tip-bot for Axel Lin
Commit-ID:  e658718e478fb2591f38afd9643eab06698790fe
Gitweb: http://git.kernel.org/tip/e658718e478fb2591f38afd9643eab06698790fe
Author: Axel Lin axel@ingics.com
AuthorDate: Fri, 5 Jul 2013 11:33:49 +0800
Committer:  Thomas Gleixner t...@linutronix.de
CommitDate: Fri, 5 Jul 2013 11:39:24 +0200

irqchip: vt8500: Staticize local symbols

This driver is converted to use IRQCHIP_DECLARE and irqchip_init.
vt8500_handle_irq() and vt8500_irq_init() are only referenced in this file, so
make them static.

Signed-off-by: Axel Lin axel@ingics.com
Acked-by: Tony Prisk li...@prisktech.co.nz
Cc: Olof Johansson o...@lixom.net
Link: http://lkml.kernel.org/r/1372995229.4038.1.camel@phoenix
Signed-off-by: Thomas Gleixner t...@linutronix.de
---
 drivers/irqchip/irq-vt8500.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-vt8500.c b/drivers/irqchip/irq-vt8500.c
index d970595..1846e7d 100644
--- a/drivers/irqchip/irq-vt8500.c
+++ b/drivers/irqchip/irq-vt8500.c
@@ -178,7 +178,8 @@ static struct irq_domain_ops vt8500_irq_domain_ops = {
.xlate = irq_domain_xlate_onecell,
 };
 
-asmlinkage void __exception_irq_entry vt8500_handle_irq(struct pt_regs *regs)
+static asmlinkage
+void __exception_irq_entry vt8500_handle_irq(struct pt_regs *regs)
 {
u32 stat, i;
int irqnr, virq;
@@ -203,7 +204,8 @@ asmlinkage void __exception_irq_entry 
vt8500_handle_irq(struct pt_regs *regs)
}
 }
 
-int __init vt8500_irq_init(struct device_node *node, struct device_node 
*parent)
+static int __init vt8500_irq_init(struct device_node *node,
+ struct device_node *parent)
 {
int irq, i;
struct device_node *np = node;
--
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[tip:irq/urgent] irqchip: sun4i: Staticize sun4i_irq_ack()

2013-07-05 Thread tip-bot for Axel Lin
Commit-ID:  baaecfa7249f1d5553a31f8ad0b9c7ffabcaa339
Gitweb: http://git.kernel.org/tip/baaecfa7249f1d5553a31f8ad0b9c7ffabcaa339
Author: Axel Lin axel@ingics.com
AuthorDate: Fri, 5 Jul 2013 15:41:10 +0800
Committer:  Thomas Gleixner t...@linutronix.de
CommitDate: Fri, 5 Jul 2013 11:39:24 +0200

irqchip: sun4i: Staticize sun4i_irq_ack()

sun4i_irq_ack() is only referenced in this file, so make it static.

Signed-off-by: Axel Lin axel@ingics.com
Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
Link: http://lkml.kernel.org/r/1373010070.14756.2.camel@phoenix
Signed-off-by: Thomas Gleixner t...@linutronix.de
---
 drivers/irqchip/irq-sun4i.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-sun4i.c b/drivers/irqchip/irq-sun4i.c
index b66d4ae..a5438d8 100644
--- a/drivers/irqchip/irq-sun4i.c
+++ b/drivers/irqchip/irq-sun4i.c
@@ -38,7 +38,7 @@ static struct irq_domain *sun4i_irq_domain;
 
 static asmlinkage void __exception_irq_entry sun4i_handle_irq(struct pt_regs 
*regs);
 
-void sun4i_irq_ack(struct irq_data *irqd)
+static void sun4i_irq_ack(struct irq_data *irqd)
 {
unsigned int irq = irqd_to_hwirq(irqd);
unsigned int irq_off = irq % 32;
--
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Re: [PATCH 2/4] pinmux: Add TB10x pinmux driver

2013-07-05 Thread Christian Ruppert
On Wed, Jun 26, 2013 at 11:40:42AM -0600, Stephen Warren wrote:
 On 06/26/2013 05:50 AM, Christian Ruppert wrote:
  On Wed, Jun 19, 2013 at 04:35:14PM -0600, Stephen Warren wrote:
  On 06/18/2013 03:29 AM, Christian Ruppert wrote:
 [...]
  +Example
  +---
  +
  +iomux: iomux@FF10601c {
  + compatible = abilis,tb10x-iomux;
  + reg = 0xFF10601c 0x4;
  + pctl_gpio_a: pctl-gpio-a {
  + pingrp = gpioa_pins;
  + };
  + pctl_uart0: pctl-uart0 {
  + pingrp = uart0_pins;
  + };
  +};
 
  The two nodes pctl-gpio-a and pctl-uart0 seem to be missing data. The
  idea here is that you define nodes that says:
 
  * This node applies to these pin(s)/group(s).
  * Select mux function X on those pins/groups and/or apply these pin
  configuration options to those pins/groups.
 
  The examples above don't include any mux/config options, nor does the
  binding say how to do specify them.
 
  The set of pin groups defined by this binding should correspond directly
  to the set of pin groups that actually exist in HW. So, if you have 3
  pin groups (A, B, C) in HW each of which has two mux functions (X, Y),
  your DT binding should define just 3 pin groups (A, B, C), not 6 (A_X,
  A_Y, B_X, B_Y, C_X, C_Y). In other words, the pin group name shouldn't
  imply the mux function.
  
  Can we consider it as agreed now that this implementation is acceptable
  for the TB10x pin controller?
 
 There are two issues here:
 
 1) What is a pin group:
 
 1a) Must it solely represent a group of pins that actually exists in HW
 (e.g. it's an RTL port, or a set of pins all controlled at once by a
 single bit/field in a register)
 
 1b) A SW-defined group of pins, simply because it's convenient to talk
 about that set of pins at once, even though HW doesn't impose that those
 pins are in a group in any way.
 
 Defining groups for either of those reasons is fine, although this is
 the area where my preference and LinusW's differ.
 
 2) Can groups represent just a set of pins, or can it also imply that a
 particular mux function is selected on that group?
 
 I believe that both LinusW and I are in agreement that a group is simply
 a list/set/group of pins. You select mux functions onto groups. A
 groups's definition can't imply that a particular mux function is
 selected onto it.
 
 If we don't follow this rule, then you end up with a combinatorial
 explosion of groups; the cross-product of all possible groups of pins
 vs. the mux function to select on them, rather than simply having a list
 of groups of pins, which is a much smaller set/list.
 
 So, in the DT example above, I still believe that you need an extra
 property that defines which mux function to select onto the specified
 group. The group name can't imply this, so there needs to be some way of
 specifying it.

In your opinion, would something in the lines of

pctl_spi1: pctl-spi1 {
abilis,pingrp = spi1;
abilis,ioport = 4;   /* spi1 is routed to port4 inside the
pin controller */
abilis,ioconf = 1;   /* spi1 is available in configuration 1
of that port. */
};

be more appropriate? This nicely defines which pins of which port are
requested and what is the configuration required (and it reflects our
hardware very well).
In future, this could even be extended to allow several alternative
configurations for a given function, e.g.

pctl_spi3: pctl-spi3 {
abilis,pingrp = spi3;
abilis,ioport = 6;
abilis,ioconf = 0 3; /* spi3 is available in both
configurations 0 and 3. Depending on
what other functions are requested, the
pinctrl driver can choose either of the
two. */
};

Greetings,
  Christian

-- 
  Christian Ruppert  ,  christian.rupp...@abilis.com
/|
  Tel: +41/(0)22 816 19-42 //| 3, Chemin du Pré-Fleuri
 _// | bilis Systems   CH-1228 Plan-les-Ouates
--
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[tip:irq/urgent] irqchip: Add support for MOXA ART SoCs

2013-07-05 Thread tip-bot for Jonas Jensen
Commit-ID:  4de563ae821b1935b3c467a4606e5738b0b0df87
Gitweb: http://git.kernel.org/tip/4de563ae821b1935b3c467a4606e5738b0b0df87
Author: Jonas Jensen jonas.jen...@gmail.com
AuthorDate: Thu, 4 Jul 2013 14:38:51 +0200
Committer:  Thomas Gleixner t...@linutronix.de
CommitDate: Fri, 5 Jul 2013 11:39:25 +0200

irqchip: Add support for MOXA ART SoCs

This patch adds an irqchip driver for the main interrupt controller
found on MOXA ART SoCs.

Signed-off-by: Jonas Jensen jonas.jen...@gmail.com
Cc: grant.lik...@secretlab.ca
Cc: thomas.petazz...@free-electrons.com
Cc: a...@arndb.de
Cc: u.kleine-koe...@pengutronix.de
Cc: li...@arm.linux.org.uk
Cc: linux-arm-ker...@lists.infradead.org
Link: 
http://lkml.kernel.org/r/1372941531-6393-1-git-send-email-jonas.jen...@gmail.com
Signed-off-by: Thomas Gleixner t...@linutronix.de
---
 drivers/irqchip/Makefile |   1 +
 drivers/irqchip/irq-moxart.c | 117 +++
 2 files changed, 118 insertions(+)

diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 2065ef6..e65c41a 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_ARCH_MXS)  += irq-mxs.o
 obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
 obj-$(CONFIG_METAG)+= irq-metag-ext.o
 obj-$(CONFIG_METAG_PERFCOUNTER_IRQS)   += irq-metag.o
+obj-$(CONFIG_ARCH_MOXART)  += irq-moxart.o
 obj-$(CONFIG_ORION_IRQCHIP)+= irq-orion.o
 obj-$(CONFIG_ARCH_SUNXI)   += irq-sun4i.o
 obj-$(CONFIG_ARCH_SPEAR3XX)+= spear-shirq.o
diff --git a/drivers/irqchip/irq-moxart.c b/drivers/irqchip/irq-moxart.c
new file mode 100644
index 000..5552fc2
--- /dev/null
+++ b/drivers/irqchip/irq-moxart.c
@@ -0,0 +1,117 @@
+/*
+ * MOXA ART SoCs IRQ chip driver.
+ *
+ * Copyright (C) 2013 Jonas Jensen
+ *
+ * Jonas Jensen jonas.jen...@gmail.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed as is without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include linux/io.h
+#include linux/irq.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/irqdomain.h
+
+#include asm/exception.h
+
+#include irqchip.h
+
+#define IRQ_SOURCE_REG 0
+#define IRQ_MASK_REG   0x04
+#define IRQ_CLEAR_REG  0x08
+#define IRQ_MODE_REG   0x0c
+#define IRQ_LEVEL_REG  0x10
+#define IRQ_STATUS_REG 0x14
+
+#define FIQ_SOURCE_REG 0x20
+#define FIQ_MASK_REG   0x24
+#define FIQ_CLEAR_REG  0x28
+#define FIQ_MODE_REG   0x2c
+#define FIQ_LEVEL_REG  0x30
+#define FIQ_STATUS_REG 0x34
+
+
+struct moxart_irq_data {
+   void __iomem *base;
+   struct irq_domain *domain;
+   unsigned int interrupt_mask;
+};
+
+static struct moxart_irq_data intc;
+
+static asmlinkage void __exception_irq_entry handle_irq(struct pt_regs *regs)
+{
+   u32 irqstat;
+   int hwirq;
+
+   irqstat = readl(intc.base + IRQ_STATUS_REG);
+
+   while (irqstat) {
+   hwirq = ffs(irqstat) - 1;
+   handle_IRQ(irq_linear_revmap(intc.domain, hwirq), regs);
+   irqstat = ~(1  hwirq);
+   }
+}
+
+static int __init moxart_of_intc_init(struct device_node *node,
+ struct device_node *parent)
+{
+   unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
+   int ret;
+   struct irq_chip_generic *gc;
+
+   intc.base = of_iomap(node, 0);
+   if (!intc.base) {
+   pr_err(%s: unable to map IC registers\n,
+  node-full_name);
+   return -EINVAL;
+   }
+
+   intc.domain = irq_domain_add_linear(node, 32, irq_generic_chip_ops,
+   intc.base);
+   if (!intc.domain) {
+   pr_err(%s: unable to create IRQ domain\n, node-full_name);
+   return -EINVAL;
+   }
+
+   ret = irq_alloc_domain_generic_chips(intc.domain, 32, 1,
+MOXARTINTC, handle_edge_irq,
+clr, 0, IRQ_GC_INIT_MASK_CACHE);
+   if (ret) {
+   pr_err(%s: could not allocate generic chip\n,
+  node-full_name);
+   irq_domain_remove(intc.domain);
+   return -EINVAL;
+   }
+
+   ret = of_property_read_u32(node, interrupt-mask,
+  intc.interrupt_mask);
+   if (ret)
+   pr_err(%s: could not read interrupt-mask DT property\n,
+  node-full_name);
+
+   gc = irq_get_domain_generic_chip(intc.domain, 0);
+
+   gc-reg_base = intc.base;
+   gc-chip_types[0].regs.mask = IRQ_MASK_REG;
+   gc-chip_types[0].regs.ack = IRQ_CLEAR_REG;
+   gc-chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
+   

Re: [RFC PATCH 7/7] autofs - change CONFIG_AUTOFS4_FS to CONFIG_AUTOFS_FS

2013-07-05 Thread Ian Kent
On Mon, 2013-07-01 at 14:39 +1000, Stephen Rothwell wrote:
 Hi Ian,
 
 On Mon, 01 Jul 2013 11:14:51 +0800 Ian Kent ra...@themaw.net wrote:
 
  Signed-off-by: Ian Kent ra...@themaw.net
 
 Please don't do this.  Find a simple way to make sure that if
 CONFIG_AUTOFS4_FS is set, then make oldconfig  (or equivalent) will
 cause CONFIG_AUTOFS_FS to be set the same.

I get what your recommending but still can't think of a way to do it,
any thoughts?

Am I correct that's a +1 for an outright rename of autofs4 to autofs
rather than keeping the autofs4 directory and a compile stub?

I think what I was intending to do (even though I don't really like that
either) isn't apparent since patch 6 didn't make it to the list. I've
re-organized the series since, so perhaps another post of the series to
the list will provoke some suggestions.

 
 The maintainers will update the defconfigs over time.
 

Perhaps the maintainers expected the rename to occur a long time ago
(and it probably should have) since after around three years the configs
are still out of date. Still, as you say, it isn't really my place to
fix that.

Ian


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Crypto Update for 3.11

2013-07-05 Thread Herbert Xu
Hi Linus:

Here is the crypto update for 3.11:

* Do not idle omap device between crypto operations in one session.
* Added sha224/sha384 shims for SSSE3.
* More optimisations for camellia-aesni-avx2.
* Removed defunct blowfish/twofish AVX2 implementations.
* Added unaligned buffer self-tests.
* Added PCLMULQDQ optimisation for CRCT10DIF.
* Added support for Freescale's DCP co-processor
* Misc fixes.


Please pull from

git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git


Andrei Varvara (8):
  crypto: caam - fix SEQ IN PTR command when RTO or PRE bit is set
  crypto: caam - Fix STORE command to support overwriting Shared 
Descriptor's memory
  crypto: caam - Add MATH command to support shld function
  crypto: caam - Add new macros for building extended SEC descriptors ( 64 
words)
  crypto: caam - Add defines for overwriting Descriptor's memory
  crypto: caam - Add defines for CAAM commands
  crypto: caam - Add define for Adjust Output Frame Length in PDB
  crypto: caam - add missing flag for the LOAD/STORE commands

Arnd Bergmann (1):
  hwrng: bcm2835 - fix MODULE_LICENSE tag

Herbert Xu (2):
  crypto: crct10dif - Use PTR_RET
  Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto

Jingoo Han (6):
  hwrng: atmel - remove unnecessary platform_set_drvdata()
  hwrng: bcm63xx - remove unnecessary platform_set_drvdata()
  hwrng: timeriomem - remove unnecessary platform_set_drvdata()
  hwrng: tx4939 - remove unnecessary platform_set_drvdata()
  hwrng: use platform_{get,set}_drvdata()
  crypto: picoxcell - replace strict_strtoul() with kstrtoul()

Joel A Fernandes (1):
  crypto: omap-aes - Don't idle/start AES device between Encrypt operations

Jussi Kivilinna (10):
  crypto: sha512_generic - set cra_driver_name
  crypto: sha512_ssse3 - add sha384 support
  crypto: sha256_ssse3 - add sha224 support
  crypto: camellia-aesni-avx2 - tune assembly code for more performance
  Revert crypto: blowfish - add AVX2/x86_64 implementation of blowfish 
cipher
  Revert crypto: twofish - add AVX2/x86_64 assembler implementation of 
twofish cipher
  crypto: testmgr - check that entries in alg_test_descs are in correct 
order
  crypto: testmgr - test skciphers with unaligned buffers
  crypto: testmgr - test AEADs with unaligned buffers
  crypto: testmgr - test hash implementations with unaligned buffers

Lars-Peter Clausen (1):
  crypto: hifn_795x - Pass correct pointer to free_irq()

Laurent Navet (1):
  drivers: crypto: use devm_ioremap_resource()

Linus Walleij (1):
  hwrng: nomadik - use clk_prepare_enable()

Paul Bolle (1):
  crypto: sahara - remove dependency on EXPERIMENTAL

Ruchika Gupta (1):
  crypto: caam - FIX RNG init for RNG greater than equal to 4

Sachin Kamat (6):
  crypto: mv_cesa: Remove redundant platform_set_drvdata()
  crypto: s5p-sss: Remove redundant platform_set_drvdata()
  crypto: dcp - Remove redundant platform_set_drvdata()
  crypto: dcp - Use devm_* APIs
  crypto: dcp - Use NULL instead of 0
  crypto: dcp - Staticize local symbols

Thomas Meyer (1):
  crypto: ux500 - Cocci spatch resource_size.spatch

Tim Chen (4):
  crypto: crct10dif - Wrap crc_t10dif function all to use crypto transform 
framework
  crypto: crct10dif - Accelerated CRC T10 DIF computation with PCLMULQDQ 
instruction
  crypto: crct10dif - Glue code to cast accelerated CRCT10DIF assembly as a 
crypto transform
  crypto: crct10dif - Simple correctness and speed test for CRCT10DIF hash

Tobias Rauter (1):
  crypto: dcp - Added support for Freescale's DCP co-processor

 arch/arm/boot/dts/imx28.dtsi |2 +-
 arch/x86/crypto/Makefile |8 +-
 arch/x86/crypto/blowfish-avx2-asm_64.S   |  449 -
 arch/x86/crypto/blowfish_avx2_glue.c |  585 -
 arch/x86/crypto/blowfish_glue.c  |   32 +-
 arch/x86/crypto/camellia-aesni-avx2-asm_64.S |  160 +++--
 arch/x86/crypto/crct10dif-pcl-asm_64.S   |  643 ++
 arch/x86/crypto/crct10dif-pclmul_glue.c  |  151 +
 arch/x86/crypto/sha256_ssse3_glue.c  |   57 ++-
 arch/x86/crypto/sha512_ssse3_glue.c  |   58 ++-
 arch/x86/crypto/twofish-avx2-asm_64.S|  600 -
 arch/x86/crypto/twofish_avx2_glue.c  |  584 
 arch/x86/crypto/twofish_avx_glue.c   |   14 +-
 arch/x86/include/asm/crypto/blowfish.h   |   43 --
 arch/x86/include/asm/crypto/twofish.h|   18 -
 crypto/Kconfig   |   63 +--
 crypto/Makefile  |1 +
 crypto/crct10dif.c   |  178 +
 crypto/sha512_generic.c  |2 +
 crypto/tcrypt.c  |8 +
 crypto/testmgr.c |  176 -
 crypto/testmgr.h

[tip:perf/urgent] perf: Fix interrupt handler timing harness

2013-07-05 Thread tip-bot for Stephane Eranian
Commit-ID:  e5302920da9ef23f9d19d4e9ac85704cc25bee7a
Gitweb: http://git.kernel.org/tip/e5302920da9ef23f9d19d4e9ac85704cc25bee7a
Author: Stephane Eranian eran...@google.com
AuthorDate: Fri, 5 Jul 2013 00:30:11 +0200
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Fri, 5 Jul 2013 08:54:43 +0200

perf: Fix interrupt handler timing harness

This patch fixes a serious bug in:

  14c63f17b1fd perf: Drop sample rate when sampling is too slow

There was an misunderstanding on the API of the do_div()
macro. It returns the remainder of the division and this
was not what the function expected leading to disabling the
interrupt latency watchdog.

This patch also remove a duplicate assignment in
perf_sample_event_took().

Signed-off-by: Stephane Eranian eran...@google.com
Cc: pet...@infradead.org
Cc: dave.han...@linux.intel.com
Cc: a...@linux.intel.com
Cc: jo...@redhat.com
Link: http://lkml.kernel.org/r/20130704223010.GA30625@quad
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 kernel/events/core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/kernel/events/core.c b/kernel/events/core.c
index 1db3af9..1833bc5 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -182,7 +182,7 @@ void update_perf_cpu_limits(void)
u64 tmp = perf_sample_period_ns;
 
tmp *= sysctl_perf_cpu_time_max_percent;
-   tmp = do_div(tmp, 100);
+   do_div(tmp, 100);
atomic_set(perf_sample_allowed_ns, tmp);
 }
 
@@ -232,7 +232,7 @@ DEFINE_PER_CPU(u64, running_sample_length);
 void perf_sample_event_took(u64 sample_len_ns)
 {
u64 avg_local_sample_len;
-   u64 local_samples_len = __get_cpu_var(running_sample_length);
+   u64 local_samples_len;
 
if (atomic_read(perf_sample_allowed_ns) == 0)
return;
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[GIT PULL] metag architecture changes for v3.11

2013-07-05 Thread James Hogan
The following changes since commit 317ddd256b9c24b0d78fa8018f80f1e495481a10:

  Linux 3.10-rc5 (2013-06-08 17:41:04 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag.git 
tags/metag-for-v3.11

for you to fetch changes up to c20eb0f1d0918c019fb2674a104e6ab59d8e62ac:

  metag: move EXPORT_SYMBOL(csum_partial) to metag_ksyms.c (2013-07-04 10:00:02 
+0100)


Metag architecture changes for v3.11

- Infrastructure and DT files for TZ1090 SoC (pin control drivers
  already merged via pinctrl tree).
- Panic on boot instead of just warning if cache aliasing possible.
- Various SMP/hotplug fixes.
- Various other randconfig/sparse fixes.


James Hogan (16):
  metag: of_platform_populate from arch generic code
  metag: minimal TZ1090 (Comet) SoC infrastructure
  metag: init common clk and use core clk
  metag: log core and timer frequencies from arch code
  metag: add dt-bindings/ symlink
  metag: *.dts: include using preprocessor
  metag: panic if cache aliasing possible
  metag: don't check for cache aliasing on smp cpu boot
  metag: tz1090: select and instantiate pinctrl-tz1090
  metag: tz1090: select and instantiate pinctrl-tz1090-pdc
  metag: use clear_tasks_mm_cpumask()
  metag: smp: enable irqs after set_cpu_online
  metag: smp: don't spin waiting for CPU to start
  metag: kick: add missing irq_enter/exit to kick_handler()
  metag: cpu hotplug: route_irq: preserve irq mask
  metag: move EXPORT_SYMBOL(csum_partial) to metag_ksyms.c

Markos Chandras (8):
  metag/kernel/irq.c: Declare root_domain as static
  metag/asm/irq.h: Declare init_IRQ
  metag/mm/cache: Restrict scope for metag_lnkget_probe
  metag/setup: Restrict scope for the capabilities variable
  metag/processor.h: Add missing cpuinfo_op declaration.
  metag/traps: Mark die() as __noreturn to match the declaration.
  metag/traps: include setup.h for the per_cpu_trap_init declaration
  metag/.gitignore: Extend the *.dtb pattern to match the dtb.S files

 Documentation/devicetree/bindings/metag/meta.txt   | 30 +++
 .../devicetree/bindings/vendor-prefixes.txt|  1 +
 arch/metag/Kconfig.soc | 12 +
 arch/metag/Makefile|  2 +-
 arch/metag/boot/.gitignore |  2 +-
 arch/metag/boot/dts/Makefile   |  2 +
 arch/metag/boot/dts/include/dt-bindings|  1 +
 arch/metag/boot/dts/skeleton.dts   |  2 +-
 arch/metag/boot/dts/tz1090.dtsi| 41 +++
 arch/metag/boot/dts/tz1090_generic.dts | 10 
 arch/metag/configs/tz1090_defconfig| 42 +++
 arch/metag/include/asm/bug.h   |  4 +-
 arch/metag/include/asm/clock.h |  8 +++
 arch/metag/include/asm/irq.h   |  1 +
 arch/metag/include/asm/processor.h |  2 +
 arch/metag/kernel/cachepart.c  | 13 ++---
 arch/metag/kernel/clock.c  | 59 +-
 arch/metag/kernel/irq.c|  7 +--
 arch/metag/kernel/kick.c   |  9 
 arch/metag/kernel/metag_ksyms.c|  5 ++
 arch/metag/kernel/setup.c  | 16 +++---
 arch/metag/kernel/smp.c| 35 -
 arch/metag/kernel/time.c   | 14 -
 arch/metag/kernel/traps.c  |  5 +-
 arch/metag/lib/checksum.c  |  1 -
 arch/metag/mm/cache.c  |  2 +-
 drivers/clocksource/metag_generic.c|  2 +
 27 files changed, 276 insertions(+), 52 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/metag/meta.txt
 create mode 12 arch/metag/boot/dts/include/dt-bindings
 create mode 100644 arch/metag/boot/dts/tz1090.dtsi
 create mode 100644 arch/metag/boot/dts/tz1090_generic.dts
 create mode 100644 arch/metag/configs/tz1090_defconfig



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Re: [PATCH 0/7] Minor perf completion improvements

2013-07-05 Thread Ramkumar Ramachandra
Namhyung Kim wrote:
 So the whole point of this patchset is removing dependency, and no
 functional change, right?

Yep, and to lay the groundwork for extensibility: I would like to add
ZSH support in a future patchset, for instance.

 It'd be great if the completion script supports multiple events
 separated by comma esp. in a group syntax (i.e. surrounded be a pair of
 curly braces: -e '{cache-references,cache-misses}').  Could you take a
 look at that if possible?

Sure, thanks.
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[PATCH v6] ARM: clocksource: add support for MOXA ART SoCs

2013-07-05 Thread Jonas Jensen
This patch adds an clocksource driver for the main timer(s)
found on MOXA ART SoCs.

Signed-off-by: Jonas Jensen jonas.jen...@gmail.com
---

Notes:
Applies to next-20130703

Changes since v5:

1. remove global timereg_cache variable
2. use local cache for TIMER_CR register

 drivers/clocksource/Makefile   |   1 +
 drivers/clocksource/moxart_timer.c | 165 +
 2 files changed, 166 insertions(+)
 create mode 100644 drivers/clocksource/moxart_timer.c

diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 9ba8b4d..56257f6 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
 obj-$(CONFIG_ARMADA_370_XP_TIMER)  += time-armada-370-xp.o
 obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
 obj-$(CONFIG_ARCH_MARCO)   += timer-marco.o
+obj-$(CONFIG_ARCH_MOXART)  += moxart_timer.o
 obj-$(CONFIG_ARCH_MXS) += mxs_timer.o
 obj-$(CONFIG_ARCH_PRIMA2)  += timer-prima2.o
 obj-$(CONFIG_SUN4I_TIMER)  += sun4i_timer.o
diff --git a/drivers/clocksource/moxart_timer.c 
b/drivers/clocksource/moxart_timer.c
new file mode 100644
index 000..2adecdc
--- /dev/null
+++ b/drivers/clocksource/moxart_timer.c
@@ -0,0 +1,165 @@
+/*
+ * MOXA ART SoCs timer handling.
+ *
+ * Copyright (C) 2013 Jonas Jensen
+ *
+ * Jonas Jensen jonas.jen...@gmail.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed as is without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include linux/clk.h
+#include linux/clockchips.h
+#include linux/interrupt.h
+#include linux/irq.h
+#include linux/irqreturn.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/io.h
+#include linux/clocksource.h
+
+#define TIMER1_BASE0x00
+#define TIMER2_BASE0x10
+#define TIMER3_BASE0x20
+
+#define REG_COUNT  0x0 /* writable */
+#define REG_LOAD   0x4
+#define REG_MATCH1 0x8
+#define REG_MATCH2 0xC
+
+#define TIMER_CR   0x30
+#define TIMER_INTR_STATE   0x34
+#define TIMER_INTR_MASK0x38
+
+/*
+ * TIMER_CR flags:
+ *
+ * TIMEREG_CR_*_CLOCK  0: PCLK, 1: EXT1CLK
+ * TIMEREG_CR_*_INToverflow interrupt enable bit
+ */
+#define TIMEREG_CR_1_ENABLE(1  0)
+#define TIMEREG_CR_1_CLOCK (1  1)
+#define TIMEREG_CR_1_INT   (1  2)
+#define TIMEREG_CR_2_ENABLE(1  3)
+#define TIMEREG_CR_2_CLOCK (1  4)
+#define TIMEREG_CR_2_INT   (1  5)
+#define TIMEREG_CR_3_ENABLE(1  6)
+#define TIMEREG_CR_3_CLOCK (1  7)
+#define TIMEREG_CR_3_INT   (1  8)
+#define TIMEREG_CR_COUNT_UP(1  9)
+#define TIMEREG_CR_COUNT_DOWN  (0  9)
+
+static void __iomem *base;
+static unsigned int clock_count_per_tick;
+
+static void moxart_clkevt_mode(enum clock_event_mode mode,
+  struct clock_event_device *clk)
+{
+   u32 u = readl(base + TIMER_CR);
+
+   switch (mode) {
+   case CLOCK_EVT_MODE_RESUME:
+   case CLOCK_EVT_MODE_ONESHOT:
+   writel(u  ~TIMEREG_CR_1_ENABLE, base + TIMER_CR);
+   writel(~0, base + TIMER1_BASE + REG_LOAD);
+   break;
+   case CLOCK_EVT_MODE_PERIODIC:
+   writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD);
+   writel(u | TIMEREG_CR_1_ENABLE, base + TIMER_CR);
+   break;
+   case CLOCK_EVT_MODE_UNUSED:
+   case CLOCK_EVT_MODE_SHUTDOWN:
+   default:
+   writel(u  ~TIMEREG_CR_1_ENABLE, base + TIMER_CR);
+   break;
+   }
+}
+
+static int moxart_clkevt_next_event(unsigned long cycles,
+   struct clock_event_device *unused)
+{
+   u32 u1, u2;
+
+   u1 = readl(base + TIMER_CR);
+
+   writel(u1  ~TIMEREG_CR_1_ENABLE, base + TIMER_CR);
+
+   u2 = readl(base + TIMER1_BASE + REG_COUNT) - cycles;
+   writel(u2, base + TIMER1_BASE + REG_MATCH1);
+
+   writel(u1 | TIMEREG_CR_1_ENABLE, base + TIMER_CR);
+
+   return 0;
+}
+
+static struct clock_event_device moxart_clockevent = {
+   .name   = moxart_timer,
+   .rating = 200,
+   .features   = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+   .set_mode   = moxart_clkevt_mode,
+   .set_next_event = moxart_clkevt_next_event,
+};
+
+static irqreturn_t moxart_timer_interrupt(int irq, void *dev_id)
+{
+   struct clock_event_device *evt = dev_id;
+   evt-event_handler(evt);
+   return IRQ_HANDLED;
+}
+
+static struct irqaction moxart_timer_irq = {
+   .name   = moxart-timer,
+   .flags  = IRQF_TIMER,
+   .handler= moxart_timer_interrupt,
+   .dev_id = moxart_clockevent,
+};
+
+static void __init moxart_timer_init(struct device_node *node)
+{
+   

Re: scheduling while atomic hang.

2013-07-05 Thread Ingo Molnar

* Frederic Weisbecker fweis...@gmail.com wrote:

 On Fri, Jul 05, 2013 at 08:51:13AM +0200, Ingo Molnar wrote:
  
  * H. Peter Anvin h...@zytor.com wrote:
  
   On 07/03/2013 07:49 PM, Linus Torvalds wrote:
[816f42bf] __schedule+0x94f/0x9c0
[816f487e] schedule_user+0x2e/0x70
[816f6de4] retint_careful+0x12/0x2e
   
   This call trace does indeed indicate that we took a hardware
   interrupt which caused a reschedule.  It doesn't necessarily have to
   be a quantum expiration interrupt, it could just as easily be an I/O
   completion interrupt.
  
  Too bad the kernel stack frame at this point is so small [we are just 
  before return to userspace], so we don't really get our usual trace of 
  recent activities via the '?' entries ...
  
  It would be nice to have a full-kernel-stack backtrace printout as an 
  option, which prints entries 'above' the current RSP.
  
  I've Cc:-ed Frederic, maybe he has interest in implementing that?
 
 Yeah that sounds interesting. I may give it a try.

Which would be visible clearly in the output, via some clear delineation 
from the 'real' portion of the stack trace - a separator line or so?

Thanks,

Ingo
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Re: [PATCH v5] ARM: clocksource: add support for MOXA ART SoCs

2013-07-05 Thread Jonas Jensen
On 4 July 2013 23:42, Thomas Gleixner t...@linutronix.de wrote:
 You just modify bits on the cache variable. though you are not
 caching it. As it seems to work it looks like this register simply can
 be written with constants.

I agree, the global cache variable wasn't very good. The only good thing, that
it eliminated all TIMER_CR reads in moxart_clkevt_next_event.

Yes it could be written with constants, and it wouldn't be so bad, because in
this case so few need to be set. If more constants were set from init
the benefit
would be more clear.

 + timereg_cache = readl(base + TIMER_CR) | TIMEREG_CR_2_ENABLE;

 Why are you reading that back? You know excactly which of the timers
 you are using and none of those should be enabled before you reach
 that code. If it one of them is enabled by the boot loader you better
 disable it in this init function.

Removed. All timers except TIMER2 should be disabled in init.

 Now if you disable all of those timers and just use a known set, then
 you can do without a pseudo cache variable and just write constants
 into the control register, right ?

Yes, please take a look at v6.


Best regards,
Jonas
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Re: [tip:timers/core] hrtimers: Support resuming with two or more CPUs online (but stopped)

2013-07-05 Thread David Vrabel
On 05/07/13 10:30, Artem Savkov wrote:
 This commit brings up a warning about a potential deadlock in
 smp_call_function_many() discussed previously:
 https://lkml.org/lkml/2013/4/18/546

Can we just avoid the wait in clock_was_set()?  Something like this?

8--
hrtimers: do not wait for other CPUs in clock_was_set()

Calling on_each_cpu() and waiting in a softirq causes a WARNing about
a potential deadlock.

Because hrtimers are per-CPU, it is sufficient to ensure that all
other CPUs' timers are reprogrammed as soon as possible and before the
next softirq on that CPU.  There is no need to wait for this to be
complete on all CPUs.

on_each_cpu() works by IPIing all CPUs which will ensure
retrigger_next_event() will be called as earlier as possible and
before the next softirq.

Signed-off-by: David Vrabel david.vra...@citrix.com
---
 kernel/hrtimer.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
index e86827e..fd5d391 100644
--- a/kernel/hrtimer.c
+++ b/kernel/hrtimer.c
@@ -766,7 +766,7 @@ void clock_was_set(void)
 {
 #ifdef CONFIG_HIGH_RES_TIMERS
/* Retrigger the CPU local events everywhere */
-   on_each_cpu(retrigger_next_event, NULL, 1);
+   on_each_cpu(retrigger_next_event, NULL, 0);
 #endif
timerfd_clock_was_set();
 }
-- 
1.7.2.5


 
 [ 4363.082047] PM: Restoring platform NVS memory
 [ 4363.082471] [ cut here ]
 [ 4363.083800] WARNING: CPU: 0 PID: 3977 at kernel/smp.c:385 
 smp_call_function_many+0xbd/0x2c0()
 [ 4363.085789] Modules linked in:
 [ 4363.086542] CPU: 0 PID: 3977 Comm: pm-suspend Tainted: GW
 3.10.0-next-20130705 #126
 [ 4363.088634] Hardware name: Bochs Bochs, BIOS Bochs 01/01/2007
 [ 4363.090402]  0181 88001f403d98 81d2e2b7 
 821cdb2e
 [ 4363.092366]   88001f403dd8 810a278c 
 88001f403dd8
 [ 4363.094215]     
 82561898
 [ 4363.096094] Call Trace:
 [ 4363.096656]  IRQ  [81d2e2b7] dump_stack+0x59/0x82
 [ 4363.098259]  [810a278c] warn_slowpath_common+0x8c/0xc0
 [ 4363.099762]  [810a27da] warn_slowpath_null+0x1a/0x20
 [ 4363.100925]  [81118fcd] smp_call_function_many+0xbd/0x2c0
 [ 4363.101937]  [8110f0dd] ? trace_hardirqs_on+0xd/0x10
 [ 4363.102870]  [810d7030] ? hrtimer_wakeup+0x30/0x30
 [ 4363.103737]  [811193bb] smp_call_function+0x3b/0x50
 [ 4363.104609]  [810d7030] ? hrtimer_wakeup+0x30/0x30
 [ 4363.105455]  [8111943b] on_each_cpu+0x3b/0x120
 [ 4363.106249]  [810d743c] clock_was_set+0x1c/0x30
 [ 4363.107168]  [810d825c] run_hrtimer_softirq+0x2c/0x40
 [ 4363.108055]  [810acf26] __do_softirq+0x216/0x450
 [ 4363.108865]  [810ad297] irq_exit+0x77/0xb0
 [ 4363.109618]  [81d414da] smp_apic_timer_interrupt+0x4a/0x60
 [ 4363.110569]  [81d40032] apic_timer_interrupt+0x72/0x80
 [ 4363.111467]  EOI  [8110eb24] ? mark_held_locks+0x134/0x160
 [ 4363.112481]  [810f52af] ? arch_suspend_enable_irqs+0x2f/0x40
 [ 4363.113457]  [810f528e] ? arch_suspend_enable_irqs+0xe/0x40
 [ 4363.113910]  [810f54c1] suspend_enter+0x1d1/0x270
 [ 4363.114320]  [810f5794] suspend_devices_and_enter+0x1a4/0x390
 [ 4363.114887]  [810f5a74] enter_state+0xf4/0x150
 [ 4363.115288]  [810f5aeb] pm_suspend+0x1b/0x70
 [ 4363.115662]  [810f452b] state_store+0xeb/0xf0
 [ 4363.116055]  [815d3fc7] kobj_attr_store+0x17/0x20
 [ 4363.116468]  [8126f113] sysfs_write_file+0xb3/0x100
 [ 4363.116890]  [811f0aca] vfs_write+0xda/0x170
 [ 4363.117274]  [811f10b2] SyS_write+0x62/0xa0
 [ 4363.117645]  [815e01fe] ? trace_hardirqs_on_thunk+0x3a/0x3f
 [ 4363.118118]  [81d3f399] system_call_fastpath+0x16/0x1b
 [ 4363.118558] ---[ end trace 87cc49a77badea1e ]---
 [ 4363.119093] Enabling non-boot CPUs ...
 
 
 On Fri, Jun 28, 2013 at 02:18:37PM -0700, tip-bot for David Vrabel wrote:
 Commit-ID:  7c4c3a0f18ba57ea2a2985034532303d2929902a
 Gitweb: 
 http://git.kernel.org/tip/7c4c3a0f18ba57ea2a2985034532303d2929902a
 Author: David Vrabel david.vra...@citrix.com
 AuthorDate: Thu, 27 Jun 2013 11:35:44 +0100
 Committer:  Thomas Gleixner t...@linutronix.de
 CommitDate: Fri, 28 Jun 2013 23:15:06 +0200

 hrtimers: Support resuming with two or more CPUs online (but stopped)

 hrtimers_resume() only reprograms the timers for the current CPU as it
 assumes that all other CPUs are offline at this point in the resume
 process. If other CPUs are online then their timers will not be
 corrected and they may fire at the wrong time.

 When running as a Xen guest, this assumption is not true.  Non-boot
 CPUs are only stopped with IRQs disabled instead of offlining them.
 This is a performance optimization as disabling the CPUs would add

Re: [PATCH 11/13] sched: Check current-mm before allocating NUMA faults

2013-07-05 Thread Mel Gorman
On Thu, Jul 04, 2013 at 06:18:23PM +0530, Srikar Dronamraju wrote:
 * Mel Gorman mgor...@suse.de [2013-07-03 15:21:38]:
 
  task_numa_placement checks current-mm but after buffers for faults
  have already been uselessly allocated. Move the check earlier.
  
  [pet...@infradead.org: Identified the problem]
  Signed-off-by: Mel Gorman mgor...@suse.de
  ---
   kernel/sched/fair.c | 22 ++
   1 file changed, 14 insertions(+), 8 deletions(-)
  
  diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
  index 336074f..3c796b0 100644
  --- a/kernel/sched/fair.c
  +++ b/kernel/sched/fair.c
  @@ -870,8 +870,6 @@ static void task_numa_placement(struct task_struct *p)
  int seq, nid, max_nid = 0;
  unsigned long max_faults = 0;
  
  -   if (!p-mm) /* for example, ksmd faulting in a user's mm */
  -   return;
  seq = ACCESS_ONCE(p-mm-numa_scan_seq);
  if (p-numa_scan_seq == seq)
  return;
  @@ -945,6 +943,12 @@ void task_numa_fault(int last_nid, int node, int 
  pages, bool migrated)
  if (!sched_feat_numa(NUMA))
  return;
  
  +   /* for example, ksmd faulting in a user's mm */
  +   if (!p-mm) {
  +   p-numa_scan_period = sysctl_numa_balancing_scan_period_max;
 
 Naive question:
 Why are we resetting the scan_period?
 

At the time I wrote it I was thinking of tick times and meant to recheck
if it's necessary but then it slipped my mind. The reset is unnecessary
as curr-mm is already checked.

-- 
Mel Gorman
SUSE Labs
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Re: [tip:timers/core] hrtimers: Support resuming with two or more CPUs online (but stopped)

2013-07-05 Thread Thomas Gleixner
On Fri, 5 Jul 2013, Artem Savkov wrote:

 This commit brings up a warning about a potential deadlock in
 smp_call_function_many() discussed previously:
 https://lkml.org/lkml/2013/4/18/546

 On Fri, Jun 28, 2013 at 02:18:37PM -0700, tip-bot for David Vrabel wrote:
  Commit-ID:  7c4c3a0f18ba57ea2a2985034532303d2929902a

It's not caused by this commit. The problem was there before. We call
clock_was_set() from softirq context because we cannot call it from
the timer interrupt.

So that new WARN on in the smp code requires us to move that call out
from softirq context.

Does the patch below fix it ?

Thanks,

tglx

---
diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
index e86827e..24c6f3b 100644
--- a/kernel/hrtimer.c
+++ b/kernel/hrtimer.c
@@ -721,6 +721,18 @@ static int hrtimer_switch_to_hres(void)
return 1;
 }
 
+static void clock_was_set_work(struct work_struct *work)
+{
+   clock_was_set();
+}
+
+static DECLARE_WORK(hrtimer_work, clock_was_set_work);
+
+static void softirq_clock_was_set(void)
+{
+   schedule_work(hrtimer_work);
+}
+
 /*
  * Called from timekeeping code to reprogramm the hrtimer interrupt
  * device. If called from the timer interrupt context we defer it to
@@ -748,7 +760,10 @@ static inline int hrtimer_enqueue_reprogram(struct hrtimer 
*timer,
 }
 static inline void hrtimer_init_hres(struct hrtimer_cpu_base *base) { }
 static inline void retrigger_next_event(void *arg) { }
-
+static void softirq_clock_was_set(void)
+{
+   clock_was_set();
+}
 #endif /* CONFIG_HIGH_RES_TIMERS */
 
 /*
@@ -1445,7 +1460,7 @@ static void run_hrtimer_softirq(struct softirq_action *h)
 
if (cpu_base-clock_was_set) {
cpu_base-clock_was_set = 0;
-   clock_was_set();
+   softirq_clock_was_set();
}
 
hrtimer_peek_ahead_timers();


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Re: [tip:timers/core] hrtimers: Support resuming with two or more CPUs online (but stopped)

2013-07-05 Thread Thomas Gleixner
On Fri, 5 Jul 2013, David Vrabel wrote:

 On 05/07/13 10:30, Artem Savkov wrote:
  This commit brings up a warning about a potential deadlock in
  smp_call_function_many() discussed previously:
  https://lkml.org/lkml/2013/4/18/546
 
 Can we just avoid the wait in clock_was_set()?  Something like this?
 
 8--
 hrtimers: do not wait for other CPUs in clock_was_set()
 
 Calling on_each_cpu() and waiting in a softirq causes a WARNing about
 a potential deadlock.
 
 Because hrtimers are per-CPU, it is sufficient to ensure that all
 other CPUs' timers are reprogrammed as soon as possible and before the
 next softirq on that CPU.  There is no need to wait for this to be
 complete on all CPUs.

Cute. Did not think about that!
 
 on_each_cpu() works by IPIing all CPUs which will ensure
 retrigger_next_event() will be called as earlier as possible and
 before the next softirq.
 
 Signed-off-by: David Vrabel david.vra...@citrix.com
 ---
  kernel/hrtimer.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
 index e86827e..fd5d391 100644
 --- a/kernel/hrtimer.c
 +++ b/kernel/hrtimer.c
 @@ -766,7 +766,7 @@ void clock_was_set(void)
  {
  #ifdef CONFIG_HIGH_RES_TIMERS
   /* Retrigger the CPU local events everywhere */
 - on_each_cpu(retrigger_next_event, NULL, 1);
 + on_each_cpu(retrigger_next_event, NULL, 0);
  #endif
   timerfd_clock_was_set();
  }
 -- 
 1.7.2.5
 
 
  
  [ 4363.082047] PM: Restoring platform NVS memory
  [ 4363.082471] [ cut here ]
  [ 4363.083800] WARNING: CPU: 0 PID: 3977 at kernel/smp.c:385 
  smp_call_function_many+0xbd/0x2c0()
  [ 4363.085789] Modules linked in:
  [ 4363.086542] CPU: 0 PID: 3977 Comm: pm-suspend Tainted: GW
  3.10.0-next-20130705 #126
  [ 4363.088634] Hardware name: Bochs Bochs, BIOS Bochs 01/01/2007
  [ 4363.090402]  0181 88001f403d98 81d2e2b7 
  821cdb2e
  [ 4363.092366]   88001f403dd8 810a278c 
  88001f403dd8
  [ 4363.094215]     
  82561898
  [ 4363.096094] Call Trace:
  [ 4363.096656]  IRQ  [81d2e2b7] dump_stack+0x59/0x82
  [ 4363.098259]  [810a278c] warn_slowpath_common+0x8c/0xc0
  [ 4363.099762]  [810a27da] warn_slowpath_null+0x1a/0x20
  [ 4363.100925]  [81118fcd] smp_call_function_many+0xbd/0x2c0
  [ 4363.101937]  [8110f0dd] ? trace_hardirqs_on+0xd/0x10
  [ 4363.102870]  [810d7030] ? hrtimer_wakeup+0x30/0x30
  [ 4363.103737]  [811193bb] smp_call_function+0x3b/0x50
  [ 4363.104609]  [810d7030] ? hrtimer_wakeup+0x30/0x30
  [ 4363.105455]  [8111943b] on_each_cpu+0x3b/0x120
  [ 4363.106249]  [810d743c] clock_was_set+0x1c/0x30
  [ 4363.107168]  [810d825c] run_hrtimer_softirq+0x2c/0x40
  [ 4363.108055]  [810acf26] __do_softirq+0x216/0x450
  [ 4363.108865]  [810ad297] irq_exit+0x77/0xb0
  [ 4363.109618]  [81d414da] smp_apic_timer_interrupt+0x4a/0x60
  [ 4363.110569]  [81d40032] apic_timer_interrupt+0x72/0x80
  [ 4363.111467]  EOI  [8110eb24] ? mark_held_locks+0x134/0x160
  [ 4363.112481]  [810f52af] ? arch_suspend_enable_irqs+0x2f/0x40
  [ 4363.113457]  [810f528e] ? arch_suspend_enable_irqs+0xe/0x40
  [ 4363.113910]  [810f54c1] suspend_enter+0x1d1/0x270
  [ 4363.114320]  [810f5794] suspend_devices_and_enter+0x1a4/0x390
  [ 4363.114887]  [810f5a74] enter_state+0xf4/0x150
  [ 4363.115288]  [810f5aeb] pm_suspend+0x1b/0x70
  [ 4363.115662]  [810f452b] state_store+0xeb/0xf0
  [ 4363.116055]  [815d3fc7] kobj_attr_store+0x17/0x20
  [ 4363.116468]  [8126f113] sysfs_write_file+0xb3/0x100
  [ 4363.116890]  [811f0aca] vfs_write+0xda/0x170
  [ 4363.117274]  [811f10b2] SyS_write+0x62/0xa0
  [ 4363.117645]  [815e01fe] ? trace_hardirqs_on_thunk+0x3a/0x3f
  [ 4363.118118]  [81d3f399] system_call_fastpath+0x16/0x1b
  [ 4363.118558] ---[ end trace 87cc49a77badea1e ]---
  [ 4363.119093] Enabling non-boot CPUs ...
  
  
  On Fri, Jun 28, 2013 at 02:18:37PM -0700, tip-bot for David Vrabel wrote:
  Commit-ID:  7c4c3a0f18ba57ea2a2985034532303d2929902a
  Gitweb: 
  http://git.kernel.org/tip/7c4c3a0f18ba57ea2a2985034532303d2929902a
  Author: David Vrabel david.vra...@citrix.com
  AuthorDate: Thu, 27 Jun 2013 11:35:44 +0100
  Committer:  Thomas Gleixner t...@linutronix.de
  CommitDate: Fri, 28 Jun 2013 23:15:06 +0200
 
  hrtimers: Support resuming with two or more CPUs online (but stopped)
 
  hrtimers_resume() only reprograms the timers for the current CPU as it
  assumes that all other CPUs are offline at this point in the resume
  process. If other CPUs are online then their timers will not be
  corrected and they may fire at the wrong time.
 
  When running as a Xen guest

Re: [PATCH RFC WIP] Process weights based scheduling for better consolidation

2013-07-05 Thread Peter Zijlstra
On Thu, Jul 04, 2013 at 11:32:27PM +0530, Srikar Dronamraju wrote:
 Here is an approach to look at numa balanced scheduling from a non numa fault
 angle. This approach uses process weights instead of faults as a basis to
 move or bring tasks together.

That doesn't make any sense. how would weight be related to numa
placement?

What it appears to do it simply group tasks based on -mm. And by
keeping them somewhat sticky to the same node it gets locality.

What about multi-process shared memory workloads? Its one of the things
I disliked about autonuma. It completely disregards the multi-process
scenario.

If you want to go without faults; you also won't migrate memory along
and if you just happen to place your workload elsewhere you've no idea
where your memory is. If you have the faults, you might as well account
them to get a notion of where the memory is at; its nearly free at that
point anyway.

Load spikes/fluctuations can easily lead to transient task movement to
keep balance. If these movements are indeed transient you want to return
to where you came from; however if they are not.. you want the memory to
come to you.

 +static void account_numa_enqueue(struct cfs_rq *cfs_rq, struct task_struct 
 *p)
 +{
 + struct rq *rq = rq_of(cfs_rq);
 + unsigned long task_load = 0;
 + int curnode = cpu_to_node(cpu_of(rq));
 +#ifdef CONFIG_SCHED_AUTOGROUP
 + struct sched_entity *se;
 +
 + se = cfs_rq-tg-se[cpu_of(rq)];
 + if (!se)
 + return;
 +
 + if (cfs_rq-load.weight) {
 + task_load =  p-se.load.weight * se-load.weight;
 + task_load /= cfs_rq-load.weight;
 + } else {
 + task_load = 0;
 + }
 +#else
 + task_load = p-se.load.weight;
 +#endif

This looks broken; didn't you want to use task_h_load() here? There's
nothing autogroup specific about task_load. If anything you want to do
full cgroup which I think reduces to task_h_load() here.

 + p-task_load = 0;
 + if (!task_load)
 + return;
 +
 + if (p-mm  p-mm-numa_weights) {
 + p-mm-numa_weights[curnode] += task_load;
 + p-mm-numa_weights[nr_node_ids] += task_load;
 + }
 +
 + if (p-nr_cpus_allowed != num_online_cpus())
 + rq-pinned_load += task_load;
 + p-task_load = task_load;
 +}
 +

 @@ -5529,6 +5769,76 @@ static void rebalance_domains(int cpu, enum 
 cpu_idle_type idle)
   if (!balance)
   break;
   }
 +#ifdef CONFIG_NUMA_BALANCING
 + if (!rq-nr_running) {

This would only work for under utilized systems...

 + }
 +#endif
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[PATCH v2 4/4] perf/Perf-Trace-Util: regenerate Context.c

2013-07-05 Thread Ramkumar Ramachandra
From Context.xs, using the procedure described in the README.  Now, a
simple

  $ make

builds everything correctly.

Cc: Tom Zanussi tom.zanu...@linux.intel.com
Cc: Arnaldo Carvalho de Melo a...@redhat.com
Signed-off-by: Ramkumar Ramachandra artag...@gmail.com
---
 tools/perf/scripts/perl/Perf-Trace-Util/Context.c | 215 +-
 1 file changed, 173 insertions(+), 42 deletions(-)

diff --git a/tools/perf/scripts/perl/Perf-Trace-Util/Context.c 
b/tools/perf/scripts/perl/Perf-Trace-Util/Context.c
index 790ceba..7974f2b 100644
--- a/tools/perf/scripts/perl/Perf-Trace-Util/Context.c
+++ b/tools/perf/scripts/perl/Perf-Trace-Util/Context.c
@@ -1,8 +1,8 @@
 /*
- * This file was generated automatically by ExtUtils::ParseXS version 2.18_02 
from the
+ * This file was generated automatically by ExtUtils::ParseXS version 3.18 
from the
  * contents of Context.xs. Do not edit this file, edit Context.xs instead.
  *
- * ANY CHANGES MADE HERE WILL BE LOST! 
+ *ANY CHANGES MADE HERE WILL BE LOST!
  *
  */
 
@@ -28,31 +28,165 @@
  *
  */
 
-#include EXTERN.h
-#include perl.h
+#include EXTERN.h
+#include ../../../util/perf-perl.h
 #include XSUB.h
 #include ../../../perf.h
 #include ../../../util/trace-event.h
 
+#line 38 Context.c
 #ifndef PERL_UNUSED_VAR
 #  define PERL_UNUSED_VAR(var) if (0) var = var
 #endif
 
-#line 42 Context.c
+#ifndef dVAR
+#  define dVAR dNOOP
+#endif
+
+
+/* This stuff is not part of the API! You have been warned. */
+#ifndef PERL_VERSION_DECIMAL
+#  define PERL_VERSION_DECIMAL(r,v,s) (r*100 + v*1000 + s)
+#endif
+#ifndef PERL_DECIMAL_VERSION
+#  define PERL_DECIMAL_VERSION \
+ PERL_VERSION_DECIMAL(PERL_REVISION,PERL_VERSION,PERL_SUBVERSION)
+#endif
+#ifndef PERL_VERSION_GE
+#  define PERL_VERSION_GE(r,v,s) \
+ (PERL_DECIMAL_VERSION = PERL_VERSION_DECIMAL(r,v,s))
+#endif
+#ifndef PERL_VERSION_LE
+#  define PERL_VERSION_LE(r,v,s) \
+ (PERL_DECIMAL_VERSION = PERL_VERSION_DECIMAL(r,v,s))
+#endif
+
+/* XS_INTERNAL is the explicit static-linkage variant of the default
+ * XS macro.
+ *
+ * XS_EXTERNAL is the same as XS_INTERNAL except it does not include
+ * STATIC, ie. it exports XSUB symbols. You probably don't want that
+ * for anything but the BOOT XSUB.
+ *
+ * See XSUB.h in core!
+ */
+
+
+/* TODO: This might be compatible further back than 5.10.0. */
+#if PERL_VERSION_GE(5, 10, 0)  PERL_VERSION_LE(5, 15, 1)
+#  undef XS_EXTERNAL
+#  undef XS_INTERNAL
+#  if defined(__CYGWIN__)  defined(USE_DYNAMIC_LOADING)
+#define XS_EXTERNAL(name) __declspec(dllexport) XSPROTO(name)
+#define XS_INTERNAL(name) STATIC XSPROTO(name)
+#  endif
+#  if defined(__SYMBIAN32__)
+#define XS_EXTERNAL(name) EXPORT_C XSPROTO(name)
+#define XS_INTERNAL(name) EXPORT_C STATIC XSPROTO(name)
+#  endif
+#  ifndef XS_EXTERNAL
+#if defined(HASATTRIBUTE_UNUSED)  !defined(__cplusplus)
+#  define XS_EXTERNAL(name) void name(pTHX_ CV* cv __attribute__unused__)
+#  define XS_INTERNAL(name) STATIC void name(pTHX_ CV* cv 
__attribute__unused__)
+#else
+#  ifdef __cplusplus
+#define XS_EXTERNAL(name) extern C XSPROTO(name)
+#define XS_INTERNAL(name) static XSPROTO(name)
+#  else
+#define XS_EXTERNAL(name) XSPROTO(name)
+#define XS_INTERNAL(name) STATIC XSPROTO(name)
+#  endif
+#endif
+#  endif
+#endif
+
+/* perl = 5.10.0  perl = 5.15.1 */
+
+
+/* The XS_EXTERNAL macro is used for functions that must not be static
+ * like the boot XSUB of a module. If perl didn't have an XS_EXTERNAL
+ * macro defined, the best we can do is assume XS is the same.
+ * Dito for XS_INTERNAL.
+ */
+#ifndef XS_EXTERNAL
+#  define XS_EXTERNAL(name) XS(name)
+#endif
+#ifndef XS_INTERNAL
+#  define XS_INTERNAL(name) XS(name)
+#endif
+
+/* Now, finally, after all this mess, we want an ExtUtils::ParseXS
+ * internal macro that we're free to redefine for varying linkage due
+ * to the EXPORT_XSUB_SYMBOLS XS keyword. This is internal, use
+ * XS_EXTERNAL(name) or XS_INTERNAL(name) in your code if you need to!
+ */
+
+#undef XS_EUPXS
+#if defined(PERL_EUPXS_ALWAYS_EXPORT)
+#  define XS_EUPXS(name) XS_EXTERNAL(name)
+#else
+   /* default to internal */
+#  define XS_EUPXS(name) XS_INTERNAL(name)
+#endif
+
+#ifndef PERL_ARGS_ASSERT_CROAK_XS_USAGE
+#define PERL_ARGS_ASSERT_CROAK_XS_USAGE assert(cv); assert(params)
+
+/* prototype to pass -Wmissing-prototypes */
+STATIC void
+S_croak_xs_usage(pTHX_ const CV *const cv, const char *const params);
 
-XS(XS_Perf__Trace__Context_common_pc); /* prototype to pass 
-Wmissing-prototypes */
-XS(XS_Perf__Trace__Context_common_pc)
+STATIC void
+S_croak_xs_usage(pTHX_ const CV *const cv, const char *const params)
 {
-#ifdef dVAR
-dVAR; dXSARGS;
+const GV *const gv = CvGV(cv);
+
+PERL_ARGS_ASSERT_CROAK_XS_USAGE;
+
+if (gv) {
+const char *const gvname = GvNAME(gv);
+const HV *const stash = GvSTASH(gv);
+const char *const hvname = stash ? HvNAME(stash) : NULL;
+

Re: [PATCH 0/2] ARM: sunxi: Convert DTSI to new CPU bindings

2013-07-05 Thread Lorenzo Pieralisi
On Sun, Jun 30, 2013 at 10:48:46AM +0100, Lorenzo Pieralisi wrote:
 On Sat, Jun 29, 2013 at 08:38:19PM +0100, Russell King - ARM Linux wrote:
  On Fri, Jun 28, 2013 at 01:05:42PM -0700, Olof Johansson wrote:
   On Fri, Jun 28, 2013 at 1:03 PM, Maxime Ripard
   maxime.rip...@free-electrons.com wrote:
On Fri, Jun 28, 2013 at 06:15:32PM +0100, Lorenzo Pieralisi wrote:
The patch above should already be queued in next/dt right ?
   
Indeed.
   
Then why the latest patch of your patchset got in 3.10, while the
patches actually fixing the DT it would have impacted were delayed to
3.11?
   
(And why was it merged so late in the development cycle?)
   
   This. So now we have to scramble because some device trees will
   produce warnings at boot.
   
   Russell, the alternative is to revert Lorenzo's patch for 3.10 (and
   re-introduce it for 3.11). Do you have a preference?
  
  Sorry but I really don't understand what all the fuss in this thread
  is about.
  
  This thread seems to be saying that two development patches were
  merged, which were 7762/1 and 7763/1, and that 7764/1 is a fix?
  Are you sure about that, because that's not how they're described,
  and not how they look either.
 
 As Olof's warning downgrade is being merged (thanks for that and apologies for
 failing to explain patches dependencies properly and stable related issues),
 7764/1 won't apply cleanly anymore. Can you please drop it from the patch
 system, I will update it and test it first thing tomorrow and send a
 final version to the patch system.

Patch 7779/1, replacing 7764/1 is in the patch system now, and is ready
to get merged.

Unfortunately cpu/cpus bindings documentation updates, following:

https://lists.ozlabs.org/pipermail/devicetree-discuss/2013-June/036735.html
https://lists.ozlabs.org/pipermail/devicetree-discuss/2013-May/033779.html

were not pulled in the kernel. This is an issue since this means that
we still have no reference in the kernel or wherever it has to be, to
the final cpus/cpu bindings for ARM and ARM64 provided in the pull
request link above (that has been reviewed to death and acknowledged).

It is a significant overhaul of cpu/cpus bindings standard for ARM/ARM64,
covering all CPUs harking back to arm926 and beyond, and should be final.

dts updates following that standard have already been pulled into 3.11
through arm-soc.

IMHO the bindings contained in pull request above must be merged in the
kernel asap, I would like to ask you please what should I do to get them in
please. If we want to move bindings documentation elsewhere let's do it,
as long as there is a published standard I am happy and will stop annoying
you with this stuff.

Thank you very much,
Lorenzo

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[PATCH v2 0/4] Minor perf build fixes

2013-07-05 Thread Ramkumar Ramachandra
Hi,

After Namhyung's review of the first iteration, I realized that I'd
made a few mistakes.  This iteration should be much better.

[1/4] is the same as before.

[2/4] is new, and is used in [4/4].

[3/4] introduces a util/perf-perl.h to include perl.h with #pragma
statements, hence eliminating duplication.  It then updates Context.xs
and trace-event-perl.c to use this new header.

Also, notice that feature-tests.mak has not been touched in this
iteration: the Perl check passes without needing the #pragma
statements (although I'm not sure why exactly).

Thanks.

Ramkumar Ramachandra (4):
  perf/Makefile: do not open-code shell-sq
  perf/Perf-Trace-Util: fix broken include in Context.xs
  perf: squelch warnings from perl.h to compile-pass
  perf/Perf-Trace-Util: regenerate Context.c

 tools/perf/Makefile|   2 +-
 tools/perf/config/Makefile |  23 ++-
 tools/perf/scripts/perl/Perf-Trace-Util/Context.c  | 215 +
 tools/perf/scripts/perl/Perf-Trace-Util/Context.xs |   6 +-
 tools/perf/util/perf-perl.h|  10 +
 .../perf/util/scripting-engines/trace-event-perl.c |   2 +-
 6 files changed, 199 insertions(+), 59 deletions(-)
 create mode 100644 tools/perf/util/perf-perl.h

-- 
1.8.3.1.643.gebeea52.dirty

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[PATCH v2 1/4] perf/Makefile: do not open-code shell-sq

2013-07-05 Thread Ramkumar Ramachandra
d24e473e (perf_counter: copy in Git's top Makefile, 2009-04-20) started
by determining *_SQ variables (shell-quoted equivalents) by calling
subst by hand, with the rationale that $(call) must be avoided to
accommodate ancient setups.  That reasoning does not hold true anymore,
as our Makefiles are filled with $(call) invocations now.  So, use the
shell-sq function introduced in ced465c4 (perf tools: Makefile:
PYTHON{,_CONFIG} to bandage Python 3 incompatibility, 2011-04-02) in
place of open-coding.

Cc: Michael Witten mfwit...@gmail.com
Cc: Ingo Molnar mi...@kernel.org
Signed-off-by: Ramkumar Ramachandra artag...@gmail.com
---
 tools/perf/Makefile|  2 +-
 tools/perf/config/Makefile | 23 +++
 2 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/tools/perf/Makefile b/tools/perf/Makefile
index 203cb0e..ace1784 100644
--- a/tools/perf/Makefile
+++ b/tools/perf/Makefile
@@ -731,7 +731,7 @@ cscope:
$(FIND) . -name '*.[hcS]' -print | xargs cscope -b
 
 ### Detect prefix changes
-TRACK_CFLAGS = $(subst ','\'',$(CFLAGS)):\
+TRACK_CFLAGS = $(call escape-for-shell-sq,$(CFLAGS)):\
  $(bindir_SQ):$(perfexecdir_SQ):$(template_dir_SQ):$(prefix_SQ)
 
 $(OUTPUT)PERF-CFLAGS: .FORCE-PERF-CFLAGS
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index f139dcd..3025d87 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -457,21 +457,20 @@ ETC_PERFCONFIG = etc/perfconfig
 endif
 lib = lib
 
-# Shell quote (do not use $(call) to accommodate ancient setups);
-ETC_PERFCONFIG_SQ = $(subst ','\'',$(ETC_PERFCONFIG))
-DESTDIR_SQ = $(subst ','\'',$(DESTDIR))
-bindir_SQ = $(subst ','\'',$(bindir))
-mandir_SQ = $(subst ','\'',$(mandir))
-infodir_SQ = $(subst ','\'',$(infodir))
-perfexecdir_SQ = $(subst ','\'',$(perfexecdir))
-template_dir_SQ = $(subst ','\'',$(template_dir))
-htmldir_SQ = $(subst ','\'',$(htmldir))
-prefix_SQ = $(subst ','\'',$(prefix))
-sysconfdir_SQ = $(subst ','\'',$(sysconfdir))
+ETC_PERFCONFIG_SQ = $(call shell-sq,$(ETC_PERFCONFIG))
+DESTDIR_SQ = $(call shell-sq,$(DESTDIR))
+bindir_SQ = $(call shell-sq,$(bindir))
+mandir_SQ = $(call shell-sq,$(mandir))
+infodir_SQ = $(call shell-sq,$(infodir))
+perfexecdir_SQ = $(call shell-sq,$(perfexecdir))
+template_dir_SQ = $(call shell-sq,$(template_dir))
+htmldir_SQ = $(call shell-sq,$(htmldir))
+prefix_SQ = $(call shell-sq,$(prefix))
+sysconfdir_SQ = $(call shell-sq,$(sysconfdir))
 
 ifneq ($(filter /%,$(firstword $(perfexecdir))),)
 perfexec_instdir = $(perfexecdir)
 else
 perfexec_instdir = $(prefix)/$(perfexecdir)
 endif
-perfexec_instdir_SQ = $(subst ','\'',$(perfexec_instdir))
+perfexec_instdir_SQ = $(call shell-sq,$(perfexec_instdir))
-- 
1.8.3.1.643.gebeea52.dirty

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Re: [PATCH v5] ARM: clocksource: add support for MOXA ART SoCs

2013-07-05 Thread Thomas Gleixner
On Fri, 5 Jul 2013, Jonas Jensen wrote:

 On 4 July 2013 23:42, Thomas Gleixner t...@linutronix.de wrote:
  You just modify bits on the cache variable. though you are not
  caching it. As it seems to work it looks like this register simply can
  be written with constants.
 
 I agree, the global cache variable wasn't very good. The only good thing, 
 that
 it eliminated all TIMER_CR reads in moxart_clkevt_next_event.

Well, you can use a global cache variable. But that wants to be
implemented as a real cache, i.e. it always contains the current state
of the register.

   cache = 0;

   cache |= T2_ENABLE;
   write(cache, CR);
   
 
 Yes it could be written with constants, and it wouldn't be so bad, because in
 this case so few need to be set. If more constants were set from init
 the benefit
 would be more clear.

  + timereg_cache = readl(base + TIMER_CR) | TIMEREG_CR_2_ENABLE;
 
  Why are you reading that back? You know excactly which of the timers
  you are using and none of those should be enabled before you reach
  that code. If it one of them is enabled by the boot loader you better
  disable it in this init function.
 
 Removed. All timers except TIMER2 should be disabled in init.
 
  Now if you disable all of those timers and just use a known set, then
  you can do without a pseudo cache variable and just write constants
  into the control register, right ?
 
 Yes, please take a look at v6.

You are still reading from the control register.

What's wrong with:

#define T1_ENABLE   (TIMEREG_CR_2_ENABLE | TIMEREG_CR_1_ENABLE)
#define T1_DISABLE  (TIMEREG_CR_2_ENABLE)

Because you need to preserve the CR2 enable bit so your clocksource
does not get switched off.

Then the set_mode/next_event functions simply do:

 write(T1_DISABLE)
 write(data)
 write(T1_ENABLE)

Hmm?

Thanks,

tglx
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[PATCH v2 2/4] perf/Perf-Trace-Util: fix broken include in Context.xs

2013-07-05 Thread Ramkumar Ramachandra
765532c8 (perf script: Finish the rename from trace to script,
2010-12-23) made a mistake during find-and-replace replacing
../../../util/trace-event.h with ../../../util/script-event.h, a
non-existent file.  Fix this include.

Cc: Arnaldo Carvalho de Melo a...@redhat.com
Signed-off-by: Ramkumar Ramachandra artag...@gmail.com
---
 tools/perf/scripts/perl/Perf-Trace-Util/Context.xs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/scripts/perl/Perf-Trace-Util/Context.xs 
b/tools/perf/scripts/perl/Perf-Trace-Util/Context.xs
index c1e2ed1..8c7ea42 100644
--- a/tools/perf/scripts/perl/Perf-Trace-Util/Context.xs
+++ b/tools/perf/scripts/perl/Perf-Trace-Util/Context.xs
@@ -23,7 +23,7 @@
 #include perl.h
 #include XSUB.h
 #include ../../../perf.h
-#include ../../../util/script-event.h
+#include ../../../util/trace-event.h
 
 MODULE = Perf::Trace::Context  PACKAGE = Perf::Trace::Context
 PROTOTYPES: ENABLE
-- 
1.8.3.1.643.gebeea52.dirty

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[PATCH v2 3/4] perf: squelch warnings from perl.h to compile-pass

2013-07-05 Thread Ramkumar Ramachandra
Currently, a simple

  $ make

errors out because we compile with -Werror by default, turning all
warnings into errors.  Although no warnings are emitted by our code
itself, two kinds of warnings are emitted by perl.h (perl 5.18.0):

  -Wundef and -Wswitch-default

Use #pragma statements to squelch exactly those warnings.  The next
patch will regenerate Context.c from Context.xs and make the compile
pass.

Cc: Arnaldo Carvalho de Melo a...@redhat.com
Cc: Namhyung Kim namhyung@lge.com
Signed-off-by: Ramkumar Ramachandra artag...@gmail.com
---
 tools/perf/scripts/perl/Perf-Trace-Util/Context.xs   |  4 ++--
 tools/perf/util/perf-perl.h  | 10 ++
 tools/perf/util/scripting-engines/trace-event-perl.c |  2 +-
 3 files changed, 13 insertions(+), 3 deletions(-)
 create mode 100644 tools/perf/util/perf-perl.h

diff --git a/tools/perf/scripts/perl/Perf-Trace-Util/Context.xs 
b/tools/perf/scripts/perl/Perf-Trace-Util/Context.xs
index 8c7ea42..509d22e 100644
--- a/tools/perf/scripts/perl/Perf-Trace-Util/Context.xs
+++ b/tools/perf/scripts/perl/Perf-Trace-Util/Context.xs
@@ -19,8 +19,8 @@
  *
  */
 
-#include EXTERN.h
-#include perl.h
+#include EXTERN.h
+#include ../../../util/perf-perl.h
 #include XSUB.h
 #include ../../../perf.h
 #include ../../../util/trace-event.h
diff --git a/tools/perf/util/perf-perl.h b/tools/perf/util/perf-perl.h
new file mode 100644
index 000..49995d2
--- /dev/null
+++ b/tools/perf/util/perf-perl.h
@@ -0,0 +1,10 @@
+#ifndef __PERF_PERL_H
+#define __PERF_PERL_H
+
+#pragma GCC diagnostic ignored -Wundef
+#pragma GCC diagnostic ignored -Wswitch-default
+#include perl.h
+#pragma GCC diagnostic error -Wundef
+#pragma GCC diagnostic error -Wswitch-default
+
+#endif
diff --git a/tools/perf/util/scripting-engines/trace-event-perl.c 
b/tools/perf/util/scripting-engines/trace-event-perl.c
index eacec85..25fd2dc 100644
--- a/tools/perf/util/scripting-engines/trace-event-perl.c
+++ b/tools/perf/util/scripting-engines/trace-event-perl.c
@@ -27,7 +27,7 @@
 
 #include ../util.h
 #include EXTERN.h
-#include perl.h
+#include ../perf-perl.h
 
 #include ../../perf.h
 #include ../thread.h
-- 
1.8.3.1.643.gebeea52.dirty

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Re: [PATCH v2 2/2] perf tools: Make Power7 events available for perf

2013-07-05 Thread Ingo Molnar

* Peter Zijlstra pet...@infradead.org wrote:

 On Thu, Jul 04, 2013 at 10:52:18PM +1000, Michael Ellerman wrote:
  I don't think it even needs libpfm4, just some csv files in tools/perf
  would do the trick.
 
 Right; I think Stephane and Jiri are in favour of creating a 'new' 
 project that includes just the event definitions in a plain text format 
 and a little library with parser to be used by all interested parties.

I'd be fine with that if it's stuck somewhere into tools/lib/ or so.

Thanks,

Ingo
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Re: [RFC PATCH] sched, wait: wake_up_preempt() for first-order low-latency wakeups (to use in input subsystem)

2013-07-05 Thread Peter Zijlstra
On Fri, Jul 05, 2013 at 02:06:32PM +0400, Kirill Tkhai wrote:
 The patch introduces new primitives for waking up tasks, latencies of which
 are appreciable by user directly, that need the first-order interactivity.
 
 The appliable area is not wide. It's generally input subsystem and wake_ups
 of tasks waiting for user actions: keyboard press, mouse movement etc. 

Ha! before you know it tons of drivers are using this because they all
think their interrupts it the most important thing on earth.. seriously!

 diff --git a/kernel/sched/rt.c b/kernel/sched/rt.c
 index 01970c8..8b8b328 100644
 --- a/kernel/sched/rt.c
 +++ b/kernel/sched/rt.c
 @@ -1226,8 +1226,21 @@ out:
   return cpu;
  }
  
 -static void check_preempt_equal_prio(struct rq *rq, struct task_struct *p)
 +static void check_preempt_equal_prio(struct rq *rq, struct task_struct *p, 
 int flags)
  {
 + /*
 +  * If:
 +  *
 +  * - the newly woken task is of equal priority to the current task
 +  * - the newly woken task is non-migratable while current is migratable
 +  * - current will be preempted on the next reschedule
 +  *
 +  * we should check to see if current can readily move to a different
 +  * cpu.  If so, we will reschedule to allow the push logic to try
 +  * to move current somewhere else, making room for our non-migratable
 +  * task.
 +  */
 +
   if (rq-curr-nr_cpus_allowed == 1)
   return;
  
 @@ -1235,7 +1248,8 @@ static void check_preempt_equal_prio(struct rq *rq, 
 struct task_struct *p)
cpupri_find(rq-rd-cpupri, p, NULL))
   return;
  
 - if (!cpupri_find(rq-rd-cpupri, rq-curr, NULL))
 + if (!cpupri_find(rq-rd-cpupri, rq-curr, NULL) 
 + !(flags  WF_PREEMPT))
   return;
  
   /*
 @@ -1246,7 +1260,15 @@ static void check_preempt_equal_prio(struct rq *rq, 
 struct task_struct *p)
   requeue_task_rt(rq, p, 1);
   resched_task(rq-curr);
  }
 +#else /* !CONFIG_SMP */
 +static void check_preempt_equal_prio(struct rq *rq, struct task_struct *p, 
 int flags)
 +{
 + if (!(flags  WF_PREEMPT))
 + return;
  
 + requeue_task_rt(rq, p, 1);
 + resched_task(rq-curr);
 +}

You can't do this:

  http://pubs.opengroup.org/onlinepubs/009696899/functions/xsh_chap02_08.html

SCHED_FIFO;

2) When a blocked thread becomes a runnable thread, it becomes the tail
   of the thread list for its priority.

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Re: [tip:timers/core] hrtimers: Support resuming with two or more CPUs online (but stopped)

2013-07-05 Thread Thomas Gleixner
On Fri, 5 Jul 2013, David Vrabel wrote:

You failed to CC Artem :(

 On 05/07/13 10:30, Artem Savkov wrote:
  This commit brings up a warning about a potential deadlock in
  smp_call_function_many() discussed previously:
  https://lkml.org/lkml/2013/4/18/546
 
 Can we just avoid the wait in clock_was_set()?  Something like this?
 
 8--
 hrtimers: do not wait for other CPUs in clock_was_set()
 
 Calling on_each_cpu() and waiting in a softirq causes a WARNing about
 a potential deadlock.
 
 Because hrtimers are per-CPU, it is sufficient to ensure that all
 other CPUs' timers are reprogrammed as soon as possible and before the
 next softirq on that CPU.  There is no need to wait for this to be
 complete on all CPUs.
 
 on_each_cpu() works by IPIing all CPUs which will ensure
 retrigger_next_event() will be called as earlier as possible and
 before the next softirq.
 
 Signed-off-by: David Vrabel david.vra...@citrix.com
 ---
  kernel/hrtimer.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
 index e86827e..fd5d391 100644
 --- a/kernel/hrtimer.c
 +++ b/kernel/hrtimer.c
 @@ -766,7 +766,7 @@ void clock_was_set(void)
  {
  #ifdef CONFIG_HIGH_RES_TIMERS
   /* Retrigger the CPU local events everywhere */
 - on_each_cpu(retrigger_next_event, NULL, 1);
 + on_each_cpu(retrigger_next_event, NULL, 0);
  #endif
   timerfd_clock_was_set();
  }
 -- 
 1.7.2.5
 
 
  
  [ 4363.082047] PM: Restoring platform NVS memory
  [ 4363.082471] [ cut here ]
  [ 4363.083800] WARNING: CPU: 0 PID: 3977 at kernel/smp.c:385 
  smp_call_function_many+0xbd/0x2c0()
  [ 4363.085789] Modules linked in:
  [ 4363.086542] CPU: 0 PID: 3977 Comm: pm-suspend Tainted: GW
  3.10.0-next-20130705 #126
  [ 4363.088634] Hardware name: Bochs Bochs, BIOS Bochs 01/01/2007
  [ 4363.090402]  0181 88001f403d98 81d2e2b7 
  821cdb2e
  [ 4363.092366]   88001f403dd8 810a278c 
  88001f403dd8
  [ 4363.094215]     
  82561898
  [ 4363.096094] Call Trace:
  [ 4363.096656]  IRQ  [81d2e2b7] dump_stack+0x59/0x82
  [ 4363.098259]  [810a278c] warn_slowpath_common+0x8c/0xc0
  [ 4363.099762]  [810a27da] warn_slowpath_null+0x1a/0x20
  [ 4363.100925]  [81118fcd] smp_call_function_many+0xbd/0x2c0
  [ 4363.101937]  [8110f0dd] ? trace_hardirqs_on+0xd/0x10
  [ 4363.102870]  [810d7030] ? hrtimer_wakeup+0x30/0x30
  [ 4363.103737]  [811193bb] smp_call_function+0x3b/0x50
  [ 4363.104609]  [810d7030] ? hrtimer_wakeup+0x30/0x30
  [ 4363.105455]  [8111943b] on_each_cpu+0x3b/0x120
  [ 4363.106249]  [810d743c] clock_was_set+0x1c/0x30
  [ 4363.107168]  [810d825c] run_hrtimer_softirq+0x2c/0x40
  [ 4363.108055]  [810acf26] __do_softirq+0x216/0x450
  [ 4363.108865]  [810ad297] irq_exit+0x77/0xb0
  [ 4363.109618]  [81d414da] smp_apic_timer_interrupt+0x4a/0x60
  [ 4363.110569]  [81d40032] apic_timer_interrupt+0x72/0x80
  [ 4363.111467]  EOI  [8110eb24] ? mark_held_locks+0x134/0x160
  [ 4363.112481]  [810f52af] ? arch_suspend_enable_irqs+0x2f/0x40
  [ 4363.113457]  [810f528e] ? arch_suspend_enable_irqs+0xe/0x40
  [ 4363.113910]  [810f54c1] suspend_enter+0x1d1/0x270
  [ 4363.114320]  [810f5794] suspend_devices_and_enter+0x1a4/0x390
  [ 4363.114887]  [810f5a74] enter_state+0xf4/0x150
  [ 4363.115288]  [810f5aeb] pm_suspend+0x1b/0x70
  [ 4363.115662]  [810f452b] state_store+0xeb/0xf0
  [ 4363.116055]  [815d3fc7] kobj_attr_store+0x17/0x20
  [ 4363.116468]  [8126f113] sysfs_write_file+0xb3/0x100
  [ 4363.116890]  [811f0aca] vfs_write+0xda/0x170
  [ 4363.117274]  [811f10b2] SyS_write+0x62/0xa0
  [ 4363.117645]  [815e01fe] ? trace_hardirqs_on_thunk+0x3a/0x3f
  [ 4363.118118]  [81d3f399] system_call_fastpath+0x16/0x1b
  [ 4363.118558] ---[ end trace 87cc49a77badea1e ]---
  [ 4363.119093] Enabling non-boot CPUs ...
  
  
  On Fri, Jun 28, 2013 at 02:18:37PM -0700, tip-bot for David Vrabel wrote:
  Commit-ID:  7c4c3a0f18ba57ea2a2985034532303d2929902a
  Gitweb: 
  http://git.kernel.org/tip/7c4c3a0f18ba57ea2a2985034532303d2929902a
  Author: David Vrabel david.vra...@citrix.com
  AuthorDate: Thu, 27 Jun 2013 11:35:44 +0100
  Committer:  Thomas Gleixner t...@linutronix.de
  CommitDate: Fri, 28 Jun 2013 23:15:06 +0200
 
  hrtimers: Support resuming with two or more CPUs online (but stopped)
 
  hrtimers_resume() only reprograms the timers for the current CPU as it
  assumes that all other CPUs are offline at this point in the resume
  process. If other CPUs are online then their timers will not be
  corrected and they may fire at the wrong time.
 
  When running as a Xen guest, this assumption

Re: [PATCH] sched, __wake_up_sync_key: Fix nr_exclusive tasks which lead to WF_SYNC clearing

2013-07-05 Thread Peter Zijlstra
On Thu, Jul 04, 2013 at 10:48:20PM +0400, Kirill Tkhai wrote:
 The only one task can replace waker.

Fair enough.. thanks!
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Re: [tip:timers/core] hrtimers: Support resuming with two or more CPUs online (but stopped)

2013-07-05 Thread Thomas Gleixner
On Fri, 5 Jul 2013, Thomas Gleixner wrote:
 On Fri, 5 Jul 2013, David Vrabel wrote:
 
 You failed to CC Artem :(
 

Second thought.

Where is that warning? Can't find it in neither in Linus tree nor in tip

   [ 4363.083800] WARNING: CPU: 0 PID: 3977 at kernel/smp.c:385 
   smp_call_function_many+0xbd/0x2c0()

All I see there is:
WARN_ON_ONCE(cpu_online(this_cpu)  irqs_disabled()
  !oops_in_progress  !early_boot_irqs_disabled);

Thanks,

tglx
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Re: [tip:timers/core] hrtimers: Support resuming with two or more CPUs online (but stopped)

2013-07-05 Thread Artem Savkov
Well with David's patch the warning is still hit as path is the same and
WARN_ON_ONCE in question doesn't check wait, should it?

Thomas' patch does seem to work.

On Fri, Jul 05, 2013 at 12:25:34PM +0200, Thomas Gleixner wrote:
 On Fri, 5 Jul 2013, David Vrabel wrote:
 
 You failed to CC Artem :(
 
  On 05/07/13 10:30, Artem Savkov wrote:
   This commit brings up a warning about a potential deadlock in
   smp_call_function_many() discussed previously:
   https://lkml.org/lkml/2013/4/18/546
  
  Can we just avoid the wait in clock_was_set()?  Something like this?
  
  8--
  hrtimers: do not wait for other CPUs in clock_was_set()
  
  Calling on_each_cpu() and waiting in a softirq causes a WARNing about
  a potential deadlock.
  
  Because hrtimers are per-CPU, it is sufficient to ensure that all
  other CPUs' timers are reprogrammed as soon as possible and before the
  next softirq on that CPU.  There is no need to wait for this to be
  complete on all CPUs.
  
  on_each_cpu() works by IPIing all CPUs which will ensure
  retrigger_next_event() will be called as earlier as possible and
  before the next softirq.
  
  Signed-off-by: David Vrabel david.vra...@citrix.com
  ---
   kernel/hrtimer.c |2 +-
   1 files changed, 1 insertions(+), 1 deletions(-)
  
  diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
  index e86827e..fd5d391 100644
  --- a/kernel/hrtimer.c
  +++ b/kernel/hrtimer.c
  @@ -766,7 +766,7 @@ void clock_was_set(void)
   {
   #ifdef CONFIG_HIGH_RES_TIMERS
  /* Retrigger the CPU local events everywhere */
  -   on_each_cpu(retrigger_next_event, NULL, 1);
  +   on_each_cpu(retrigger_next_event, NULL, 0);
   #endif
  timerfd_clock_was_set();
   }
  -- 
  1.7.2.5
  
  
   
   [ 4363.082047] PM: Restoring platform NVS memory
   [ 4363.082471] [ cut here ]
   [ 4363.083800] WARNING: CPU: 0 PID: 3977 at kernel/smp.c:385 
   smp_call_function_many+0xbd/0x2c0()
   [ 4363.085789] Modules linked in:
   [ 4363.086542] CPU: 0 PID: 3977 Comm: pm-suspend Tainted: GW
   3.10.0-next-20130705 #126
   [ 4363.088634] Hardware name: Bochs Bochs, BIOS Bochs 01/01/2007
   [ 4363.090402]  0181 88001f403d98 81d2e2b7 
   821cdb2e
   [ 4363.092366]   88001f403dd8 810a278c 
   88001f403dd8
   [ 4363.094215]     
   82561898
   [ 4363.096094] Call Trace:
   [ 4363.096656]  IRQ  [81d2e2b7] dump_stack+0x59/0x82
   [ 4363.098259]  [810a278c] warn_slowpath_common+0x8c/0xc0
   [ 4363.099762]  [810a27da] warn_slowpath_null+0x1a/0x20
   [ 4363.100925]  [81118fcd] smp_call_function_many+0xbd/0x2c0
   [ 4363.101937]  [8110f0dd] ? trace_hardirqs_on+0xd/0x10
   [ 4363.102870]  [810d7030] ? hrtimer_wakeup+0x30/0x30
   [ 4363.103737]  [811193bb] smp_call_function+0x3b/0x50
   [ 4363.104609]  [810d7030] ? hrtimer_wakeup+0x30/0x30
   [ 4363.105455]  [8111943b] on_each_cpu+0x3b/0x120
   [ 4363.106249]  [810d743c] clock_was_set+0x1c/0x30
   [ 4363.107168]  [810d825c] run_hrtimer_softirq+0x2c/0x40
   [ 4363.108055]  [810acf26] __do_softirq+0x216/0x450
   [ 4363.108865]  [810ad297] irq_exit+0x77/0xb0
   [ 4363.109618]  [81d414da] smp_apic_timer_interrupt+0x4a/0x60
   [ 4363.110569]  [81d40032] apic_timer_interrupt+0x72/0x80
   [ 4363.111467]  EOI  [8110eb24] ? mark_held_locks+0x134/0x160
   [ 4363.112481]  [810f52af] ? arch_suspend_enable_irqs+0x2f/0x40
   [ 4363.113457]  [810f528e] ? arch_suspend_enable_irqs+0xe/0x40
   [ 4363.113910]  [810f54c1] suspend_enter+0x1d1/0x270
   [ 4363.114320]  [810f5794] suspend_devices_and_enter+0x1a4/0x390
   [ 4363.114887]  [810f5a74] enter_state+0xf4/0x150
   [ 4363.115288]  [810f5aeb] pm_suspend+0x1b/0x70
   [ 4363.115662]  [810f452b] state_store+0xeb/0xf0
   [ 4363.116055]  [815d3fc7] kobj_attr_store+0x17/0x20
   [ 4363.116468]  [8126f113] sysfs_write_file+0xb3/0x100
   [ 4363.116890]  [811f0aca] vfs_write+0xda/0x170
   [ 4363.117274]  [811f10b2] SyS_write+0x62/0xa0
   [ 4363.117645]  [815e01fe] ? trace_hardirqs_on_thunk+0x3a/0x3f
   [ 4363.118118]  [81d3f399] system_call_fastpath+0x16/0x1b
   [ 4363.118558] ---[ end trace 87cc49a77badea1e ]---
   [ 4363.119093] Enabling non-boot CPUs ...
   
   
   On Fri, Jun 28, 2013 at 02:18:37PM -0700, tip-bot for David Vrabel wrote:
   Commit-ID:  7c4c3a0f18ba57ea2a2985034532303d2929902a
   Gitweb: 
   http://git.kernel.org/tip/7c4c3a0f18ba57ea2a2985034532303d2929902a
   Author: David Vrabel david.vra...@citrix.com
   AuthorDate: Thu, 27 Jun 2013 11:35:44 +0100
   Committer:  Thomas Gleixner t...@linutronix.de
   CommitDate: Fri, 28 Jun 2013 23:15:06 +0200
  
   hrtimers: Support resuming with two or more CPUs

Re: [PATCH 1/3] arch/um/Makefile: remove dead code

2013-07-05 Thread Ramkumar Ramachandra
Al Viro wrote:
 [...]
 IOW, any make variable (== macro in POSIX quote above) can be explicitly
 set in make(1) command line in form name=value and in that case nothing in
 makefile(s) can change its value.  It's true for GNU make, it's true for
 BSD make and it's been true for historical Unix make since its introduction
 in v7.

Thanks Al, the education is much appreciated.  I always thought =
would override it, and ?= was for default value.
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Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-05 Thread Pratyush Anand

On 7/5/2013 1:59 PM, Jingoo Han wrote:

Exynos PCIe IP consists of Synopsys specific part and Exynos
specific part. Only core block is a Synopsys designware part;
other parts are Exynos specific.
Also, the Synopsys designware part can be shared with other
platforms; thus, it can be split two parts such as Synopsys
designware part and Exynos specific part.



A quick and nice job :)
Just few minor comments.


Signed-off-by: Jingoo Han jg1@samsung.com
Cc: Pratyush Anand pratyush.an...@st.com
Cc: Mohit KUMAR mohit.ku...@st.com
---
  drivers/pci/host/Makefile  |1 +
  drivers/pci/host/pcie-designware.c |  907 +++-
  drivers/pci/host/pcie-designware.h |   72 +++
  drivers/pci/host/pcie-exynos.c |  619 
  4 files changed, 862 insertions(+), 737 deletions(-)
  create mode 100644 drivers/pci/host/pcie-designware.h
  create mode 100644 drivers/pci/host/pcie-exynos.c



[...]



-
-struct pcie_port {
-   struct device   *dev;
-   u8  controller;
-   u8  root_bus_nr;
-   void __iomem*dbi_base;
-   void __iomem*elbi_base;
-   void __iomem*phy_base;
-   void __iomem*purple_base;


Just for knowledge, what is the purple_base. It might not be needed by 
all vendors. Can we explain the name in comment or can give some generic 
name?



-   u64 cfg0_base;
-   void __iomem*va_cfg0_base;
-   u64 cfg1_base;
-   void __iomem*va_cfg1_base;
-   u64 io_base;
-   u64 mem_base;
-   spinlock_t  conf_lock;
-   struct resource cfg;
-   struct resource io;
-   struct resource mem;
-   struct pcie_port_info   config;
-   struct clk  *clk;
-   struct clk  *bus_clk;
-   int irq;
-   int reset_gpio;
-};
-


[...]


-
-static inline void readl_rc(struct pcie_port *pp, void *dbi_base, u32 *val)
+static inline void dw_pcie_readl_rc(struct pcie_port *pp, void *dbi_base,
+   u32 *val)


dbi_base is part of pp. So why to pass 3 args?


  {
-   exynos_pcie_sideband_dbi_r_mode(pp, true);
-   *val = readl(dbi_base);
-   exynos_pcie_sideband_dbi_r_mode(pp, false);
-   return;
+   if (pp-ops-readl_rc)
+   pp-ops-readl_rc(pp, dbi_base, val);


ditto


+   else
+   *val = readl(dbi_base);
  }

-static inline void writel_rc(struct pcie_port *pp, u32 val, void *dbi_base)
+static inline void dw_pcie_writel_rc(struct pcie_port *pp, u32 val,
+   void *dbi_base)


ditto


  {
-   exynos_pcie_sideband_dbi_w_mode(pp, true);
-   writel(val, dbi_base);
-   exynos_pcie_sideband_dbi_w_mode(pp, false);
-   return;
+   if (pp-ops-writel_rc)
+   pp-ops-writel_rc(pp, val, dbi_base);


ditto


+   else
+   writel(val, dbi_base);
  }



Regards
Pratyush
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Re: [tip:timers/core] hrtimers: Support resuming with two or more CPUs online (but stopped)

2013-07-05 Thread Artem Savkov
On Fri, Jul 05, 2013 at 12:36:50PM +0200, Thomas Gleixner wrote:
 On Fri, 5 Jul 2013, Thomas Gleixner wrote:
  On Fri, 5 Jul 2013, David Vrabel wrote:
  You failed to CC Artem :(
 Second thought.
 Where is that warning? Can't find it in neither in Linus tree nor in tip
[ 4363.083800] WARNING: CPU: 0 PID: 3977 at kernel/smp.c:385 
smp_call_function_many+0xbd/0x2c0()
 All I see there is:
 WARN_ON_ONCE(cpu_online(this_cpu)  irqs_disabled()
   !oops_in_progress  !early_boot_irqs_disabled);

It's in linux-next.git, not sure where it was merged from
commit 7f4a1d40a6311b7cb52d0f0061cb904d041c6dbc
Author: Chuansheng Liu chuansheng@intel.com
Date:   Wed Jul 3 10:20:26 2013 +1000

smp: Give WARN()ing when calling smp_call_function_many()/single() in 
serving irq


-- 
Regards,
Artem
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Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-05 Thread Arnd Bergmann
On Friday 05 July 2013, Jingoo Han wrote:

 --- /dev/null
 +++ b/drivers/pci/host/pcie-exynos.c

 +
 +/* PCIe ELBI registers */
 +#define PCIE_IRQ_PULSE   0x000
 +#define IRQ_INTA_ASSERT  (0x1  0)
 +#define IRQ_INTB_ASSERT  (0x1  2)
 +#define IRQ_INTC_ASSERT  (0x1  4)
 +#define IRQ_INTD_ASSERT  (0x1  6)
 +#define PCIE_IRQ_LEVEL   0x004
 +#define PCIE_IRQ_SPECIAL 0x008
 +#define PCIE_IRQ_EN_PULSE0x00c
 +#define PCIE_IRQ_EN_LEVEL0x010
 +#define PCIE_IRQ_EN_SPECIAL  0x014
 +#define PCIE_PWR_RESET   0x018
 +#define PCIE_CORE_RESET  0x01c
 +#define PCIE_CORE_RESET_ENABLE   (0x1  0)
 +#define PCIE_STICKY_RESET0x020
 +#define PCIE_NONSTICKY_RESET 0x024
 +#define PCIE_APP_INIT_RESET  0x028
 +#define PCIE_APP_LTSSM_ENABLE0x02c
 +#define PCIE_ELBI_RDLH_LINKUP0x064
 +#define PCIE_ELBI_LTSSM_ENABLE   0x1
 +#define PCIE_ELBI_SLV_AWMISC 0x11c
 +#define PCIE_ELBI_SLV_ARMISC 0x120
 +#define PCIE_ELBI_SLV_DBI_ENABLE (0x1  21)
 +
 +/* PCIe Purple registers */
 +#define PCIE_PHY_GLOBAL_RESET0x000
 +#define PCIE_PHY_COMMON_RESET0x004
 +#define PCIE_PHY_CMN_REG 0x008
 +#define PCIE_PHY_MAC_RESET   0x00c
 +#define PCIE_PHY_PLL_LOCKED  0x010
 +#define PCIE_PHY_TRSVREG_RESET   0x020
 +#define PCIE_PHY_TRSV_RESET  0x024
 +
 +/* PCIe PHY registers */
 +#define PCIE_PHY_IMPEDANCE   0x004
 +#define PCIE_PHY_PLL_DIV_0   0x008
 +#define PCIE_PHY_PLL_BIAS0x00c
 +#define PCIE_PHY_DCC_FEEDBACK0x014
 +#define PCIE_PHY_PLL_DIV_1   0x05c
 +#define PCIE_PHY_TRSV0_EMP_LVL   0x084
 +#define PCIE_PHY_TRSV0_DRV_LVL   0x088
 +#define PCIE_PHY_TRSV0_RXCDR 0x0ac
 +#define PCIE_PHY_TRSV0_LVCC  0x0dc
 +#define PCIE_PHY_TRSV1_EMP_LVL   0x144
 +#define PCIE_PHY_TRSV1_RXCDR 0x16c
 +#define PCIE_PHY_TRSV1_LVCC  0x19c
 +#define PCIE_PHY_TRSV2_EMP_LVL   0x204
 +#define PCIE_PHY_TRSV2_RXCDR 0x22c
 +#define PCIE_PHY_TRSV2_LVCC  0x25c
 +#define PCIE_PHY_TRSV3_EMP_LVL   0x2c4
 +#define PCIE_PHY_TRSV3_RXCDR 0x2ec
 +#define PCIE_PHY_TRSV3_LVCC  0x31c

Are you sure these are all exynos specific? Maybe they are licensed
from someone else?

 +
 + pp-dbi_base = devm_ioremap(pdev-dev, pp-cfg.start,
 + resource_size(pp-cfg));
 + if (!pp-dbi_base) {
 + dev_err(pdev-dev, error with ioremap\n);
 + return -ENOMEM;
 + }
 +
 + pp-root_bus_nr = -1;
 + pp-ops = exynos_pcie_host_ops;
 +
 + spin_lock_init(pp-conf_lock);
 + dw_pcie_host_init(pp);
 + pp-va_cfg0_base = devm_ioremap(pdev-dev, pp-cfg0_base,
 + pp-config.cfg0_size);
 + if (!pp-va_cfg0_base) {
 + dev_err(pp-dev, error with ioremap in function\n);
 + return -ENOMEM;
 + }
 + pp-va_cfg1_base = devm_ioremap(pdev-dev, pp-cfg1_base,
 + pp-config.cfg1_size);
 + if (!pp-va_cfg1_base) {
 + dev_err(pp-dev, error with ioremap\n);
 + return -ENOMEM;
 + }

I think the configuration space handling should go into the
dw_pcie_host_init function, as that part would be needed by all drivers.

 +static int __init exynos_pcie_probe(struct platform_device *pdev)
 +{
 + struct pcie_port *pp;
 + struct device_node *np = pdev-dev.of_node;
 + struct of_pci_range range;
 + struct of_pci_range_parser parser;
 + int ret;
 +
 + pp = devm_kzalloc(pdev-dev, sizeof(*pp), GFP_KERNEL);
 + if (!pp) {
 + dev_err(pdev-dev, no memory for pcie port\n);
 + return -ENOMEM;
 + }
 +
 + pp-dev = pdev-dev;
 +
 + if (of_pci_range_parser_init(parser, np)) {
 + dev_err(pdev-dev, missing ranges property\n);
 + return -EINVAL;
 + }
 +
 + /* Get the I/O and memory ranges from DT */
 + for_each_of_pci_range(parser, range) {
 + unsigned long restype = range.flags  IORESOURCE_TYPE_BITS;
 + if (restype == IORESOURCE_IO) {
 + of_pci_range_to_resource(range, np, pp-io);
 + pp-io.name = I/O;
 + pp-io.start = max_t(resource_size_t,
 +  PCIBIOS_MIN_IO,
 +  range.pci_addr + global_io_offset);
 + pp-io.end = min_t(resource_size_t,
 +IO_SPACE_LIMIT,
 +range.pci_addr + range.size
 ++ global_io_offset);
 +

Re: [PATCH 07/13] sched: Split accounting of NUMA hinting faults that pass two-stage filter

2013-07-05 Thread Peter Zijlstra
On Thu, Jul 04, 2013 at 03:36:38PM -0400, Johannes Weiner wrote:

 I was going for the opposite conclusion: that it does not matter
 whether memory is accessed privately or in a shared fashion, because
 there is no obvious connection to its access frequency, not to me at
 least.  

There is a relation to access freq; however due to the low sample rate
(once every 100ms or so) we obviously miss all high freq data there.

  I acknowledge it's a problem and basically I'm making a big assumption
  that private-dominated workloads are going to be the common case. Threaded
  application on UMA with heavy amounts of shared data (within cache lines)
  already suck in terms of performance so I'm expecting programmers already
  try and avoid this sort of sharing. Obviously we are at a page granularity
  here so the assumption will depend entirely on alignments and buffer sizes
  so it might still fall apart.
 
 Don't basically all VM-based mulithreaded programs have this usage
 pattern?  The whole runtime (text, heap) is shared between threads.
 If some thread-local memory spills over to another node, should the
 scheduler move this thread off node from a memory standpoint?  I don't
 think so at all.  I would expect it to always gravitate back towards
 this node with the VM on it, only get moved off for CPU load reasons,
 and get moved back as soon as the load situation permits.

All data being allocated on the same heap and being shared in the access
sense doesn't imply all threads will indeed use all data; even if TLS is
not used.

For a concurrent program to reach any useful level of concurrency gain
you need data partitioning. Threads must work on different data sets
otherwise they'd constantly be waiting on serialization -- which makes
your concurrency gain tank.

There's two main issues here:

Firstly; the question is if there's much false sharing on page
granularity. Typically you want the compute time per data fragment to be
significantly higher than the demux + mux overhead which favours larger
data units.

Secondly; you want your scan freq to be at least half the compute time
per data fragment. Otherwise you'll run the risk of not seeing the data
being local to that thread.

So for optimal benefit you want to minimize sharing pages between data
fragments and have your data fragment compute time as long as possible.
Luckily both are also goals for maximizing concurrency gain so we should
be good there.

This should cover all 'traditional' concurrent stuff; most of the 'new'
concurrency stuff can be different though -- some of it simply never
thought/designed for concurrency and just hopes it works. Others most
notably the multi-core concurrency stuff assumes the demux+mux cost are
_very_ low and therefore the data fragment and associated compute time
shrink to useless levels :/



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[patch v1]mfd: update DA9055 i2c device id

2013-07-05 Thread Ankur Raina
DA9055 is a combination of pmic and codec.
This patch updates the DA9055 i2c device id to match the standard naming 
convention followed for such chips.

Signed-off-by: Ankur ankur.ra...@kpitcummins.com
---
 drivers/mfd/da9055-i2c.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mfd/da9055-i2c.c b/drivers/mfd/da9055-i2c.c
index 88f6dca..43d3df5 100644
--- a/drivers/mfd/da9055-i2c.c
+++ b/drivers/mfd/da9055-i2c.c
@@ -54,7 +54,7 @@ static int __devexit da9055_i2c_remove(struct i2c_client *i2c)
 }
 
 static struct i2c_device_id da9055_i2c_id[] = {
-   {da9055-pmic, 0},
+   {da9055, 0},
{ }
 };
 
-- 
1.7.1


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Re: [PATCH] include/asm-generic/io.h: add dummy fuctions to support 'COMPILE_TEST' in 'asm-generic'.

2013-07-05 Thread Arnd Bergmann
On Friday 05 July 2013, Chen Gang F T wrote:
 Hello All:
 
 It seems 'asm-generic' dislikes 'mad users' (e.g allmodconfig,
 randconfig, and me).
 
 I guess the main reason is: 'asm-generic' thinks what mad users talk
 about is useless in real world, so it is just noisy.
 
 I can understand, at least what I talk about is not for urgent things.
 (maybe 'asm-generic' also thinks it not important either, every members
 have their own opinions).
 
 Next, I still use allmodconfig/randconfig for some architectures which I
 am interested in (and also for learning compilers), but I will skip all
 things which are related with 'asm-generic', since it dislikes me (a mad
 user).

As the asm-generic maintainer I think I have to clarify a few things:

* Build-time fixes for warnings and randconfig errors are good,
  and you have sent a number of good bug fixes all over the kernel,
  I definitely welcome getting more of those. In many cases the
  fix is trivial and obvious, in other cases you need to know
  much more of the background to understand what the underlying
  problem is and why you should not just fix the symptom.

* You have made an (understandable) mistake with this particular
  patch. It would have been nice if you had not made it, but I
  can see that you are still learning about these things. There
  is a fine line between what makes sense to be enabled as a
  'compile test' and what should better be left disabled by
  Kconfig.

* When experienced developers tell you that you are mistaken, you
  need to make an effort to understand what the mistake was so you
  can learn from it and not make the same mistake again. If you
  make the same mistakes again, maintainers will get annoyed and
  ignore you (or worse), which is not a good situation to be
  in when you want to get your patches merged.

Arnd
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[GIT PULL] Xen ARM update for 3.11

2013-07-05 Thread Stefano Stabellini
Linus,
just one commit this time: the implementation of the tmem hypercall for
arm and arm64.

NOTE: because this change depends on xen support for arm64 that has been
sent to you by Catalin (we agreed that being the very first xen for arm64
set of patches, it should go via the arm64 maintainers), I based this
branch on Catalin's arm64-upstream (see his pull request here
http://marc.info/?l=linux-arm-kernelm=137269947606106w=2).

- Stefano



The following changes since commit aa729dccb5e8dfbc78e2e235b8754d6acccee731:

  Merge branch 'for-next/hugepages' of 
git://git.linaro.org/people/stevecapper/linux into upstream-hugepages 
(2013-07-01 11:20:58 +0100)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/sstabellini/xen.git 
xenarm-for-3.11-tag

Stefano Stabellini (1):
  xen/arm and xen/arm64: implement HYPERVISOR_tmem_op

 arch/arm/include/asm/xen/hypercall.h |1 +
 arch/arm/xen/enlighten.c |1 +
 arch/arm/xen/hypercall.S |1 +
 arch/arm64/xen/hypercall.S   |1 +
 4 files changed, 4 insertions(+), 0 deletions(-)
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[patch v1]mfd: update DA9055 i2c device id

2013-07-05 Thread Ankur Raina
DA9055 is a combination of pmic and codec.
This patch updates the DA9055 i2c device id to match the standard naming 
convention followed for such chips.

Signed-off-by: Ankur Raina ankur.ra...@kpitcummins.com
---
 drivers/mfd/da9055-i2c.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mfd/da9055-i2c.c b/drivers/mfd/da9055-i2c.c
index 607387f..13af7e5 100644
--- a/drivers/mfd/da9055-i2c.c
+++ b/drivers/mfd/da9055-i2c.c
@@ -54,7 +54,7 @@ static int da9055_i2c_remove(struct i2c_client *i2c)
 }
 
 static struct i2c_device_id da9055_i2c_id[] = {
-   {da9055-pmic, 0},
+   {da9055, 0},
{ }
 };
 
-- 
1.7.1


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[PATCH -next] drm/radeon/dpm: Add missing #include linux/seq_file.h

2013-07-05 Thread Geert Uytterhoeven
ia64_defconfig:

drivers/gpu/drm/radeon/rv6xx_dpm.c: In function 
'rv6xx_dpm_debugfs_print_current_performance_level':
drivers/gpu/drm/radeon/rv6xx_dpm.c:2041:3: error: implicit declaration of 
function 'seq_printf' [-Werror=implicit-function-declaration]

Signed-off-by: Geert Uytterhoeven ge...@linux-m68k.org
---
http://kisskb.ellerman.id.au/kisskb/buildresult/9068726/

 drivers/gpu/drm/radeon/rv6xx_dpm.c |1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/radeon/rv6xx_dpm.c 
b/drivers/gpu/drm/radeon/rv6xx_dpm.c
index 33705c5..0d09677 100644
--- a/drivers/gpu/drm/radeon/rv6xx_dpm.c
+++ b/drivers/gpu/drm/radeon/rv6xx_dpm.c
@@ -22,6 +22,7 @@
  * Authors: Alex Deucher
  */
 
+#include linux/seq_file.h
 #include drmP.h
 #include radeon.h
 #include rv6xxd.h
-- 
1.7.9.5

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[PATCH] menuconfig: Allow j/k to move down/up the menu

2013-07-05 Thread Ramkumar Ramachandra
Like in Vim.

Cc: Michal Marek mma...@suse.cz
Signed-off-by: Ramkumar Ramachandra artag...@gmail.com
---
 Unsure why nobody has done this yet.

 scripts/kconfig/lxdialog/menubox.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/scripts/kconfig/lxdialog/menubox.c 
b/scripts/kconfig/lxdialog/menubox.c
index 38cd69c..17fd936 100644
--- a/scripts/kconfig/lxdialog/menubox.c
+++ b/scripts/kconfig/lxdialog/menubox.c
@@ -307,11 +307,12 @@ do_resize:
(i  max_choice ||
 key == KEY_UP || key == KEY_DOWN ||
 key == '-' || key == '+' ||
+key == 'j' || key == 'k' ||
 key == KEY_PPAGE || key == KEY_NPAGE)) {
/* Remove highligt of current item */
print_item(scroll + choice, choice, FALSE);
 
-   if (key == KEY_UP || key == '-') {
+   if (key == KEY_UP || key == '-' || key == 'k') {
if (choice  2  scroll) {
/* Scroll menu down */
do_scroll(menu, scroll, -1);
@@ -320,7 +321,7 @@ do_resize:
} else
choice = MAX(choice - 1, 0);
 
-   } else if (key == KEY_DOWN || key == '+') {
+   } else if (key == KEY_DOWN || key == '+' || key == 'j') 
{
print_item(scroll+choice, choice, FALSE);
 
if ((choice  max_choice - 3) 
-- 
1.8.3.2.722.g3244e19.dirty

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Re: [alsa-devel] [PATCH] ASoC: codecs: da9055: Update driver name to fix breakage due to pmic driver with same name

2013-07-05 Thread Mark Brown
On Fri, Jul 05, 2013 at 05:17:42PM +0530, Ashish Chavan wrote:
 This patch updates i2c driver name and device id of da9055 codec driver.
 DA9055 is a PMIC + CODEC and currently, the corresponding PMIC driver
 also registers itself with the same name as codec, i.e. da9055.
 Because of this the codec driver was broken. Now codec driver uses
 da9055-codec as driver name instead of da9055.

  static const struct i2c_device_id da9055_i2c_id[] = {
 - { da9055, 0 },
 + { da9055-codec, 0 },
   { }
  };

I can't believe that you've tested this.


signature.asc
Description: Digital signature


[PATCH v7] ARM: clocksource: add support for MOXA ART SoCs

2013-07-05 Thread Jonas Jensen
This patch adds an clocksource driver for the main timer(s)
found on MOXA ART SoCs.

Signed-off-by: Jonas Jensen jonas.jen...@gmail.com
---

Notes:
Applies to next-20130703

Changes since v6:

1. remove TIMER_CR read back
2. set TIMER_CR from constants

 drivers/clocksource/Makefile   |   1 +
 drivers/clocksource/moxart_timer.c | 164 +
 2 files changed, 165 insertions(+)
 create mode 100644 drivers/clocksource/moxart_timer.c

diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 9ba8b4d..56257f6 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
 obj-$(CONFIG_ARMADA_370_XP_TIMER)  += time-armada-370-xp.o
 obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
 obj-$(CONFIG_ARCH_MARCO)   += timer-marco.o
+obj-$(CONFIG_ARCH_MOXART)  += moxart_timer.o
 obj-$(CONFIG_ARCH_MXS) += mxs_timer.o
 obj-$(CONFIG_ARCH_PRIMA2)  += timer-prima2.o
 obj-$(CONFIG_SUN4I_TIMER)  += sun4i_timer.o
diff --git a/drivers/clocksource/moxart_timer.c 
b/drivers/clocksource/moxart_timer.c
new file mode 100644
index 000..5743853
--- /dev/null
+++ b/drivers/clocksource/moxart_timer.c
@@ -0,0 +1,164 @@
+/*
+ * MOXA ART SoCs timer handling.
+ *
+ * Copyright (C) 2013 Jonas Jensen
+ *
+ * Jonas Jensen jonas.jen...@gmail.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed as is without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include linux/clk.h
+#include linux/clockchips.h
+#include linux/interrupt.h
+#include linux/irq.h
+#include linux/irqreturn.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/io.h
+#include linux/clocksource.h
+
+#define TIMER1_BASE0x00
+#define TIMER2_BASE0x10
+#define TIMER3_BASE0x20
+
+#define REG_COUNT  0x0 /* writable */
+#define REG_LOAD   0x4
+#define REG_MATCH1 0x8
+#define REG_MATCH2 0xC
+
+#define TIMER_CR   0x30
+#define TIMER_INTR_STATE   0x34
+#define TIMER_INTR_MASK0x38
+
+/*
+ * TIMER_CR flags:
+ *
+ * TIMEREG_CR_*_CLOCK  0: PCLK, 1: EXT1CLK
+ * TIMEREG_CR_*_INToverflow interrupt enable bit
+ */
+#define TIMEREG_CR_1_ENABLE(1  0)
+#define TIMEREG_CR_1_CLOCK (1  1)
+#define TIMEREG_CR_1_INT   (1  2)
+#define TIMEREG_CR_2_ENABLE(1  3)
+#define TIMEREG_CR_2_CLOCK (1  4)
+#define TIMEREG_CR_2_INT   (1  5)
+#define TIMEREG_CR_3_ENABLE(1  6)
+#define TIMEREG_CR_3_CLOCK (1  7)
+#define TIMEREG_CR_3_INT   (1  8)
+#define TIMEREG_CR_COUNT_UP(1  9)
+#define TIMEREG_CR_COUNT_DOWN  (0  9)
+
+#define TIMER1_ENABLE  (TIMEREG_CR_2_ENABLE | TIMEREG_CR_1_ENABLE)
+#define TIMER1_DISABLE (TIMEREG_CR_2_ENABLE)
+
+static void __iomem *base;
+static unsigned int clock_count_per_tick;
+
+static void moxart_clkevt_mode(enum clock_event_mode mode,
+  struct clock_event_device *clk)
+{
+   switch (mode) {
+   case CLOCK_EVT_MODE_RESUME:
+   case CLOCK_EVT_MODE_ONESHOT:
+   writel(TIMER1_DISABLE, base + TIMER_CR);
+   writel(~0, base + TIMER1_BASE + REG_LOAD);
+   break;
+   case CLOCK_EVT_MODE_PERIODIC:
+   writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD);
+   writel(TIMER1_ENABLE, base + TIMER_CR);
+   break;
+   case CLOCK_EVT_MODE_UNUSED:
+   case CLOCK_EVT_MODE_SHUTDOWN:
+   default:
+   writel(TIMER1_DISABLE, base + TIMER_CR);
+   break;
+   }
+}
+
+static int moxart_clkevt_next_event(unsigned long cycles,
+   struct clock_event_device *unused)
+{
+   u32 u;
+
+   writel(TIMER1_DISABLE, base + TIMER_CR);
+
+   u = readl(base + TIMER1_BASE + REG_COUNT) - cycles;
+   writel(u, base + TIMER1_BASE + REG_MATCH1);
+
+   writel(TIMER1_ENABLE, base + TIMER_CR);
+
+   return 0;
+}
+
+static struct clock_event_device moxart_clockevent = {
+   .name   = moxart_timer,
+   .rating = 200,
+   .features   = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+   .set_mode   = moxart_clkevt_mode,
+   .set_next_event = moxart_clkevt_next_event,
+};
+
+static irqreturn_t moxart_timer_interrupt(int irq, void *dev_id)
+{
+   struct clock_event_device *evt = dev_id;
+   evt-event_handler(evt);
+   return IRQ_HANDLED;
+}
+
+static struct irqaction moxart_timer_irq = {
+   .name   = moxart-timer,
+   .flags  = IRQF_TIMER,
+   .handler= moxart_timer_interrupt,
+   .dev_id = moxart_clockevent,
+};
+
+static void __init moxart_timer_init(struct device_node *node)
+{
+   int ret, irq;
+   

Re: [PATCH v5] ARM: clocksource: add support for MOXA ART SoCs

2013-07-05 Thread Jonas Jensen
Thanks for the replies Thomas.

On 5 July 2013 12:21, Thomas Gleixner t...@linutronix.de wrote:
 Because you need to preserve the CR2 enable bit so your clocksource
 does not get switched off.

Yes, that was my main concern. The possibility of more flags being added.
I was experimenting with TIMEREG_CR_COUNT_UP but could never get REG_MATCH1
to work right for oneshot mode.

Please take a look at v7.

Best regards,
Jonas
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Re: hrtimer: one more expiry time overflow check in hrtimer_interrupt

2013-07-05 Thread Shinya Kuribayashi
On 6/28/2013 9:22 PM, Thomas Gleixner wrote:
 On the other hand, we have another call site of tick_program_event() at
 the bottom of hrtimer_interrupt().  The warning this time is triggered
 there, so we need to apply the same fix to it.
 
 Well, the problem is that you are just papering over the underlying
 issue of 32bit systems not being prepared for the year 2038 issue.
 
 Just blindly silencing the warning is not going to make the system
 survive 2038 in any sane way. All timespec/val related time functions
 dealing with the clock realtime domain are simply broken in 2038 on
 32bit, so it does not matter whether a warning triggers or not.

You're right.  With this patch applied, the hrtimer_interrupt /looks/
back to normal, but /proc/timer_list still show that expires at [in
negative range]:

active timers:
 #0: tick_cpu_sched, tick_sched_timer, S:01
 # expires at 5081250-5081250 nsecs [in -165398341280 to 
-165398341280 nsecs]

This shouldn't happen and something weird is still going on.

 We really need to tackle the underlying problem and not bandaiding a
 known to be broken system.

Agreed, but a little bit hard task for me.  This is 100% reproducible,
so I can help debug / verification.  Please let me know, if necessary.

Thanks for your comments,
--
Shinya Kuribayashi
Renesas Electronics
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