Em Fri, 27 Jun 2014 10:20:33 +0200
Hans Verkuil hverk...@xs4all.nl escreveu:
Hi Joe,
For the media subsystem:
Acked-by: Hans Verkuil hans.verk...@cisco.com
Err... I would rather prefer to apply this patch on our subsystem, in order
to avoid potential conflicts with other patches. Not
On Fri, Jun 27, 2014 at 12:46:14PM +0300, Hiroshi DOyu wrote:
Thierry Reding thierry.red...@gmail.com writes:
[...]
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
[...]
+ if (tegra-domain) {
+ err = iommu_attach_device(tegra-domain, dc-dev);
I
On Fri, Jun 27, 2014 at 12:46:02PM +0300, Hiroshi DOyu wrote:
Thierry Reding thierry.red...@gmail.com writes:
From: Thierry Reding tred...@nvidia.com
Attach to the device's master interface of the IOMMU at .probe() time.
IOMMU support becomes available via the DMA mapping API
On Tue, May 20, 2014 at 08:59:23PM +0800, Lan Tianyu wrote:
ACPI 5.0 spec(5.5.2.4.5) defines GenericSerialBus(i2c, spi, uart) operation
region.
It allows ACPI aml code able to access such kind of devices to implement
some ACPI standard method.
ACPI Spec defines some access attribute to
On Tue, May 20, 2014 at 08:59:24PM +0800, Lan Tianyu wrote:
Clean up ACPI related code in the i2c core and add CONFIG_I2C_ACPI
to enable I2C ACPI code.
Current there is a race between removing I2C ACPI operation region
and ACPI AML code accessing. So make i2c core built-in if CONFIG_I2C_ACPI
On Thursday 26 June 2014 19:44:21 Rob Herring wrote:
Although a bit late, I'm raising this now and hopefully we'll come to a
conclusion soon. Delaying arm64 PCIe support even further is not a real
option, which leaves us with:
1. Someone else (with enough PCIe knowledge) volunteering to
Potvrdenie identity Webmail
The poštová schránka prekročila jeden alebo viac z uvedených rozmerov
správcu. Tie nemusia byť schopný odosielať alebo prijímať nové správy,
až
Poštová schránka je zmenšenej veľkosti. Ak chcete viac miesta k
dispozícii, kliknite na
nižšie uvedený odkaz a zadajte
On Thursday 26 June 2014 22:49:44 Thierry Reding wrote:
+static const struct tegra_mc_client tegra124_mc_clients[] = {
+ {
+ .id = 0x01,
+ .name = display0a,
+ .swgroup = TEGRA_SWGROUP_DC,
+ .smmu = {
+ .reg
On Fri, Jun 27, 2014 at 11:07:48AM +0200, Arnd Bergmann wrote:
On Friday 27 June 2014 11:49:29 Hanjun Guo wrote:
+
+static int __init parse_acpi(char *arg)
+{
+ if (!arg)
+ return -EINVAL;
+
+ /* acpi=off disables both ACPI table parsing and interpreter */
On Fri, Jun 27, 2014 at 12:46:38PM +0300, Hiroshi DOyu wrote:
Thierry Reding thierry.red...@gmail.com writes:
From: Thierry Reding tred...@nvidia.com
The memory controller on NVIDIA Tegra124 exposes various knobs that can
be used to tune the behaviour of the clients attached to it.
On Fri, Jun 13, 2014 at 06:07:04PM +0800, Nicolin Chen wrote:
This patch adds DEV_TO_DEV support for i.MX SDMA driver to support data
tranfer between two peripheral FIFOs. The per_2_per script requires two
peripheral addresses and two DMA requests. So this patch also adds them
into private
On Fri, Jun 27, 2014 at 01:07:04PM +0200, Arnd Bergmann wrote:
On Thursday 26 June 2014 22:49:44 Thierry Reding wrote:
+static const struct tegra_mc_client tegra124_mc_clients[] = {
+ {
+ .id = 0x01,
+ .name = display0a,
+ .swgroup =
On Thu, Jun 26, 2014 at 09:48:25AM -0700, Feng Kan wrote:
On Wed, Jun 25, 2014 at 6:05 PM, Thomas Gleixner t...@linutronix.de wrote:
On Wed, 25 Jun 2014, Feng Kan wrote:
This change is made to preserve the GIC v2 bypass bits in the
GIC_CPU_CTRL register (also known as the GICC_CTLR
The patch looks mostly OK, though I see there is also a
CONFIG_PPC_256K_PAGES
define that should probably be handled.
Cheers, Andreas
On 2014/06/20, 6:23 AM, Arnd Bergmann a...@arndb.de wrote:
The lustre virtual block device cannot handle 64K pages and fails at
compile
time. To avoid running
Hi Mark,
Thanks for the review.
On 27/06/14 11:36, Mark Rutland wrote:
Hi Sudeep,
On Wed, Jun 25, 2014 at 06:30:42PM +0100, Sudeep Holla wrote:
From: Sudeep Holla sudeep.ho...@arm.com
This patch adds support for cacheinfo on ARM64.
On ARMv8, the cache hierarchy can be identified through
On Thu, Jun 26, 2014 at 04:14:24PM +0100, Russell King - ARM Linux wrote:
On Thu, Jun 26, 2014 at 02:44:52PM +, Mattis Lorentzon wrote:
We have managed to trigger the Oops by just transferring a large file
over nfs
cat /mnt/foo /dev/null
where foo is a file that is approximately 2
v2 was doing some pretty nasty things with the DMA API, so I took a different
approach for this v3.
As suggested, this version uses ttm_dma_populate() to populate BOs. The reason
for doing this was that it would entitle us to using the DMA sync functions,
but since the memory returned is already
TTM pages can currently be populated using 3 different methods, but the
code does not make it clear which one is used. The same complex
conditions are tested in various parts of the code, which makes it
difficult to follow and error prone.
This patch introduces an enum into the nouveau_drm struct
Cached memory accesses between the CPU and the GPU are not coherent on
ARM. Use the DMA TTM allocator on this architecture to obtain coherent
memory.
Signed-off-by: Alexandre Courbot acour...@nvidia.com
---
drivers/gpu/drm/nouveau/nouveau_ttm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
Document device tree binding information as required by
the ZYNQ USB controller.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v2:
- none
---
.../devicetree/bindings/usb/ci-hdrc-zynq.txt | 23
1 files changed, 23 insertions(+), 0
Zynq soc uses Chipidea/Synopsys usb IP core(CI13612). This patch adds
necessary glue to allow the chipidea driver to work on zynq soc.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v2:
- modified the commit message for better readability
- fixed the dev_err message
On Fri, Jun 13, 2014 at 09:52:24PM +0200, Christoph Jaeger wrote:
Get rid of some boilerplate code by using module_serio_driver().
Signed-off-by: Christoph Jaeger christophjae...@linux.com
Applied to for-next, thanks!
signature.asc
Description: Digital signature
Hi Chanwoo,
On 27.06.2014 06:30, Chanwoo Choi wrote:
Changes from v4:
- Use 'exynos_adc_data' structure instead of 'exynos_adc_ops' structure
and remove enum variable of ADC version
- Fix wrong name of special clock (sclk_tsadc - sclk_adc)
- Add reviewed message by Naveen Krishna Chatradhi
From: Lucas Stach d...@lynxeye.de
Nouveau can now be used on ARM, so add an ioprot handler for this
architecture.
Signed-off-by: Lucas Stach d...@lynxeye.de
Signed-off-by: Alexandre Courbot acour...@nvidia.com
---
drivers/gpu/drm/ttm/ttm_bo_util.c | 2 +-
1 file changed, 1 insertion(+), 1
On 06/24/2014 10:25 PM, Arnaldo Carvalho de Melo wrote:
Em Mon, Jun 16, 2014 at 11:58:51AM +0200, Michael Kerrisk (man-pages)
escreveu:
Hi Arnaldo,
Things have gone quiet ;-). What's the current state of this patch?
Yeah, I kept meaning to prod the other people on this thread about what
On Thu, Jun 26, 2014 at 01:58:11PM -0700, Andrew Morton wrote:
On Thu, 26 Jun 2014 16:33:29 -0400 Vivek Goyal vgo...@redhat.com wrote:
This patch series does not do kernel signature verification yet. I plan
to post another patch series for that. Now distributions are already signing
On Fri, Jun 27, 2014 at 12:22:17PM +0100, Sudeep Holla wrote:
Hi Mark,
Thanks for the review.
On 27/06/14 11:36, Mark Rutland wrote:
Hi Sudeep,
On Wed, Jun 25, 2014 at 06:30:42PM +0100, Sudeep Holla wrote:
From: Sudeep Holla sudeep.ho...@arm.com
This patch adds support for
GK20A's BAR is functionally identical to NVC0's, but do not support
being ioremapped write-combined. Create a BAR instance for GK20A that
reflect that state.
Signed-off-by: Alexandre Courbot acour...@nvidia.com
---
Changes since v1:
- Fix compilation warning due to missing cast
Patch 1 of the
Hi Arnaldo,
On 05/28/2014 02:20 PM, Michael Kerrisk (man-pages) wrote:
On 05/27/2014 10:30 PM, Arnaldo Carvalho de Melo wrote:
Em Tue, May 27, 2014 at 09:28:37PM +0200, Michael Kerrisk (man-pages)
escreveu:
On Tue, May 27, 2014 at 9:21 PM, Arnaldo Carvalho de Melo
a...@ghostprotocols.net
Il 27/06/2014 12:18, Borislav Petkov ha scritto:
Joerg says I should bisect but I'm busy with other stuff. If people are
interested in chasing this further, I could free up some time to do
so...
Please first try -M pc-1.7 on the 2.0 QEMU. If it fails, please do
bisect it. A QEMU bisection
This patch fixes the following checkpatch.pl issues in hfa384x_usb.c:
WARNING: Missing a blank line after declarations
Signed-off-by: Quentin Lee lee.rhaps...@gmail.com
---
drivers/staging/wlan-ng/hfa384x_usb.c |1 +
1 file changed, 1 insertion(+)
diff --git
Replace all hardcoded ttyGS strings with the PREFIX macro.
Therefore the PREFIX definition is moved to u_serial.h.
Furthermore the modified files are checkpatch.pl compliant now.
Signed-off-by: Richard Leitner richard.leit...@skidata.com
---
drivers/usb/gadget/f_acm.c| 49
On 5 June 2014 13:57, Peter Griffin peter.grif...@linaro.org wrote:
Hi Gabi,
On Wed, 04 Jun 2014, Gabriel FERNANDEZ wrote:
The patch added support for DT registration of ClockGenA0
It includes c32 type PLL.
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Signed-off-by:
Hi Krzystof,
On Fri, Jun 27, 2014 at 4:04 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
After unbinding the driver memory was corrupted by double free of
clk_lookup structure. This lead to OOPS when re-binding the driver
again.
The driver allocated memory for 'clk_lookup' with
On 5 June 2014 13:13, Peter Griffin peter.grif...@linaro.org wrote:
Hi Gabi,
See my comment below
On Wed, 04 Jun 2014, Gabriel FERNANDEZ wrote:
This patch extend the range of possible frequencies of the fs432c65
and fs660c32 Quad frequency synthesizers.
Signed-off-by: Gabriel Fernandez
On Thu, Jun 26, 2014 at 02:03:17PM -0700, Andy Lutomirski wrote:
On Thu, Jun 26, 2014 at 1:43 PM, Vivek Goyal vgo...@redhat.com wrote:
On Thu, Jun 26, 2014 at 04:33:37PM -0400, Vivek Goyal wrote:
This is the new syscall kexec_file_load() declaration/interface. I have
reserved the syscall
On Mon, Jun 16, 2014 at 09:44:20AM +0800, Axel Lin wrote:
Signed-off-by: Axel Lin axel@ingics.com
Applied, thanks.
signature.asc
Description: Digital signature
On Mon, Jun 16, 2014 at 10:12:25AM +0800, Axel Lin wrote:
Signed-off-by: Axel Lin axel@ingics.com
Applied, thanks.
signature.asc
Description: Digital signature
On Tue, May 27, 2014 at 08:57:55AM +0200, Fabian Frederick wrote:
Also add const to array
Applied, please submit patches following the process in
SubmittingPatches - CC the relevant maintainers and lists and use a
subject line in the normal format for the subsystem.
signature.asc
Description:
On Fri, Jun 27, 2014 at 01:41:30PM +0200, Paolo Bonzini wrote:
Il 27/06/2014 12:18, Borislav Petkov ha scritto:
Joerg says I should bisect but I'm busy with other stuff. If people are
interested in chasing this further, I could free up some time to do
so...
Please first try -M pc-1.7 on the
On Thu, Jun 26, 2014 at 12:40:33PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
The current crossbar description does not include the description
required for the consumer of the crossbar, a.k.a devices whoes events
pass through the crossbar into the GIC interrupt controller.
Hi All,
We've had a report[1] of the virt_blk driver causing a lot of spew
because it's calling a sleeping function from an invalid context. The
backtrace is below. This is with kernel v3.16-rc2-69-gd91d66e88ea9.
The reporter is on CC and can give you relevant details.
josh
[1]
On Thu, Jun 26, 2014 at 12:40:31PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
Currently we attempt to map any crossbar value to an IRQ, however,
this is not correct from hardware perspective. There is a max crossbar
event number upto which hardware supports. So describe the
Joe Lawrence joe.lawre...@stratus.com writes:
On Thu, 26 Jun 2014, Jeff Moyer wrote:
Thanks, Jens. Joe, the patches don't apply anymore... would you mind
sending an updated set so Jens doesn't have to do the fixups? I think
you also need to convert blk_mq_alloc_request, I didn't see that in
On Thu, Jun 26, 2014 at 12:42:09AM -0700, Tony Lindgren wrote:
* Sricharan R r.sricha...@ti.com [140626 00:14]:
This series does some cleanups, fixes for handling two interrupts
getting mapped twice to same crossbar and provides support for
hardwired IRQ and crossbar definitions.
On
Il 27/06/2014 13:55, Borislav Petkov ha scritto:
On Fri, Jun 27, 2014 at 01:41:30PM +0200, Paolo Bonzini wrote:
Il 27/06/2014 12:18, Borislav Petkov ha scritto:
Joerg says I should bisect but I'm busy with other stuff. If people are
interested in chasing this further, I could free up some time
On pią, 2014-06-27 at 17:19 +0530, Yadwinder Singh Brar wrote:
Hi Krzystof,
On Fri, Jun 27, 2014 at 4:04 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
After unbinding the driver memory was corrupted by double free of
clk_lookup structure. This lead to OOPS when re-binding the
于 2014/6/26 8:57, Zhang, Yanmin 写道:
On 2014/6/25 21:08, Liu hua wrote:
于 2014/6/25 8:41, Zhang, Yanmin 写道:
On 2014/6/20 18:47, Liu hua wrote:
On 2014/6/20 7:42, Luck, Tony wrote:
BTW, I note that extern struct pstore_info *psinfo locates in
fs/pstore/internal.h. So users out of directory
On Thu, Jun 26, 2014 at 7:17 PM, Alexandre Courbot gnu...@gmail.com wrote:
On Fri, Jun 27, 2014 at 1:10 AM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Thu, Jun 26, 2014 at 11:53:20PM +0900, Alexandre Courbot wrote:
We don't plan to rely on CMA for too long. IOMMU support is on
Gregory,
Since you'll be resending this:
On Fri, Jun 27, 2014 at 12:55:47AM +0200, Gregory CLEMENT wrote:
On 27/06/2014 00:43, Gregory CLEMENT wrote:
The first bit of the SCU control register is actually the enable
it. So let's name it instead of using literal constant.
nit: s/^it/bit/
On Fri, Jun 27, 2014 at 02:01:43PM +0200, Paolo Bonzini wrote:
Can you try gathering a trace? (and since those things get huge, you
can send it to me offlist) Also try without ept and see what happens.
Yeah, Joerg just sent me a diff on how to intercept #DF. I'll add a
tracepoint so that it all
On Fri, Jun 27, 2014 at 10:11:38AM +0200, Mikko Perttunen wrote:
This adds the two clocks, soctherm and tsensor, to the T124 initialization
table.
They are required for soctherm-based thermal sensing.
Signed-off-by: Mikko Perttunen mperttu...@nvidia.com
---
Peter, one more zero for
Hi Linus,
Please pull ARC fixes for 3.16
Thx,
-Vineet
--
The following changes since commit 7171511eaec5bf23fb06078f59784a3a0626b38f:
Linux 3.16-rc1 (2014-06-15 17:45:28 -1000)
are available in the git repository at:
On Fri, Jun 27, 2014 at 1:50 PM, Vivek Goyal vgo...@redhat.com wrote:
On Thu, Jun 26, 2014 at 02:03:17PM -0700, Andy Lutomirski wrote:
On Thu, Jun 26, 2014 at 1:43 PM, Vivek Goyal vgo...@redhat.com wrote:
On Thu, Jun 26, 2014 at 04:33:37PM -0400, Vivek Goyal wrote:
This is the new syscall
On Thu, Jun 26, 2014 at 05:52:16PM +0200, Stephen Warren wrote:
On 06/26/2014 09:48 AM, Peter De Schrijver wrote:
When writing a module for testing or debugging purposes, there is no way to
get hold of clk handles. This patch solves this by exposing all valid clocks
as clkdev's for the
From: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com
When saving the callchain on Power, the kernel conservatively saves excess
entries in the callchain. A few of these entries are needed in some cases
but not others. We should use the DWARF debug information to determine
when the entries are
From: Sebastian Andrzej Siewior bige...@linutronix.de
The raw_syscalls:sys_enter tracer for instance passes has one argument
named 'arg' which is an array of 6 integers. Right the python scripts
gets only 0 passed as an argument. The reason is that
pevent_read_number() can not handle data types
Check real allocated pointer for NULL.
Cc: Arnaldo Carvalho de Melo a...@kernel.org
Cc: Corey Ashford cjash...@linux.vnet.ibm.com
Cc: David Ahern dsah...@gmail.com
Cc: Frederic Weisbecker fweis...@gmail.com
Cc: Ingo Molnar mi...@kernel.org
Cc: Namhyung Kim namhy...@kernel.org
Cc: Paul Mackerras
From: Rickard Strandqvist rickard_strandqv...@spectrumdigital.se
Fix a risk of doing free on an uninitialized pointer.
This was found using a static code analysis program called cppcheck.
Acked-by: Namhyung Kim namhy...@kernel.org
Signed-off-by: Rickard Strandqvist
hi Ingo,
please consider pulling
thanks,
jirka
The following changes since commit 1c92f88542faa3ae4f970c548b4fe8275a45201b:
Merge tag 'perf-core-for-mingo' of
git://git.kernel.org/pub/scm/linux/kernel/git/jolsa/perf into perf/core
(2014-06-25 07:44:19 +0200)
are available in the git
On Tue, Jun 03, 2014 at 11:30:34PM +0200, Rickard Strandqvist wrote:
Fix for possible null pointer dereferenc, and there is a risk
for memory leak in when something unexpected happens and the
function returns.
Signed-off-by: Rickard Strandqvist rickard_strandqv...@spectrumdigital.se
---
After unbinding the driver memory was corrupted by double free of
clk_lookup structure. This lead to OOPS when re-binding the driver
again.
The driver allocated memory for 'clk_lookup' with devm_kzalloc. During
driver removal this memory was freed twice: once by clkdev_drop() and
second by devm
From: Sebastian Andrzej Siewior bige...@linutronix.de
I was going to change something here and the result was so much on the
right side of the screen that I decided to move that piece into its own
function.
This patch should make no function change except the moving the code
into its own
Hello.
On 06/27/2014 03:23 PM, Punnaiah Choudary Kalluri wrote:
Document device tree binding information as required by
the ZYNQ USB controller.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
[...]
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-zynq.txt
Allow increasing the buffer-head per-CPU LRU size to allow efficient
filesystem operations that access many blocks for each transaction.
For example, creating a file in a large ext4 directory with quota
enabled will accesses multiple buffer heads and will overflow the LRU
at the default 8-block
On Wed, Jun 18, 2014 at 11:14:04AM -0700, Doug Anderson wrote:
From: Bill Richardson wfric...@chromium.org
Remove the three wrapper functions that talk to the EC without passing all
the desired arguments and just use the underlying communication function
that passes everything in a struct
On Wed, Jun 18, 2014 at 11:14:06AM -0700, Doug Anderson wrote:
From: Bill Richardson wfric...@chromium.org
When communicating with the EC, the cmd_xfer() function should return the
number of bytes it received from the EC, or negative on error.
Signed-off-by: Bill Richardson
Thomas,
Here's a round of changes for irqchip that have been in -next for
several days.
irqchip/core now has a dependency on irqchip/urgent for:
4f4366033945 irqchip: spear_shirq: Fix interrupt offset
Please pull.
thx,
Jason.
Note: I've hand-edited the default output of 'git request-pull'
On Mon, Jun 23, 2014 at 02:20:06PM -0700, Doug Anderson wrote:
In https://lkml.org/lkml/2014/6/10/265 pointed out that the 10-bit
flag in the cros_ec_tunnel was useless. It went into a 16-bit flags
field but was defined at (1 16).
Since we have no 10-bit i2c devices on the other side of
Linus,
please pull sound fixes for v3.16-rc3 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-3.16-rc3
The topmost commit is a07187c992be945ab561b370cbb49cfd72064c3c
sound fixes for 3.16-rc3
On Thu, 26 Jun 2014, Nicholas A. Bellinger wrote:
Hi Mikulas,
On Mon, 2014-06-23 at 13:42 -0400, Mikulas Patocka wrote:
target: fix deadlock on unload
On uniprocessor preemptible kernel, target core deadlocks on unload. The
following events happen:
* iscsit_del_np is called
*
Hi Steve,
On Thu, Jun 26, 2014 at 05:52:46PM +0100, Steven Rostedt wrote:
From: Steven Rostedt (Red Hat) rost...@goodmis.org
Nothing sets function_trace_stop to disable function tracing anymore.
Remove the check for it in the arch code.
arm64 was broken anyway, as it had an ifdef testing
On Fri, Jun 27, 2014 at 12:03:34PM +0100, Arnd Bergmann wrote:
On Thursday 26 June 2014 19:44:21 Rob Herring wrote:
I don't agree arm32 is harder than microblaze. Yes, converting ALL of
arm would be, but that is not necessary. With Liviu's latest branch
the hacks I previously needed are
From: Andras Kovacs and...@sth.sze.hu
Corsair USB Dongles are shipped with Corsair AXi series PSUs.
These are cp210x serial usb devices, so make driver detect these.
I have a program, that can get information from these PSUs.
Tested with 2 different dongles shipped with Corsair AX860i and
Hi,
Can you please pull from the following URL?
git://git.chelsio.net/pub/git/linux-firmware.git for-upstream
The following changes since commit 7f388b4885cf64d6b7833612052d20d4197af96f:
Ben Hutchings (1):
Move the s5p-mfc firmware out of its subdirectory
are available in the git
Hi,
On Fri, Jun 27, 2014 at 04:53:53PM +0530, Punnaiah Choudary Kalluri wrote:
Zynq soc uses Chipidea/Synopsys usb IP core(CI13612). This patch adds
necessary glue to allow the chipidea driver to work on zynq soc.
Did you see the currently discussed patches for the generic chipidea
glue?
On Thu, 2014-06-26 at 17:07 -0700, Austin Schuh wrote:
I'm not sure where to go from there. Any changes to the workpool to
try to fix that will be hard, or could affect latency significantly.
Oh what the hell, I'm out of frozen shark, may as well stock up. Nobody
else has posted spit yet. I
Hi Marc,
On Wed, Jun 25, 2014 at 10:28:43AM +0100, Marc Zyngier wrote:
When a peripheral is shared between virtual machines, its interrupt
state becomes part of the guest's state, and must be switched accordingly.
Introduce a pair of accessors (irq_get_fwd_state/irq_set_fwd_state) to
From: Sami Laine laine.j.s...@gmail.com
Sparse warning corrections: NULL-pointers as NULL instead of static 0's.
Signed-off-by: Sami Laine laine.j.s...@gmail.com
---
diff --git a/drivers/staging/lustre/lustre/llite/lproc_llite.c
b/drivers/staging/lustre/lustre/llite/lproc_llite.c
index
On Friday 27 June 2014 13:49:49 Will Deacon wrote:
On Fri, Jun 27, 2014 at 12:03:34PM +0100, Arnd Bergmann wrote:
On Thursday 26 June 2014 19:44:21 Rob Herring wrote:
I don't agree arm32 is harder than microblaze. Yes, converting ALL of
arm would be, but that is not necessary. With
Hi
Got the following panic runing 16-rc2 + git. The latest commit was:
commit d91d66e88ea95b6dd21958834414009614385153
Merge: 07f4695 6663a4f
Author: Linus Torvalds torva...@linux-foundation.org
Date: Wed Jun 25 05:44:17 2014 -0700
I was not doing anything interesting (displaying a photo
Hi Marc,
On Wed, Jun 25, 2014 at 10:28:45AM +0100, Marc Zyngier wrote:
Now that we've switched to EOImode == 1, prevent a forwarded interrupt
from being deactivated after its priority has been dropped.
Also add support for the interrupt state to be saved/restored.
Signed-off-by: Marc
Compliments. This is in regards to my previous message concerning a deceased
client with similar last name with you, I have given you all necessary details
about this and I haven't gotten any positive response from you, so kindly get
back to me today.
Thank you,
John.
--
To unsubscribe from
Mimi Zohar zo...@linux.vnet.ibm.com wrote:
Dot prefixed keyring names are supposed to be reserved for the
kernel, but add_key() calls key_get_type_from_user(), which
incorrectly verifies the 'type' field, not the 'description' field.
This patch verifies the 'description' field isn't dot
This patch is the Flexgen implementation reusing as much as possible
of Common Clock Framework functions.
The idea is to have an instance of struct flexgen per output clock.
It represents the clock cross bar (by a mux element), and the pre and final
dividers
(using dividers and gates elements).
converts stm_fs tables into static const
---
drivers/clk/st/clkgen-fsyn.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index 4f53ee0..a7e5db4 100644
---
This patch adds new compatibilities to support STiH407 SoC.
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Acked-by: Peter Griffin peter.grif...@linaro.org
---
.../bindings/clock/st/st,clkgen-divmux.txt | 28 +--
.../devicetree/bindings/clock/st/st,clkgen-mux.txt |
Changes in v2:
- use static const for clkgen_pll_data and stm_fs tables (from
Peter Griffin review)
- add 326 and 333 Mhz frequencies
- cosmetic correction in st,clkgen-vcc.txt
- use of kcalloc instead of kzalloc in drivers/clk/st/clk-flexgen.c
The goal of this series is to add Flexgen
This patch introduces polarity indication for pll power up bit
and for standby bit in order to have same code between stih416
and stih407 boards.
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Acked-by: Peter Griffin peter.grif...@linaro.org
---
drivers/clk/st/clkgen-fsyn.c | 12
A Flexgen structure is composed by:
- a clock cross bar (represented by a mux element)
- a pre and final dividers (represented by a divider and gate elements)
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Acked-by: Peter Griffin peter.grif...@linaro.org
---
The patch added support for DT registration of ClockGenC0
It includes 2 c32 type PLL and a 660 Quadfs.
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Signed-off-by: Olivier Bideau olivier.bid...@st.com
Acked-by: Peter Griffin peter.grif...@linaro.org
---
The patch added support for ClockGenD0/D2/D3
It includes one 660 Quadfs.
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Signed-off-by: Olivier Bideau olivier.bid...@st.com
Acked-by: Peter Griffin peter.grif...@linaro.org
---
drivers/clk/st/clkgen-fsyn.c | 46
This patch uses CLK_DIVIDER_ROUND_CLOSEST flag to specify
the divider has to round to closest div.
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Acked-by: Peter Griffin peter.grif...@linaro.org
---
drivers/clk/st/clkgen-mux.c | 3 ++-
1 file changed, 2 insertions(+), 1
This patch adds the support of quadfs reset handling.
Signed-off-by: Olivier Bideau olivier.bid...@st.com
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Acked-by: Peter Griffin peter.grif...@linaro.org
---
drivers/clk/st/clkgen-fsyn.c | 5 +
1 file changed, 5 insertions(+)
The patch added support for DT registration of ClockGenA0
It includes c32 type PLL.
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Signed-off-by: Olivier Bideau olivier.bid...@st.com
---
drivers/clk/st/clkgen-pll.c | 16
1 file changed, 16 insertions(+)
diff
converts clkgen_pll_data tables into static const
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
---
drivers/clk/st/clkgen-pll.c | 30 ++
1 file changed, 14 insertions(+), 16 deletions(-)
diff --git a/drivers/clk/st/clkgen-pll.c
The patch supports the A9-mux clocks used by ClockGenA9
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Signed-off-by: Olivier Bideau olivier.bid...@st.com
Acked-by: Peter Griffin peter.grif...@linaro.org
---
drivers/clk/st/clkgen-mux.c | 9 +
1 file changed, 9
This patch extend the range of possible frequencies of the fs432c65
and fs660c32 Quad frequency synthesizers.
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Acked-by: Peter Griffin peter.grif...@linaro.org
---
drivers/clk/st/clkgen-fsyn.c | 67
The patch added support for DT registration of ClockGenA9
It includes c32 type PLL.
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Signed-off-by: Olivier Bideau olivier.bid...@st.com
Acked-by: Peter Griffin peter.grif...@linaro.org
---
drivers/clk/st/clkgen-pll.c | 16
On Thu, 26 Jun 2014, Pavel Machek wrote:
Ok, so I have set up machines for ktest / autobisect, and found out that
3.16-rc1 no longer has that problem. Oh well, bisect would not be fun,
anyway...
I am still seeing the problem with 3.16-rc2.
--
Jiri Kosina
SUSE Labs
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