ST-M41T0M6 is available on Colibri carrier boards.
Hence enable M41T0M6 RTC.
Acked-by: Stefan Agner ste...@agner.ch
Signed-off-by: Bhuvanchandra DV bhuvanchandra...@toradex.com
---
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi |6 ++
1 file changed, 6 insertions(+)
diff --git
Bhuvanchandra DV (2):
ARM: dts: vf-colibri: Add I2C support
ARM: dts: vf-colibri-eval-v3.dts: Enable ST-M41T0M6 RTC
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 12 +++-
arch/arm/boot/dts/vf-colibri.dtsi | 13 +
2 files changed, 24 insertions(+), 1
cpuset code stopped using cgroup_lock in favor of cpuset_mutex long ago.
Signed-off-by: Vladimir Davydov vdavy...@parallels.com
---
mm/memcontrol.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 9a37d99aee54..95ee47c0f0a2 100644
---
On 04/11/14 20:52, Paul Bolle wrote:
On Tue, 2014-11-04 at 11:42 -0800, Greg KH wrote:
As it's something that no one seemed to ever need before (i.e. it's not
a regression fix), but it would be a new feature, I don't think it's
really a stable fix.
But feel free to convince me
On Wed, Nov 05, 2014 at 09:34:20AM +1100, Anton Blanchard wrote:
Hi,
commit 9919e39a1738 (kvm: ensure hard lockup detection is disabled by
default) provided a way for the kernel to disable the hard lockup
detector at runtime.
I'm using it on ppc64 but notice some weird behaviour with
On Tue, Sep 30, 2014 at 02:48:35PM -0400, Sean Paul wrote:
On Thu, Jun 26, 2014 at 4:49 PM, Thierry Reding
thierry.red...@gmail.com wrote:
From: Thierry Reding tred...@nvidia.com
When an IOMMU device is available on the platform bus, allocate an IOMMU
domain and attach the display
On Mon, Oct 27, 2014 at 02:27:03PM -0400, Steven Rostedt wrote:
From: Steven Rostedt (Red Hat) rost...@goodmis.org
The current method of handling multiple function callbacks is to register
a list function callback that calls all the other callbacks based on
their hash tables and compare it
Currently calling printk() from a FIQ can result in deadlock on
irq_controller_lock within gic_raise_softirq(). This occurs because
printk(), which is otherwise structured to survive calls from FIQ/NMI,
calls this function to raise an IPI when it needs to wake_up_klogd().
This patch fixes the
On Tue 2014-11-04 10:52:38, Steven Rostedt wrote:
From: Steven Rostedt (Red Hat) rost...@goodmis.org
To allow for the restructiong of the trace_seq code, we need users
of it to use the helper functions instead of accessing the internals
of the trace_seq structure itself.
Cc: Mark Rustad
This patchset modifies the GIC driver to allow it, on supported
platforms, to route IPI interrupts to FIQ and uses this feature
to implement arch_trigger_all_cpu_backtrace for arm.
On platforms not capable of supporting FIQ the signal to generate a
backtrace we fall back to using IRQ for
Hi Joerg,
Seems like a silly bug, could you please help to try this
fix?
Regards!
Gerry
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 7423ee16972f..62ba8a6f6e79 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -1211,7 +1211,7 @@ int msi_irq_domain_alloc_irqs(struct
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On Tue 2014-11-04 10:52:39, Steven Rostedt wrote:
From: Steven Rostedt (Red Hat) rost...@goodmis.org
Use the helper function trace_seq_buffer_ptr() to get the current location
of the next buffer write of a trace_seq object, instead of open coding
it.
This facilitates the conversion of
Previous changes have introduced both a replacement default FIQ handler
and an implementation of arch_trigger_all_cpu_backtrace for ARM but
these are currently independent of each other.
This patch plumbs together these features making it possible, on platforms
that support it, to trigger
Add basic infrastructure for triggering a backtrace of other CPUs
via an IPI, preferably at FIQ level. It is intended that this shall
be used for cases where we have detected that something has already
failed in the kernel.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
Signed-off-by:
Currently it is not possible to exploit FIQ for systems with a GIC, even if
the systems are otherwise capable of it. This patch makes it possible
for IPIs to be delivered using FIQ.
To do so it modifies the register state so that normal interrupts are
placed in group 1 and specific IPIs are
Hi Juri,
On 14/11/5 下午6:08, Juri Lelli wrote:
Hi,
On 05/11/14 08:51, Wanpeng Li wrote:
I observe that dl task can't be migrated to other cpus during cpu hotplug, in
addition, task may/may not be running again if cpu is added back. The root cause
which I found is that dl task will be throtted
We lack of pid hierarchy information, and this will lead to:
a) we don't know pids' relationship, who is whose child:
/proc/PID/ns/pid only tell us whether two pids live in different ns
b) bring trouble to nested lxc container check/restore/migration
c) bring trouble to pid translation between
This series will expose pid inside containers
via procfs.
Also show the hierarchy of pid namespcae.
Then we could know how pid looks inside a container
and their ns relationships.
1. helpful for nested container check/restore
From /proc/PID/ns/pid, we could know whether two pid lived
in the same
On Mon, Oct 27, 2014 at 02:27:04PM -0400, Steven Rostedt wrote:
From: Steven Rostedt (Red Hat) rost...@goodmis.org
The file /sys/kernel/debug/tracing/eneabled_functions is used to debug
ftrace function hooks. Add to the output what function is being called
by the trampoline if the arch
If some issues occurred inside a container guest, host user
could not know which process is in trouble just by guest pid:
the users of container guest only knew the pid inside containers.
This will bring obstacle for trouble shooting.
This patch adds four fields: NStgid, NSpid, NSpgid and NSsid:
On Wed, Nov 05, 2014 at 10:58:28AM +0100, Stephane Eranian wrote:
On Wed, Nov 5, 2014 at 10:21 AM, Peter Zijlstra pet...@infradead.org wrote:
On Tue, Nov 04, 2014 at 09:56:09PM -0500, Kan Liang wrote:
From: Yan, Zheng zheng.z@intel.com
Only enable LBR callstack when user requires fp
On Mon, Oct 27, 2014 at 02:27:05PM -0400, Steven Rostedt wrote:
From: Steven Rostedt (Red Hat) rost...@goodmis.org
When the static ftrace_ops (like function tracer) enables tracing, and it
is the only callback that is referencing a function, a trampoline is
dynamically allocated to the
On Wed, Nov 05, 2014 at 05:53:30PM +1100, Stephen Rothwell wrote:
Hi all,
Due to a move of office, there will not be a linux-next release on
Friday (and maybe Monday).
Changes since 20141104:
The f2fs tree gained a build failure so I used the version from
next-20141104.
The mfd tree
On Mon, Oct 27, 2014 at 02:27:06PM -0400, Steven Rostedt wrote:
From: Steven Rostedt (Red Hat) rost...@goodmis.org
With the introduction of the dynamic trampolines, it is useful that if
things go wrong that ftrace_bug() produces more information about what
the current state is. This can help
On Wed, Nov 05, 2014 at 04:51:57PM +0800, Wanpeng Li wrote:
Note: dl task can be migrated successfully if rq is offline currently,
however,
I'm still not sure why task_rq(task)-rd-span just include the cpu which the
dl
task previous running on, so cpu_active_mask is used in the patch.
Thanks Richard for your response.
Is there any system call in Linux which can access and set variables
in /proc/cmdline ? (Similar to kenv() in FreeBSD which can access and
set variables in /boot/loader.conf).
I would like to use that system call in linux C code, the way I am
using kenv() in
On Wed, Nov 5, 2014 at 11:43 AM, Peter Zijlstra pet...@infradead.org wrote:
On Wed, Nov 05, 2014 at 10:58:28AM +0100, Stephane Eranian wrote:
On Wed, Nov 5, 2014 at 10:21 AM, Peter Zijlstra pet...@infradead.org wrote:
On Tue, Nov 04, 2014 at 09:56:09PM -0500, Kan Liang wrote:
From: Yan,
于 2014/11/4 18:55, Russell King - ARM Linux 写道:
On Tue, Nov 04, 2014 at 05:40:25PM +0800, HuKeping wrote:
Commit 2103f6cba61a8b8bea3fc1b63661d830a2125e76 added a hotplug checking in
machine_kexec_prepare(), but it will lead a failure when loading the
crash-kernel in some cases.
Kexec utility
On 5 November 2014 07:09, Vincent Wan vincent@amd.com wrote:
SDHC controller in AMD chipsets require SDHC transfer mode
register to be cleared for commands without data. The issue was
uncovered during testing eMMC cards on KB/ML based platforms
Signed-off-by: Vincent Wan
On 5 November 2014 07:09, Vincent Wan vincent@amd.com wrote:
AMD SD controller supports the SDR104 mode, but caps2 can not
be promoted to support hs200 for eMMC.
Signed-off-by: Vincent Wan vincent@amd.com
Signed-off-by: Wan Zongshun mcuos@gmail.com
Thanks! Applied for next.
Kind
On 5 November 2014 07:09, Vincent Wan vincent@amd.com wrote:
This patch is to enable the quirk for AMD sdhci requiring transfer
mode register need to be cleared for commands without data
Signed-off-by: Vincent Wan vincent@amd.com
Signed-off-by: Wan Zongshun mcuos@gmail.com
Hi Peter,
On 14/11/5 下午6:50, Peter Zijlstra wrote:
On Wed, Nov 05, 2014 at 04:51:57PM +0800, Wanpeng Li wrote:
Note: dl task can be migrated successfully if rq is offline currently, however,
I'm still not sure why task_rq(task)-rd-span just include the cpu which the dl
task previous running on,
Below is the list of build error/warning regressions/improvements in
v3.18-rc3[1] compared to v3.17[2].
Summarized:
- build errors: +7/-18
- build warnings: +82/-74
JFYI, when comparing v3.18-rc3[1] to v3.18-rc2[3], the summaries are:
- build errors: +5/-21
- build warnings: +36/-110
On Wed, Nov 05, 2014 at 06:57:06PM +0800, Hu Keping wrote:
Actually, i do think there is something wrong in the panic-rountine:
when panic comes, we clear the cpu_online_bits of other CPUs and
keep them calling cpu_relax(). That's why I post that patch ,because
we do not really shut down the
On Tue, Nov 04 2014, Maxime COQUELIN maxime.coque...@st.com wrote:
-#define GENMASK(h, l)(((U32_C(1) ((h) - (l) + 1)) - 1)
(l))
-#define GENMASK_ULL(h, l)(((U64_C(1) ((h) - (l) + 1)) - 1) (l))
+#define GENMASK(h, l) \
+ ((~0UL (BITS_PER_LONG - ((h) - (l) + 1)))
Hi Jiang,
On Wed, Nov 05, 2014 at 06:28:45PM +0800, Jiang Liu wrote:
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 7423ee16972f..62ba8a6f6e79 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -1211,7 +1211,7 @@ int msi_irq_domain_alloc_irqs(struct irq_domain
*domain, int
On Wed, Nov 05, 2014 at 10:15:36AM +, Chander Kashyap wrote:
Exynos7 has core power down state where cores can be powered off
independently.
This patch adds support for this state.
Entry latency for the core power down is calculated as follows:
1. Time difference is measured between
On Wed, Nov 5, 2014 at 12:08 PM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
JFYI, when comparing v3.18-rc3[1] to v3.18-rc2[3], the summaries are:
- build errors: +5/-21
+ /home/kisskb/slave/src/Documentation/mic/mpssd/mpssd.c: error:
(near initialization for
The current driver probe() function assumes the sensor device to be
alwary present and gets executed every time if the driver is loaded,
but the appropriate hardware could not be present.
So, move the platform device creation as part of platform init code
and use the 'id_table' to check if the
On Wed, Nov 05, 2014 at 01:47:31PM +1100, Stephen Rothwell wrote:
Hi Joerg,
After merging the iommu tree, today's linux-next build (powerpc
pc64_defconfig) failed like this:
In file included from arch/powerpc/platforms/powernv/pci.c:33:0:
arch/powerpc/include/asm/iommu.h:140:12: error:
Hi Bjorn,
On Tue, Nov 04, 2014 at 11:38:09AM -0700, Bjorn Helgaas wrote:
[+cc Yinghai]
On Tue, Nov 4, 2014 at 9:22 AM, Joerg Roedel j...@8bytes.org wrote:
Hi,
booting v3.18-rc3 (havn't tested earlier -rcs on this box) on a Xeon box
with a Neterion 10GBit card (vxge driver) I see the
Am 05.11.2014 um 11:56 schrieb santosh nayak:
Thanks Richard for your response.
Is there any system call in Linux which can access and set variables
in /proc/cmdline ? (Similar to kenv() in FreeBSD which can access and
set variables in /boot/loader.conf).
No.
I would like to use that
On Tue, Nov 04, 2014 at 01:25:14PM +, bpqw wrote:
This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes.
For Micron SPI NOR flash,enabling or disabling quad I/O protocol is controlled
by EVCR (Enhanced Volatile Configuration Register), Quad I/O protocol bit 7.
When
On Tue, Nov 04, 2014 at 11:43:07PM +0200, Aya Mahfouz wrote:
This patches replaces one pr_debug call by dev_dbg and
changes the device used by one of the dev_err calls.
i think you should mention in the commit message why you are changing the
device.
and also for revised patch its better if
This is a patch to the rtw_cmd.c file that fixes
Error reported by checkpatch.
Signed-off-by: Sanjeev Sharma sanjeev_sha...@mentor.com
---
Changes in v2:
- Shorten variable name by taking temporary structure
drivers/staging/rtl8723au/core/rtw_cmd.c | 126 +++
1
-Original Message-
From: Jes Sorensen [mailto:jes.soren...@redhat.com]
Sent: Thursday, October 30, 2014 8:21 PM
To: Sharma, Sanjeev
Cc: Joe Perches; larry.fin...@lwfinger.net; gre...@linuxfoundation.org;
linux-wirel...@vger.kernel.org; de...@driverdev.osuosl.org;
On Sat, Oct 25, 2014 at 11:55:27AM +0800, Huang Shijie wrote:
On Mon, Oct 20, 2014 at 10:46:14AM +0200, Boris Brezillon wrote:
read_page_raw and write_page_raw method description is not clear enough.
It clearly specifies that ECC correction should not be involved but does
not talk about
On 11/04/2014 09:26 PM, Mark Brown wrote:
On Tue, Nov 04, 2014 at 07:50:45AM +0100, Mike Looijmans wrote:
v3: Add .of_match_table and prefix lltc
Clarify why regmap cannot be used
Add lltc,operating-mode (0..3) DT property
regulator child nodes are optional
Leave out the mode
There have been several times where I have had to rebuild a kernel to
cause a panic when hitting a WARN() in the code in order to get a crash
dump from a system. Sometimes this is easy to do, other times (such as
in the case of a remote admin) it is not trivial to send new images to the
user.
A
On 11/04/2014 08:47 PM, Mark Brown wrote:
On Tue, Nov 04, 2014 at 02:35:50PM +0100, Mike Looijmans wrote:
I still need help with one thing that isn't clear to me though. The DT is
parsed when calling regulator_register. But then how do I fetch my private
settings in there BEFORE the regulator
On Wed, Nov 05, 2014 at 01:19:10PM +0300, Dan Carpenter wrote:
On Tue, Nov 04, 2014 at 10:47:19PM +0100, Mariusz Gorski wrote:
Fix the implementation of a single-open policy for both
devices (lcd and keypad) by using atomic_t instead of plain ints.
This seems like it might be a real
On Wed, Nov 05, 2014 at 06:41:54PM +0800, Chen Hanxiao wrote:
+static void free_pidns_list(struct list_head *head)
+{
+ struct pidns_list *tmp, *pos;
+
+ list_for_each_entry_safe(pos, tmp, head, list) {
+ list_del(pos-list);
Any need for this one? stuff is freed
On Fri, Oct 31, 2014 at 04:44:46PM +, Nix wrote:
Sorry for the delay: illness and work-related release time flurries.
On 24 Oct 2014, Johan Hovold told this:
[ +CC: linux-usb ]
On Wed, Oct 22, 2014 at 04:36:59PM +0100, Nix wrote:
On 22 Oct 2014, Johan Hovold outgrape:
On
On Wed, 15 Oct 2014, Brian Norris wrote:
On Thu, Oct 09, 2014 at 03:39:23PM +0100, Lee Jones wrote:
+static int check_erased_page(uint8_t *data, uint32_t page_size, int
max_zeros)
+{
+ uint8_t *b = data;
+ int zeros = 0;
+ int i;
+
+ for
On Mon, Nov 03, 2014 at 11:55:08 +0100, Borislav Petkov wrote:
The previous modules were well tested in this motherboard, so I can't
blame them nor any other component - it's a 'cosmic ray' situation.
So we still don't know. I wouldn't throw away the old DIMMs if it is a
single failure
Hi Oded, Jesse,
On Wed, Oct 29, 2014 at 11:33:38AM +0200, Oded Gabbay wrote:
I tested our amdkfd driver with your patches applied (kernel 3.17.1).
I run OpenCL tests, Aparapi/Sumatra (Java) and OpenMP
All tests passed and I didn't see any kernel error messages.
So:
Tested-by: Oded
Hello Charles,
After looking around I found the reset value for the 8772 chip, which
seems to be 0x1E1 (ANAR register).
This equates to (according to include/uapi/linux/mii.h)
ADVERTISE_ALL | ADVERTISE_CSMA.
The register only seems to become 0 if the software reset fails.
Unfortunately, this
On Tuesday 04 November 2014 06:07 PM, Sebastian Andrzej Siewior wrote:
On 11/04/2014 12:44 PM, Vignesh R wrote:
I ran following commands
$ evtest /dev/input/touchscreen0
(with heavy item on touchscreen)
and
$ cat /sys/bus/iio/devices/iio\:device0/scan_elements/in_voltage4_en
(in a
Am 05.11.2014 um 11:41 schrieb Chen Hanxiao:
We lack of pid hierarchy information, and this will lead to:
a) we don't know pids' relationship, who is whose child:
/proc/PID/ns/pid only tell us whether two pids live in different ns
b) bring trouble to nested lxc container
The memset function never had unwinding annotations added.
Currently, when accessing NULL pointer by memset occurs the
backtrace shown will stop at memset or some completely unrelated
function. Add unwinding annotations in hopes of getting a more
useful backtrace when accessing NULL pointer by
Existing code updates cupfreq policy only while executing
cpufreq_apply_cooling() function (i.e. when notify_device != NOTIFY_INVALID).
It doesn't apply constraints when cpufreq policy update happens from any other
place but it should update the cpufreq policy with thermal constraints every
time
We already assured the current task has mm in memcg_kmem_should_charge,
no need to double check.
Signed-off-by: Vladimir Davydov vdavy...@parallels.com
---
mm/memcontrol.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index
On Mon, Nov 03, 2014 at 09:47:17PM +, Robert Bragg wrote:
And do I take it right that if you're able/allowed/etc.. to open/have
the fd to the GPU/DRM/DRI whatever context you have the right
credentials to also observe these counters?
Right and in particular since we want to allow
On Tue, 2014-11-04 at 13:56 -0800, Joe Stringer wrote:
ndo_gso_check() was recently introduced to allow NICs to report the
offloading support that they have on a per-skb basis. Add an
implementation for this driver which checks for tunnel headers over
UDP
of up to 64 octets in length.
On Tue, 2014-11-04 at 13:56 -0800, Joe Stringer wrote:
ndo_gso_check() was recently introduced to allow NICs to report the
offloading support that they have on a per-skb basis. Add an
implementation for this driver which checks for something that looks
like VXLAN.
Implementation shamelessly
On 11/04/2014 05:29 PM, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
Add a generic implementation of an object registry. This targets drivers
and subsystems that provide auxiliary objects that other drivers need to
look up. The goal is to put the difficult parts (keep object
On Tue, 2014-11-04 at 15:45 -0800, Jesse Gross wrote:
On Tue, Nov 4, 2014 at 1:56 PM, Joe Stringer joestrin...@nicira.com wrote:
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c
b/drivers/net/ethernet/intel/i40e/i40e_main.c
index c3a7f4a..21829b5 100644
---
On Tue, Nov 4, 2014 at 11:56 PM, Joe Stringer joestrin...@nicira.com wrote:
Most NICs that report NETIF_F_GSO_UDP_TUNNEL support VXLAN, and not other
UDP-based encapsulation protocols where the format and size of the header may
differ. This patch series implements ndo_gso_check() for these
Hi Michel,
On Wed, Nov 05, 2014 at 01:04:37PM +0100, Stam, Michel [FINT] wrote:
After looking around I found the reset value for the 8772 chip, which
seems to be 0x1E1 (ANAR register).
This equates to (according to include/uapi/linux/mii.h)
ADVERTISE_ALL | ADVERTISE_CSMA.
The register
Quoting Richard Weinberger (rich...@nod.at):
Am 05.11.2014 um 11:41 schrieb Chen Hanxiao:
We lack of pid hierarchy information, and this will lead to:
a) we don't know pids' relationship, who is whose child:
/proc/PID/ns/pid only tell us whether two pids live in different ns
b) bring
On Tue, Nov 4, 2014 at 11:56 PM, Joe Stringer joestrin...@nicira.com wrote:
ndo_gso_check() was recently introduced to allow NICs to report the
offloading support that they have on a per-skb basis. Add an
implementation for this driver which checks for something that looks
like VXLAN.
On Wed, Nov 5, 2014 at 2:34 PM, Jeff Kirsher
jeffrey.t.kirs...@intel.com wrote:
On Tue, 2014-11-04 at 13:56 -0800, Joe Stringer wrote:
ndo_gso_check() was recently introduced to allow NICs to report the
offloading support that they have on a per-skb basis. Add an
implementation for this driver
On Wed, 2014-11-05 at 14:44 +0200, Or Gerlitz wrote:
On Wed, Nov 5, 2014 at 2:34 PM, Jeff Kirsher
jeffrey.t.kirs...@intel.com wrote:
On Tue, 2014-11-04 at 13:56 -0800, Joe Stringer wrote:
ndo_gso_check() was recently introduced to allow NICs to report the
offloading support that they have
On Tue 04-11-14 14:27:05, Tejun Heo wrote:
Hello,
Sorry about the delay.
On Tue, Oct 21, 2014 at 04:29:39PM +0200, Michal Hocko wrote:
Reduce the race window by checking all tasks after OOM killer has been
Ugh... this is never a good direction to take. It often just ends up
making
Hi,
Am 04.11.2014 um 14:33 schrieb Ivan T. Ivanov:
Update compatible string with runtime detected chip revision
information, for example qcom,pm8941 will become qcom,pm8941-v1.0.
That's not what the patch does though?
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
On Wed, Nov 05, 2014 at 11:57:10AM +0100, Stephane Eranian wrote:
Yes, but I wonder how would the tool sort this out if you have FP and LBR
for each sample.
That's the tools 'problem'. It currently can already have FP and Dwarf
bits. And it does not need to request all of them.
My
* Alexandre Montplaisir | 2014-11-04 02:20:10 [+0100]:
Hi Sebastian,
Hi Alexandre,
On 11/03/2014 06:58 PM, Sebastian Andrzej Siewior wrote:
This is really great! Initially, I had believed that we would have
needed to add a separate parser plugin, and to consider perf traces
as a completely
Am 05.11.2014 um 13:41 schrieb Serge E. Hallyn:
Quoting Richard Weinberger (rich...@nod.at):
Am 05.11.2014 um 11:41 schrieb Chen Hanxiao:
We lack of pid hierarchy information, and this will lead to:
a) we don't know pids' relationship, who is whose child:
/proc/PID/ns/pid only tell us
On Wed, Nov 05, 2014 at 06:59:35PM +0800, Wanpeng Li wrote:
Hi Peter,
On 14/11/5 下午6:50, Peter Zijlstra wrote:
On Wed, Nov 05, 2014 at 04:51:57PM +0800, Wanpeng Li wrote:
Note: dl task can be migrated successfully if rq is offline currently,
however,
I'm still not sure why
We found freescale imx6 and rockchip rk3288 and Ingenic JZ4780 (Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they also have some
lightly difference, such as phy pll configuration, register width(imx hdmi
register is one byte, but rk3288 is 4 bytes width and can only access by
Hi Kumar,
On 31 October 2014 19:09, Kumar Gala ga...@codeaurora.org wrote:
On Oct 31, 2014, at 4:30 AM, Ankit Jindal ankit.jin...@linaro.org wrote:
Hi Kumar,
On 21 October 2014 12:08, Kumar Gala ga...@codeaurora.org wrote:
On Oct 21, 2014, at 7:56 AM, Ankit Jindal ankit.jin...@linaro.org
imx6 and rockchip rk3288 and JZ4780 (Ingenic Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they
also have some lightly difference, such as phy pll configuration,
register width(imx hdmi register is one byte, but rk3288 is 4
bytes width), 4K support(imx6 doesn't support 4k, but
the original imx hdmi driver is under staging/imx-drm,
which depends on imx-drm, so move the imx hdmi drvier out
to drm/bridge and rename imx-hdmi to dw-hdmi
Signed-off-by: Andy Yan andy@rock-chips.com
---
drivers/gpu/drm/bridge/Kconfig | 5 +
imx6 and rockchip rk3288 and JZ4780 (Ingenic Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they
also have some lightly difference, such as phy pll configuration,
register width(imx hdmi register is one byte, but rk3288 is 4
bytes width), 4K support(imx6 doesn't support 4k, but
Hello, Michal.
On Wed, Nov 05, 2014 at 01:46:20PM +0100, Michal Hocko wrote:
As I've said I wasn't entirely happy with this half solution but it helped
the current situation at the time. The full solution would require to
I don't think this helps the situation. It just makes the bug more
Em Wed, Nov 05, 2014 at 01:22:46AM +0900, Masami Hiramatsu escreveu:
(2014/11/04 23:38), Arnaldo Carvalho de Melo wrote:
Em Tue, Nov 04, 2014 at 01:36:31PM +0900, Masami Hiramatsu escreveu:
(2014/11/04 1:19), Arnaldo Carvalho de Melo wrote:
Em Mon, Nov 03, 2014 at 09:11:18PM +0900, Masami
On Wed, Nov 5, 2014 at 4:42 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Wed, Nov 05, 2014 at 10:15:36AM +, Chander Kashyap wrote:
Exynos7 has core power down state where cores can be powered off
independently.
This patch adds support for this state.
Entry latency for the
On 03/11/14 15:24, Ivan T. Ivanov wrote:
From: Stanimir Varbanov svarba...@mm-sol.com
The voltage ADC is peripheral of Qualcomm SPMI PMIC chips. It has
15 bits resolution and register space inside PMIC accessible across
SPMI bus.
The vadc driver registers itself through IIO interface.
On 05/11/14 00:01, Hartmut Knaack wrote:
Ivan T. Ivanov schrieb am 03.11.2014 16:24:
From: Stanimir Varbanov svarba...@mm-sol.com
Document DT binding for Qualcomm SPMI PMIC voltage ADC
driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
Signed-off-by: Ivan T. Ivanov
Hi, all,
В Ср, 05/11/2014 в 16:51 +0800, Wanpeng Li пишет:
I observe that dl task can't be migrated to other cpus during cpu hotplug, in
addition, task may/may not be running again if cpu is added back. The root
cause
which I found is that dl task will be throtted and removed from dl rq
Exynos7 has core power down state where cores can be powered off independently.
This patch adds support for this state.
Entry latency for the core power down is calculated as follows:
1. Time difference is measured between cpuidle entry and exit.
2. WFI is skipped for measuring the time.
3.
On Wed, Nov 5, 2014 at 1:49 PM, Peter Zijlstra pet...@infradead.org wrote:
On Wed, Nov 05, 2014 at 11:57:10AM +0100, Stephane Eranian wrote:
Yes, but I wonder how would the tool sort this out if you have FP and LBR
for each sample.
That's the tools 'problem'. It currently can already have FP
This patch fix spelling typo in printk and Kconfig within
various part of kernel sources.
Signed-off-by: Masanari Iida standby2...@gmail.com
---
arch/mips/cavium-octeon/setup.c| 4 ++--
arch/mips/pci/pci-octeon.c | 2 +-
Em Wed, Nov 05, 2014 at 06:07:08PM +0900, Masami Hiramatsu escreveu:
(2014/11/05 15:50), Hemant Kumar wrote:
And also, user interface is a discussion point. This series defines new
sdt-cache command, and we already have buildid-cache command. We should
have probe-cache command too? or
On Wed 05-11-14 08:02:47, Tejun Heo wrote:
Hello, Michal.
On Wed, Nov 05, 2014 at 01:46:20PM +0100, Michal Hocko wrote:
As I've said I wasn't entirely happy with this half solution but it helped
the current situation at the time. The full solution would require to
I don't think this
This one patch does too much to be reviewed easily.
One patch is supposed to modify/add one thing at a time in the kernel.
Separating platform specific code from imx-drm/imx-hdmi is one thing.
Adding support for multi-byte register access is something different.
i.e. Something like.
1/3 split
On Wed, Nov 05, 2014 at 12:41:34PM +0100, Mike Looijmans wrote:
On 11/04/2014 09:26 PM, Mark Brown wrote:
So, I managed to find a datasheet[1] and this does actually seem to be a
standard register map. It looks like this is a 4x12 register map with
the program bytes being essentially
Hi Andy,
I think separating the core from the SoC specific part is a good step
into the right direction.
Am Mittwoch, den 05.11.2014, 20:55 +0800 schrieb Andy Yan:
imx6 and rockchip rk3288 and JZ4780 (Ingenic Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they
also have
On Wed 05-11-14 14:31:00, Michal Hocko wrote:
On Wed 05-11-14 08:02:47, Tejun Heo wrote:
[...]
Also, why isn't this part of
oom_killer_disable/enable()? The way they're implemented is really
silly now. It just sets a flag and returns whether there's a
currently running instance or not.
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