From: Bob Moore robert.mo...@intel.com
This option (-fi) allows the specification of a file that is used
to specify initialization values for individual namespace objects.
Each line in the file is in the format:
ACPI pathname Integer Value
This patch only affects acpiexec which is not in the
From: Bob Moore robert.mo...@intel.com
Version 20141107.
Signed-off-by: Bob Moore robert.mo...@intel.com
Signed-off-by: Lv Zheng lv.zh...@intel.com
---
include/acpi/acpixf.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/acpi/acpixf.h b/include/acpi/acpixf.h
From: Gregory CLEMENT gregory.clem...@free-electrons.com
The Armada 375 SoC comes with an USB2 host and device controller and
an USB3 controller. The USB cluster control register allows to manage
common features of both USB controllers.
This commit adds a driver integrated in the generic PHY
From: Vivek Gautam gautam.vi...@samsung.com
Exynos7 SoC has now separate gate control for 125MHz pipe3 phy
clock, as well as 60MHz utmi phy clock.
Additionally, separate gate control is available for the clock
used for ITP (Isochronous Transfer Packet) generation.
So get the same and control in
From: Vivek Gautam gautam.vi...@samsung.com
This PHY controller is also present on Exynos7 platform
in arch-exynos family.
So PHY_EXYNOS5_USBDRD should now depend on ARCH_EXYNOS.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
From: Bob Moore robert.mo...@intel.com
Was stop_bits_none, corrected to stop_bits_zero.
David E. Box.
Signed-off-by: David E. Box david.e@linux.intel.com
Signed-off-by: Bob Moore robert.mo...@intel.com
Signed-off-by: Lv Zheng lv.zh...@intel.com
---
drivers/acpi/acpica/utresrc.c |2 +-
1
From: Gregory CLEMENT gregory.clem...@free-electrons.com
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers. This commit adds the Device Tree
binding documentation for this
From: Gregory CLEMENT gregory.clem...@free-electrons.com
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Acked-by: Jason Cooper ja...@lakedaemon.net
Signed-off-by: Kishon Vijay
From: Andrew Lunn and...@lunn.ch
Describe the binding for the Marvell MVEBU SATA phy. This driver
can be used at least with Kirkwood, Dove and maybe others.
Additionally, update the SATA binding with the properties to link
to the phy nodes.
Signed-off-by: Andrew Lunn and...@lunn.ch
Acked-by:
Hi Jason,
After merging the irqchip tree, today's linux-next build (arm
multi_v7_defconfig) produced this warning:
include/linux/irqchip/arm-gic.h:109:53: warning: its scope is only this
definition or declaration, which is probably not what you want
In file included from
From: Vivek Gautam gautam.vi...@samsung.com
Some Exynos boards have a separate regulator controlling a
Boost 5V supply which goes as input for VBUS regulator.
So adding a control for the same in driver, to enable
vbus supply on the port.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
From: Heikki Krogerus heikki.kroge...@linux.intel.com
Creates the lookup separately. Hard coding the consumer as
it can't be anything else except musb.
Signed-off-by: Heikki Krogerus heikki.kroge...@linux.intel.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
From: Heikki Krogerus heikki.kroge...@linux.intel.com
On some platforms a PHY may need to be handled also in the
host controller driver. Exynos5420 SoC requires some PHY
tuning based on the USB speed. This patch delivers dwc3's
PHYs to the xhci platform device when it's created.
Signed-off-by:
From: Heikki Krogerus heikki.kroge...@linux.intel.com
This makes to_phy() macro work with other variable names
besides dev.
Signed-off-by: Heikki Krogerus heikki.kroge...@linux.intel.com
Tested-by: Vivek Gautam gautam.vi...@samsung.com
Acked-by: Felipe Balbi ba...@ti.com
Signed-off-by: Kishon
From: Heikki Krogerus heikki.kroge...@linux.intel.com
The users of the old method are now converted to the new one.
Signed-off-by: Heikki Krogerus heikki.kroge...@linux.intel.com
[ kis...@ti.com : made phy-berlin-usb.c and phy-miphy28lp.c to use the updated
devm_phy_create
From: Heikki Krogerus heikki.kroge...@linux.intel.com
Separates registration of the phy and the lookup. The method
is copied from clkdev.c,
Signed-off-by: Heikki Krogerus heikki.kroge...@linux.intel.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/phy.txt | 60
From: Antoine Tenart antoine.ten...@free-electrons.com
Add the driver driving the Marvell Berlin USB PHY. This allows to
initialize the PHY and to use it from the USB driver later.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
From: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Berlin BG2 SATA PHY is slightly different from currently supported
BG2Q SATA PHY. Document the new compatible for BG2's PHY.
Acked-by: Antoine Ténart antoine.ten...@free-electrons.com
Signed-off-by: Sebastian Hesselbarth
From: Antoine Tenart antoine.ten...@free-electrons.com
Document the bindings of the Marvell Berlin USB PHY driver.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
.../devicetree/bindings/phy/berlin-usb-phy.txt | 16
Instead of using the node pointer of the PHY provider and then scanning its
child nodes to get a reference to the PHY, directly use the node pointer
present in of_phandle_args to get a reference to the PHY.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/phy/phy-core.c | 10
From: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Currently, Berlin SATA PHY driver assumes PHY_BASE address being
constant. While this PHY_BASE is correct for BG2Q, older BG2 PHY_BASE
is different. Prepare the driver for BG2 support by moving the phy_base
into private driver data.
From: Bob Moore robert.mo...@intel.com
Add extra set of parens for assignments within an expression.
This patch only affects compiler support which is not in the Linux kernel.
Signed-off-by: Bob Moore robert.mo...@intel.com
Signed-off-by: Lv Zheng lv.zh...@intel.com
---
From: Roman Byshko rbys...@gmail.com
The driver for sun4i USB phys currently supports
only phy1 and phy2 which are used for USB host
controllers. This patch adds support for USB phy0,
which is used by the musb hdrc USB controller.
Signed-off-by: Roman Byshko rbys...@gmail.com
Acked-by: Maxime
From: Gabriel FERNANDEZ gabriel.fernan...@st.com
This patch to compensate tx impedance (Sata, PCIe)
depending on Soc cuts the kernel is built for.
Signed-off-by: Giuseppe Condorelli giuseppe.condore...@st.com
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
Signed-off-by: Kishon
From: Gabriel FERNANDEZ gabriel.fernan...@st.com
SSC is the technique of modulating the operating frequency of a signal
slightly to spread its radiated emissions over a range of frequencies.
This reduction in the maximum emission for a given frequency helps meet
radiated emission requirements.
From: Bob Moore robert.mo...@intel.com
Now emit ASL+ code which includes C-style operators.
Optionally, legacy text ASL operators can still be emitted.
This patch only affects compiler/disassembler support which is not in the
Linux kernel.
Signed-off-by: Bob Moore robert.mo...@intel.com
From: Gabriel FERNANDEZ gabriel.fernan...@st.com
This patch to tune on/off the ssc on miphy sata setup.
User can now enable ssc via dt blob, it is useful to reduce
effects of EMI.
Signed-off-by: Giuseppe Condorelli giuseppe.condore...@st.com
Signed-off-by: Gabriel Fernandez
From: Gabriel FERNANDEZ gabriel.fernan...@st.com
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.
Signed-off-by: alexandre torgue alexandre.tor...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Gabriel Fernandez
David Rientjes rient...@google.com writes:
On Mon, 24 Nov 2014, Kirill A. Shutemov wrote:
This make sure that we try to allocate hugepages from local node. If
we can't we fallback to small page allocation based on
mempolicy. This is based on the observation that allocating pages
on
From: Bob Moore robert.mo...@intel.com
This macro is intended to simplify the constuction of _PLD buffers.
NOTE: Prototype only, subject to change before this macro is
added to the ACPI specification. David E. Box.
Signed-off-by: David E. Box david.e@linux.intel.com
Signed-off-by: Bob Moore
From: Gabriel FERNANDEZ gabriel.fernan...@st.com
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.
Signed-off-by: alexandre torgue alexandre.tor...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Gabriel Fernandez
Hi Greg,
Please find the pull request for 3.19 merge window.
This contains improvements in phy core dealing with non-dt boot.
It also adds 3 new phy drivers armada375-usb2, berlin-usb and miphy28lp.
There is a patch that touches drivers/pinctrl since one of the PHY drivers
is present there and
To be more friendly with drop monitor, we should only call kfree_skb() when
the packets were dropped and use consume_skb() in other cases.
Cc: Eric Dumazet eric.duma...@gmail.com
Signed-off-by: Jason Wang jasow...@redhat.com
---
Changes from V2:
- use unlikely() when necessary
Changes from V1:
-
On 11/26/2014 11:26 PM, Luis R. Rodriguez wrote:
From: Luis R. Rodriguez mcg...@suse.com
Some folks had reported that some xen hypercalls take a long time
to complete when issued from the userspace private ioctl mechanism,
this can happen for instance with some hypercalls that have many
Signed-off-by: Jason Wang jasow...@redhat.com
---
drivers/vhost/vhost.h | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/vhost/vhost.h b/drivers/vhost/vhost.h
index 3eda654..7d039ef 100644
--- a/drivers/vhost/vhost.h
+++ b/drivers/vhost/vhost.h
@@ -12,8 +12,6 @@
#include
On 11/26/2014 10:02 PM, Will Deacon wrote:
On Wed, Nov 26, 2014 at 04:49:47AM +, AKASHI Takahiro wrote:
If tracer modifies a syscall number to -1, this traced system call should
be skipped with a return value specified in x0.
This patch implements this semantics.
Please note:
* syscall
Hi,
Kindly review the patch.
Thanks
Srikanth
On Tue, Nov 18, 2014 at 10:09 AM, Srikanth Thokala
sriku.li...@gmail.com wrote:
In the first example, the loads into 'x' and 'y' on CPU 2 doesn't
match the sequence of events described below it. To match the
sequence of events, the values of 'A'
Fixes the following :
scripts/kconfig/menu.c: In function 'get_symbol_str':
scripts/kconfig/menu.c:590:18: warning: 'jump' may be used uninitialized in
this function [-Wmaybe-uninitialized]
jump-offset = strlen(r-s);
^
scripts/kconfig/menu.c:551:19: note: 'jump' was
Signed-off-by: Paul E. McKenney paul...@linux.vnet.ibm.com
Reviewed-by: Lai Jiangshan la...@cn.fujitsu.com
diff --git a/kernel/rcu/tree.c b/kernel/rcu/tree.c
index 8749f43f3f05..fc0236992655 100644
--- a/kernel/rcu/tree.c
+++ b/kernel/rcu/tree.c
@@ -759,39 +759,71 @@ void
On Thu, Nov 27, 2014 at 11:55 AM, Kishon Vijay Abraham I kis...@ti.com wrote:
From: Gabriel FERNANDEZ gabriel.fernan...@st.com
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.
Signed-off-by: alexandre torgue alexandre.tor...@st.com
Signed-off-by: Giuseppe
Andrew Morton a...@linux-foundation.org writes:
On Thu, 27 Nov 2014 00:31:28 +0900 OGAWA Hirofumi
hirof...@mail.parknet.co.jp wrote:
a) don't bother with -d_time for positives - we only check it for negatives
anyway.
b) make sure to set it at unlink and rmdir time - at *that* point
Hi Dave
this pull request is for rockchip drm v14, based on Joerg's iommu
arm/rockchip branch.
The following changes since commit 656d7077d8ffd1c2492d4a0a354367ab2e545059:
dt-bindings: iommu: Add documentation for rockchip iommu (2014-11-03
17:29:09 +0100)
are available in the git
On 2014年11月27日 10:12, Dave Airlie wrote:
Hi Dave
Do you mean that I need send you a branch, based on drm-next, merge with
iommu tree and rockchip drm?
Yes, grab drm-next, git pull the arm/rockchip branch from Joerg's
tree, put rockchip drm
patches on top, send me pull request.
I'll
On Wed, Nov 26, 2014 at 07:04:47PM +0200, Michael S. Tsirkin wrote:
On Wed, Nov 26, 2014 at 05:51:08PM +0100, Christian Borntraeger wrote:
But this one was giving users in field false positives.
So lets try to fix those, ok? If we cant, then tough luck.
Sure.
I think the simplest way
- Original Message -
In the case the user-space daemon crashes, hangs or is killed, we
need to down the semaphore, otherwise, after the daemon starts next
time, the obsolete data in fcopy_transaction.message or
fcopy_transaction.fcopy_msg will be used immediately.
Reviewed-by:
Chander Kashyap wrote:
Exynos7 supports multiple idle states. Core power down is one such
idle state, where cores can be powered off independently.
This patch adds support for core power down idle state.
Entry latency for core power down idle state is calculated as follows:
1. Time
On 12 November 2014 at 00:03, Sudeep Holla sudeep.ho...@arm.com wrote:
If the mailbox controller expects the payload is in place before
initiating the transmit, then it's impossible to reuse the list
maintained by core mailbox code currently. Maintaining another list
for sending the message in
On 4 November 2014 at 04:35, Suman Anna s-a...@ti.com wrote:
The OMAP mailbox driver and its existing clients (remoteproc
for OMAP4+) are adapted to use the generic mailbox framework.
The main changes for the adaptation are:
- The tasklet used for Tx is replaced with the state machine from
This patch adds ths mux/divider/gate clocksof CMU_G2D domain which includes
G2D/MDMA IPs. The CMU_G2D must need the clocks related to G2D by providing
CMU_TOP domain. So, this patch add several clocks for G2D from CMU_TOP domain.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa
This patch adds the mux/divider/gate clocks for CMU_AUD domain which
includes the clocks of Cortex-A6/Bus/Audio clocks.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
This patch adds the necessary Kconfig entries to enable
support for the ARMv8 based Exynos5433 SoC.
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
Acked-by: Inki Dae
This patch adds the mux/divider/gate clocks for CMU_G3D domain which contains
the clocks for GPU(3D Graphics Engine).
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
This patch adds new s3c24xx_serial_drv_data structure for Exynos5433 SoC
because Exynos5433 has different fifo size from existing Exynos4 SoC.
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Jiri Slaby jsl...@suse.cz
Cc: linux-ser...@vger.kernel.org
Signed-off-by: Chanwoo Choi
From: Jaehoon Chung jh80.ch...@samsung.com
This patch adds MSHC (Mobile Storage Host Controller) dt node for Exynos5433
SoC. MSHC is an interface between the system the SD/MMC card.
Cc: Kukjin Kim kgene@samsung.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Arnd Bergmann a...@arndb.de
Cc:
This patch adds the mux/divider/gate clocks for CMU_FSYS domain which
contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
This patch add binding documentation for Exynos5433 clock controller.
Exynos5433 has various clock domains So, this documentation explains
the detailed clock domains ans usage guide.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi
This patchset adds new 64-bit Exynos5433 Samsung SoC which contains quad
Cortex-A57 and quad Cortex-A53. It is desigend with the 20nm low power process.
This patchset include some patches such as:
- Support booting of Exynos5433
- Support UART/MCT/GIC/HSI2C/SPI/PDMA/MSHC
- Support the clock
This patch adds SPI (Serial Peripheral Interface) dt node for Exynos5433 SoC.
SPI transfers serial data by using various peripherals. SPI includes
8-bit/16-bit/32-bit shift registers to transmit and receive data. PDMA is used
for SPI communication.
Cc: Kukjin Kim kgene@samsung.com
Cc: Mark
This patch adds the divider/gate of CMU_GSCL domain which contains gscaler
clocks.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim
This patch adds the the mux/divider/gate clocks for CMU_DISP domain which
includes the clocks of Display IPs (DECON/HDMI/DSIM/MIXER). The CMU_DISP clocks
is used to need the source clock of CMU_MIF domain so, the CMU_MIF's clocks
related to CMU_DISP should be always on state.
Also, CMU_DISP must
On Thu, Nov 27, 2014 at 02:53:47PM +1100, Stephen Rothwell wrote:
Hi Jens,
Today's linux-next merge of the block tree got a conflict in
fs/fs-writeback.c between commit ef7fdf5e8c87 (vfs: add support for a
lazytime mount option)
Mergign that into a branch for linux-next must surely have
This patch adds missing gate clocks of CMU_PERIS domain
which includes TMU/TZPC/SECKEY/CHIPID/TOPRTC/EFUSE IPs.
The special clocks of CMU_PERIS use fin_pll source clock directly.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi
This patch adds the mux/divider/gate clock fo CMU_MIF domain which includes
the clocks for DMC(DRAM memory controller) and CCI(Cache Coherent Interconnect).
The CMU_MIF domain provides the source clocks for CMU_DISP/CMU_BUS2.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa
This patch adds missing divider/gate clocks of CMU_PERIC domain
which includes I2S/PCM/SPDIF/PWM/SLIMBUS IPs. The SPI/I2S may use
external input clock which has 'ioclk_*' prefix.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi
On Thu, Nov 27, 2014 at 08:09:19AM +0100, Heiko Carstens wrote:
On Wed, Nov 26, 2014 at 07:04:47PM +0200, Michael S. Tsirkin wrote:
On Wed, Nov 26, 2014 at 05:51:08PM +0100, Christian Borntraeger wrote:
But this one was giving users in field false positives.
So lets try to fix
This patch adds the mux/divider/gate clocks for CMU_BUS{0|1|2} domains
which contain global data buses clocked at up the 400MHz. These blocks
transfer data between DRAM and various sub-blocks. These clock domains
also contain global peripheral buses clocked at 67/111/200/222/266/333/400
MHz and
This patch adds the MUX (multiplexer) clocks for CMU_TOP domain of Exynos5433.
CMU_TOP domain provides source clocks to other CMU domains.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae
This patch adds driver data for Exynos5433 SoC. Exynos5433 includes 228 multi-
functional input/output port pins and 135 memory port pins. There are 41 general
port groups and 2 memory port groups.
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Thomas Abraham thomas.abra...@linaro.org
Cc: Linus
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC
based on Octal core CPUs (quad Cortex-A57 and quad Cortex-A53).
Cc: Kukjin Kim kgene@samsung.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Arnd Bergmann a...@arndb.de
Cc: Olof Johansson o...@lixom.net
Cc: Catalin Marinas
This patch adds the support for CMU (Clock Management Units) of Exynos5433
which is 64bit SoC and has Octa-cores. This patch supports necessary clocks
for kernel boot as following:
- PLL/MMC/UART/MCT/I2C/SPI
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Hi all,
I spent already hours on sending this fucking email. The patch works for
me. And if someone else is interested in working of this device feel
free and do it yourself.
26.11.2014 08:05, Marcel Holtmann wrote:
Hi Dmitry,
Add support for bluetooth MCI WB335 (AR9565) Wi-Fi+bt module.
Marc,
On Mon, Nov 24, 2014 at 02:35:07PM +, Marc Zyngier wrote:
> The GICv3 architecture provides a way to implement support for
> MSI/MSI-X using a specific block called the ITS (Interrupt Translation
> Service).
>
> The ITS can be accurately described as "page tables for
> interrupts". If
Yingjoe,
On Tue, Nov 25, 2014 at 04:04:18PM +0800, Yingjoe Chen wrote:
> This series is 8th version of interrupt polarity support for MediaTek SoCs.
>
> I rebased previous version to latest tip/irq/irqdomain, and fix issues
> raised by Marc & Mark. The interrupt & irq free work fine on mt8135
Am 26.11.2014 um 01:55 schrieb Greg KH:
> On Wed, Nov 26, 2014 at 01:11:01AM +0100, Richard Weinberger wrote:
>> Am 26.11.2014 um 00:51 schrieb Greg KH:
>>> On Wed, Nov 26, 2014 at 12:36:52AM +0100, Richard Weinberger wrote:
systemd has a hard dependency on CONFIG_FHANDLE.
>>>
>>> It's been
On 26/11/14 00:07, Stephen Rothwell wrote:
>>> So we need both CONFIG_OF and CONFIG_COMMON_CLK, the attached patch
>>> should fix this.
>>
>> Thanks, applied.
>
> But not pushed out, yet? Just checking that you haven't pushed on
> purpose.
Not yet. I'll be pushing today.
Tomi
On Tue, Nov 25, 2014 at 06:47:21PM +, Marc Zyngier wrote:
> GICv2m is a very simple addition to the standard GICv2 interrupt
> controller, offering a way to convert writes from a device to a
> "wire-like" interrupt. Basically what we need to support MSI on the
> GIC.
>
> The v2m widget
On 26/11/2014 04:31, Michael Ellerman wrote:
> OK. You say "LPAR", by which you mean "under phyp" I think. I haven't seen
> this
> under KVM, and it looks like KVM doesn't implement "set-indicator" so that
> would explain that.
Yes LPAR implies phyp, and KVM don't implement "set-indicator" so
On Wed, Nov 12, 2014 at 02:22:51PM +0800, Jisheng Zhang wrote:
> These patches try to improve dw-apb-ictl irqchip driver a bit.
>
> The first patch improves the performance a bit -- use the relaxed version
>
> The two dw-apb-ictl's irq_chip_type instances have separate mask registers,
> so the
On 11/25/2014 10:22 PM, Michal Marek wrote:
> On Tue, Nov 25, 2014 at 06:42:54PM +0200, Boaz Harrosh wrote:
>> From: Boaz Harrosh
>>
>> I'm not sure what is the costume with such IDE project files.
>> Most might be dot-files. It is kind of annoying for the Kdevelop4 user.
>>
>> So please consider
On 26 November 2014 at 06:18, Wanpeng Li wrote:
> Hi Vincent,
>
> On 11/25/14, 9:52 PM, Vincent Guittot wrote:
>>
>> On 25 November 2014 at 03:24, Wanpeng Li wrote:
>>>
>>> Hi Vincent,
>>> On 11/4/14, 12:54 AM, Vincent Guittot wrote:
The average running time of RT tasks is used to
Hi Eduardo,
>
> Lukasz,
>
> On Thu, Nov 20, 2014 at 05:21:25PM +0100, Lukasz Majewski wrote:
> > This patch extends the of-thermal.c to provide information about
> > number of available trip points.
> >
> > Signed-off-by: Lukasz Majewski
> > ---
> > Changes for v2:
> > - Provide detailed
Hi Eduardo,
>
> Lukasz,
>
> Same stuff here.
>
> On Thu, Nov 20, 2014 at 05:21:26PM +0100, Lukasz Majewski wrote:
> > This patch extends the of-thermal.c to provide check if trip point
> > is enabled.
> >
> > Signed-off-by: Lukasz Majewski
> > ---
> > Changes for v2:
> > - Replace int with
(2014/11/21 0:02), Steve Capper wrote:
> On Tue, Nov 18, 2014 at 01:32:50AM -0500, David Long wrote:
>> From: "David A. Long"
>>
>> This patchset is heavily based on Sandeepa Prabhu's ARM v8 kprobes patches,
>> first
>> seen in October 2013. This version attempts to address concerns raised by
Hi Eduardo,
> Hello Lukasz,
>
> On Thu, Nov 20, 2014 at 05:21:27PM +0100, Lukasz Majewski wrote:
> > This patch extends the of-thermal.c to export copy of trip points
> > for a given thermal zone.
> >
> > Thermal drivers should use of_thermal_get_trip_points() method to
> > get pointer to table
Thomas,
Well, here it is. :) I can't build-test most of it because I haven't
rebuilt my aarch64 toolchain yet. I'm sending this now so you can pull
at your leisure (Maybe let it cook in Weds' and Thurs' -next?). I have
nothing else pending for this window unless an urgent bugfix pops up.
This
Hi Eduardo,
> On Thu, Nov 20, 2014 at 05:21:27PM +0100, Lukasz Majewski wrote:
> > This patch extends the of-thermal.c to export copy of trip points
> > for a given thermal zone.
> >
> > Thermal drivers should use of_thermal_get_trip_points() method to
> > get pointer to table of thermal trip
Am Mittwoch, 26. November 2014, 10:49:17 schrieb Roger:
> On 2014/11/25 22:39, Heiko Stübner wrote:
> > Am Dienstag, 25. November 2014, 16:40:59 schrieb Sergei Shtylyov:
> >> Hello.
> >>
> >> On 11/25/2014 12:08 PM, Roger Chen wrote:
> >>> add gmac info in rk3288.dtsi for GMAC driver
> >>>
> >>>
Hi Eduardo,
> On Thu, Nov 20, 2014 at 05:21:28PM +0100, Lukasz Majewski wrote:
> > Before this change it was only possible to set get_temp() and
> > get_trend() methods to be used in the common code handling passing
> > parameters via device tree to "cpu-thermal" CPU thermal zone device.
> >
> >
On Di, 2014-11-25 at 18:42 +0200, Michael S. Tsirkin wrote:
> It's never declared so no need to make it extern.
Hmm, can't see patches 14 -> 17 on the maling list
(virtualizat...@lists.linux-foundation.org). Also no cover letter.
Someone eating mails?
cheers,
Gerd
--
To unsubscribe from
Hi Dmitry,
> I spent already hours on sending this fucking email. The patch works for me.
> And if someone else is interested in working of this device feel free and do
> it yourself.
so you are blaming the maintainers. Thank you very much :(
Maybe reading Documentation/SubmittingPatches and
At Wed, 26 Nov 2014 14:15:27 +0900,
Marcel Holtmann wrote:
>
> Hi Takashi,
>
> >> Since the addition of 10d4c6736ea "Bluetooth: btusb: Add Broadcom patch
> >> RAM support", I (and a number of other people[*]) have been seeing
> >> this trace on resume from suspend.
> >>
> >> WARNING: CPU: 1
On Tue, 25 Nov 2014, Brian Norris wrote:
> On Sun, Nov 09, 2014 at 04:24:44PM +, Rob Ward wrote:
> > From 4e9b8ff3a6731a0ac43eac2e8bdf47101ff20ede Mon Sep 17 00:00:00 2001
> > From: Rob Ward
> > Date: Tue, 21 Oct 2014 17:46:53 +0100
> > Subject: [PATCH] mtd: phram: Allow multiple phram
I do not blame anyone. I am not paid for submitting patches. I've done
some work to find a solution. You can treat my post as a bug report.
I know it as a very hard 'extra work' to edit my mail, or remove a
duplicate of a 3 line patch. But the whole thing is too much of an extra
work for me.
Wanpeng Li wrote:
> Hi all,
> On Tue, Nov 25, 2014 at 04:50:06PM +0200, Nadav Amit wrote:
>>> On Nov 25, 2014, at 16:17, Paolo Bonzini wrote:
>>>
>>>
>>>
>>> On 25/11/2014 15:05, Nadav Amit wrote:
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index
(2014/11/26 2:15), Seth Jennings wrote:
> Note to Steve:
> Masami's IPMODIFY patch is heading for -next via your tree. Once it arrives,
> I'll rebase and make the change to set IPMODIFY. Do not pull this for -next
> yet. This version (v4) is for review and gathering acks.
BTW, as we discussed
On Wednesday 26 November 2014 10:32:35 Lyra Zhang wrote:
>
> For now, we have only one platform(Sharkl64) based on ARM64 been submitted,
> but we're intending to add support for more our platforms based on ARM64 or
> ARM32 in the future. There are many common devices on these platforms, such
> as
(2014/11/26 2:15), Seth Jennings wrote:
> This commit introduces code for the live patching core. It implements
> an ftrace-based mechanism and kernel interface for doing live patching
> of kernel and kernel module functions.
>
> It represents the greatest common functionality set between kpatch
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Hi Nadav,
On Wed, Nov 26, 2014 at 11:00:34AM +0200, Nadav Amit wrote:
>Wanpeng Li wrote:
>
>> Hi all,
>> On Tue, Nov 25, 2014 at 04:50:06PM +0200, Nadav Amit wrote:
On Nov 25, 2014, at 16:17, Paolo Bonzini wrote:
On 25/11/2014 15:05, Nadav Amit wrote:
>> diff
On Thu, Nov 20, 2014 at 11:18:05AM -0800, Scott Branden wrote:
> Add nand_shutdown to wait for current nand operations to finish and prevent
> further operations by changing the nand flash state to FL_SHUTDOWN.
>
> This is addressing a problem observed during reboot tests using UBIFS
> root file
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