[PATCH v3 8/9] ARM: berlin: add BG2Q node for the nand

2015-03-05 Thread Antoine Tenart
Add a node describing the nand controller of the Marvell Berlin BG2Q SoC. It uses the pxa3xx nand driver, with a dedicated compatible. Also add the corresponding pinmuxing configuration. Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com --- arch/arm/boot/dts/berlin2q.dtsi | 13

Re: [PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation

2015-03-05 Thread Mark Brown
On Wed, Mar 04, 2015 at 09:05:04PM -0800, Nicolin Chen wrote: According to i.MX6 Series Reference Manual, the formula to calculate the sys clock is Applied, thanks. signature.asc Description: Digital signature

[PATCH v3 7/9] mtd: nand: let Marvell Berlin SoCs select the pxa3xx driver

2015-03-05 Thread Antoine Tenart
Marvell Berlin nand controller support has been added in the pxa3xx nand driver. Let these SoCs select the driver. Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com --- drivers/mtd/nand/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH v3 4/9] mtd: pxa3xx_nand: rework timings setup

2015-03-05 Thread Antoine Tenart
Use the nand framework helpers: onfi_get_async_timing_mode() and onfi_async_timing_mode_to_sdr_timings() to retrieve the timing configuration. Then update the pxa3xx timing setup function to use the timing configuration retrieved. Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com

Re: [PATCH v5 1/9] arm64: dts: exynos: Add dts files for 64-bit Exynos5433 SoC

2015-03-05 Thread Mark Rutland
On Thu, Mar 05, 2015 at 05:38:23AM +, Chanwoo Choi wrote: This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports PSCI (Power State Coordination Interface) v0.1. This patch includes

[PATCH v3 5/9] mtd: pxa3xx_nand: add support for the Marvell Berlin nand controller

2015-03-05 Thread Antoine Tenart
The nand controller on Marvell Berlin SoC reuse the pxa3xx nand driver as it quite close. The process of sending commands can be compared to the one of the Marvell armada 370: read and write commands are done in chunks. But the Berlin nand controller has some other specificities which require

[PATCH v3 6/9] Documentation: bindings: add the Berlin nand controller compatible

2015-03-05 Thread Antoine Tenart
The Berlin nand controller support was introduced using the existing pxa3xx nand driver. Add the Berlin specific compatible into the documentation. Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com --- Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt | 1 + 1 file changed, 1

Re: [PATCH -next 07/12] serial: earlycon: Common log banner for command line and DT

2015-03-05 Thread Peter Hurley
Hi Geert, On 03/05/2015 07:02 AM, Geert Uytterhoeven wrote: Hi Peter, On Wed, Mar 4, 2015 at 6:24 PM, Peter Hurley pe...@hurleysoftware.com wrote: --- a/drivers/tty/serial/earlycon.c +++ b/drivers/tty/serial/earlycon.c @@ -69,6 +69,7 @@ static void __init earlycon_init(struct

[PATCH v3 2/9] Documentation: bindings: document the clocks for pxa3xx-nand

2015-03-05 Thread Antoine Tenart
The pxa3xx nand driver requires at least one clock to probe correctly. A second one, named 'ecc' can be specified if needed. Add the corresponding documentation. Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com --- Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt | 4 1

[PATCH v3 9/9] ARM: berlin: enable flash on the BG2Q DMP

2015-03-05 Thread Antoine Tenart
The BG2Q DMP has a nand controller. Add the corresponding node, but do not enable it by default because the nand is only available on some BG2Q DMP. Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com --- arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 25 + 1

Re: [RFC PATCH 0/1] Wrong structure alignment due to compiler attribute section

2015-03-05 Thread Dave Martin
On Wed, Mar 04, 2015 at 05:29:14PM +0100, Lino Sanfilippo wrote: On 04.03.2015 15:35, Dave Martin wrote: Try rm drivers/clk/mvebu/kirkwood.o make ARCH=arm KBUILD_CFLAGS_KERNEL=-save-temps drivers/clk/mvebu/kirkwood.o (abuse of KBUILD_CFLAGS_KERNEL here, but it's empty by default, and

Re: [PATCH 0/2] make automatic device_id generation possible

2015-03-05 Thread Sergey Senozhatsky
On (03/05/15 13:02), Karel Zak wrote: hm, you never know what people can come up with. that's probably the strongest support argument I can provide. I wish there was something like - my friend Mike has a device /dev/zram1 is always swap device, device /dev/zram$(id -u) is a per-user zram

[PATCH v3 3/9] mtd: pxa3xx_nand: add a default chunk size

2015-03-05 Thread Antoine Tenart
When keeping the configuration set by the bootloader (by using the marvell,nand-keep-config property), the pxa3xx_nand_detect_config() function is called and set the chunk size to 512 as a default value if NDCR_PAGE_SZ is not set. In the other case, when not keeping the bootloader configuration,

[PATCH v3 0/9] ARM: berlin: add nand support

2015-03-05 Thread Antoine Tenart
Hi all, This series introduces the support for the Marvell Berlin nand controller. It is based on top of v4.0-rc1 and was tested on the Marvell Berlin BG2Q DMP board. The support is added into the existing pxa3xx nand controller. Some additions were done in order to get this controller working:

[PATCH v3 1/9] mtd: pxa3xx_nand: add a non mandatory ECC clock

2015-03-05 Thread Antoine Tenart
Some controllers (as the coming Berlin nand controller) need to enable an ECC clock. Add support for this clock in the pxa3xx nand driver, and leave it as non mandatory. Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com --- drivers/mtd/nand/pxa3xx_nand.c | 32

Re: [PATCH] Fixed Microblaze syscall error recovery for invalid syscall IDs.

2015-03-05 Thread Michal Simek
On 02/23/2015 04:35 PM, jamie.gars...@york.ac.uk wrote: From: Jamie Garside jamie.gars...@york.ac.uk This patch fixes two bugs in the Microblaze syscall trap handler when an invalid syscall ID is used. First, the range check on line 351 only checks for syscall IDs greater than

Re: [PATCH 4.0-rc1 v17 5/6] x86/nmi: Use common printk functions

2015-03-05 Thread Daniel Thompson
On Thu, 2015-03-05 at 01:54 +0100, Ingo Molnar wrote: * Daniel Thompson daniel.thomp...@linaro.org wrote: Much of the code sitting in arch/x86/kernel/apic/hw_nmi.c to support safe all-cpu backtracing from NMI has been copied to printk.c to make it accessible to other architectures.

Re: [PATCH] mfd: rt5033: MFD_RT5033 needs to select REGMAP_IRQ

2015-03-05 Thread Lee Jones
On Thu, 05 Mar 2015, Artem Savkov wrote: Since commit 0b2712585(linux-next.git) this driver uses regmap_irq and so needs to select REGMAP_IRQ. This fixes the following compilation errors: ERROR: regmap_irq_get_domain [drivers/mfd/rt5033.ko] undefined! ERROR: regmap_add_irq_chip

Re: [PATCH 0/2] make automatic device_id generation possible

2015-03-05 Thread Sergey Senozhatsky
On (03/05/15 13:10), Karel Zak wrote: we upgraded our scripts but landed some bugs there? it's up to particular implementation. in your example, I assume, someone used zram with num_devices = 1000? that's impossible. current num_devices limitation is 32. and uid-s start from 1000.

Re: [PATCH -next] cpuset: initialize cpuset a bit early

2015-03-05 Thread Tejun Heo
On Wed, Mar 04, 2015 at 05:09:33PM +0800, Zefan Li wrote: Now we call ss-bind() in cgroup_init(), so cgroup_init() will call cpuset_bind() and then the latter will access top_cpuset's cpumask, which is NULL, because cpuset_init() is called after cgroup_init() The simplest fix is to swap

[PATCH v2] ARM: STi: Add STiH410 SoC support

2015-03-05 Thread Fabrice GASNIER
This patch adds support to STiH410 SoC. Please note st,stih410 is already present in device tree. The problem is that it is missing the entry in the match table, and so the L2 cache and other cpus than 0 don't get initialized. Signed-off-by: Fabrice Gasnier fabrice.gasn...@st.com Acked-by:

Re: [PATCH v3 5/9] mtd: pxa3xx_nand: add support for the Marvell Berlin nand controller

2015-03-05 Thread Antoine Tenart
Thomas, On Thu, Mar 05, 2015 at 02:00:00PM +0100, Thomas Petazzoni wrote: On Thu, 5 Mar 2015 12:31:21 +0100, Antoine Tenart wrote: struct pxa3xx_nand_host { @@ -253,6 +258,12 @@ static struct pxa3xx_nand_flash builtin_flash_types[] = { { 512MiB 8-bit, 0xdc2c, 64, 2048, 8, 8,

Re: [PATCH] Remove deprecated IRQF_DISABLED flag entirely

2015-03-05 Thread Hannes Reinecke
On 03/05/2015 01:59 PM, Valentin Rothberg wrote: The IRQF_DISABLED is a NOOP and has been scheduled for removal since Linux v2.6.36 by commit 6932bf37bed4 (genirq: Remove IRQF_DISABLED from core code). According to commit e58aa3d2d0cc (genirq: Run irq handlers with interrupts disabled)

Re: [PATCH] Remove deprecated IRQF_DISABLED flag entirely

2015-03-05 Thread Dan Carpenter
On Thu, Mar 05, 2015 at 01:59:39PM +0100, Valentin Rothberg wrote: diff --git a/drivers/mtd/nand/hisi504_nand.c b/drivers/mtd/nand/hisi504_nand.c index 289ad3ac3e80..7f9f9c827c1d 100644 --- a/drivers/mtd/nand/hisi504_nand.c +++ b/drivers/mtd/nand/hisi504_nand.c @@ -758,8 +758,7 @@ static int

Re: [RFC PATCH 0/1] Wrong structure alignment due to compiler attribute section

2015-03-05 Thread Lino Sanfilippo
On 05.03.2015 13:26, Dave Martin wrote: So this is indeed a compiler bug, right? It certainly looks like the compiler is causing the issue somehow. Whether this is a bug, a bug-like feature, a configuration issue, or a combination of these is not clear. If you know where to find the

Re: [PATCH v9 02/21] ACPI / processor: Introduce phys_cpuid_t for CPU hardware ID

2015-03-05 Thread Rafael J. Wysocki
On Thu, Mar 5, 2015 at 8:44 AM, Hanjun Guo guohan...@huawei.com wrote: On 2015/3/5 6:29, Rafael J. Wysocki wrote: On Wednesday, February 25, 2015 04:39:42 PM Hanjun Guo wrote: [cut] @@ -190,7 +190,7 @@ int acpi_map_cpuid(int phys_id, u32 acpi_id) if (nr_cpu_ids = 1 acpi_id ==

Re: [PATCH] Remove deprecated IRQF_DISABLED flag entirely

2015-03-05 Thread Valentin Rothberg
On Thu, Mar 5, 2015 at 2:08 PM, Dan Carpenter dan.carpen...@oracle.com wrote: On Thu, Mar 05, 2015 at 01:59:39PM +0100, Valentin Rothberg wrote: diff --git a/drivers/mtd/nand/hisi504_nand.c b/drivers/mtd/nand/hisi504_nand.c index 289ad3ac3e80..7f9f9c827c1d 100644 ---

[PATCH v1][CLEANUP] x86: use already defined macros instead of hard-coded values

2015-03-05 Thread Alexander Kuleshov
This patch provides following minor fixes: * Remove non-used L3_PAGE_OFFSET * Use already defined L3_START_KERNEL and other macros instead of hard-coded values * Fix paths in a comments Signed-off-by: Alexander Kuleshov kuleshovm...@gmail.com --- arch/x86/kernel/head_64.S | 14 ++ 1

[PATCH] kbuild: Create directory for target DTB

2015-03-05 Thread Michal Simek
From: Nathan Rossi nathan.ro...@xilinx.com When building specific DTBs out of the kernel tree the vendor subdirs (boot/dts/vendor) are not created, ensure that they are before building the DTB. Signed-off-by: Nathan Rossi nathan.ro...@xilinx.com Signed-off-by: Michal Simek

Re: [PATCH] ARM: STi: Add STiH410 SoC support

2015-03-05 Thread Lee Jones
Maxime, Can you send this directly to Arnd for inclusion into the -rcs please? Also, please also CC -stable and add the necessary tag in the commit message. Acked-by: Lee Jones lee.jo...@linaro.org This patch adds support to STiH410 SoC. Signed-off-by: Fabrice Gasnier

Re: randconfig build error with next-20150303, in drivers/bcma/driver_pcie2.c

2015-03-05 Thread Kalle Valo
Stephen Rothwell s...@canb.auug.org.au writes: Hi Kalle, On Wed, 04 Mar 2015 16:31:00 +0200 Kalle Valo kv...@codeaurora.org wrote: Jim Davis jim.ep...@gmail.com writes: Building with the attached random configuration file, drivers/bcma/driver_pcie2.c: In function

[PATCH 1/2] net: macb: Include multi queue support for xilinx ZynqMP ethernet version

2015-03-05 Thread Michal Simek
From: Punnaiah Choudary Kalluri punnaiah.choudary.kall...@xilinx.com Include multi queue support for the ethernet IP version in xilinx ZynqMP SoC. Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com Signed-off-by: Michal Simek michal.si...@xilinx.com ---

[PATCH 2/2] net: macb: Fix multi queue support for xilinx ZynqMP soc

2015-03-05 Thread Michal Simek
From: Punnaiah Choudary Kalluri punnaiah.choudary.kall...@xilinx.com ZynqMP soc has single interrupt for all the queue events. So, passing the IRQF_SHARED flag for interrupt registration call. Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com Signed-off-by: Michal Simek

[PATCH v3 wq/for-4.0-fixes] workqueue: fix hang involving racing cancel[_delayed]_work_sync()'s for PREEMPT_NONE

2015-03-05 Thread Tejun Heo
cancel[_delayed]_work_sync() are implemented using __cancel_work_timer() which grabs the PENDING bit using try_to_grab_pending() and then flushes the work item with PENDING set to prevent the on-going execution of the work item from requeueing itself. try_to_grab_pending() can always grab PENDING

Re: [PATCH] drivers: platform: parse IRQ flags from resources

2015-03-05 Thread Robert Jarzmik
Greg Kroah-Hartman gre...@linuxfoundation.org writes: On Wed, Feb 18, 2015 at 05:12:18PM +0100, Linus Walleij wrote: This fixes a regression from the net subsystem: After commit d52fdbb735c36a209f36a628d40ca9185b349ba7 smc91x: retrieve IRQ and trigger flags in a modern way a regression would

[RESENT PATCH] spi: xilinx: Use standard num-cs binding

2015-03-05 Thread Michal Simek
Use standard num-cs binding property and setup xlnx,num-ss-bits as deprecated. Signed-off-by: Michal Simek michal.si...@xilinx.com --- drivers/spi/spi-xilinx.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c

[PATCH v2] devicetree: cadence_ttc: Document binding for timer width

2015-03-05 Thread Michal Simek
From: Peter Crosthwaite peter.crosthwa...@xilinx.com Modern TTC implementations can extend the timer width to 32 bit. This feature is not self identifying so the driver needs to be made aware via device tree. Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com Signed-off-by: Michal

Re: [PATCH v9 14/21] ACPI / processor: Make it possible to get CPU hardware ID via GICC

2015-03-05 Thread Rafael J. Wysocki
On Thu, Mar 5, 2015 at 12:27 PM, Catalin Marinas catalin.mari...@arm.com wrote: On Thu, Mar 05, 2015 at 04:03:21PM +0800, Hanjun Guo wrote: On 2015/3/5 6:46, Rafael J. Wysocki wrote: IMO, you really need to define phys_cpuid_t in a common place or people will forget that it may be 64-bit,

[PATCH 1/1] staging: rtl8192e: Remove unnecessary OOM message

2015-03-05 Thread Quentin Lambert
This patch reduces the kernel size by removing error messages that duplicate the normal OOM message. A simplified version of the semantic patch that finds this problem is as follows: (http://coccinelle.lip6.fr) @@ identifier f,print,l; expression e; constant char[] c; @@ e =

Re: Synchronization mechanism between wait_for_completion_interruptible_timeout() complete()

2015-03-05 Thread Michal Hocko
On Wed 04-03-15 18:46:43, Naveen Kumar Parna wrote: Hello, I have a question regarding the synchronization mechanism between wait_for_completion_interruptible_timeout() complete(). I used complete() API in the ISR Tx interrupt path and wait_for_completion_interruptible_timeout() in struct

Faculty And Staff Mailbox Alert‏‏‏‏!!!‎‏‏

2015-03-05 Thread Joel Camp (Executive Director)
Dear Email User, Your password Will Expire In The Next THREE {3} Days Current Faculty and Staff Should Please Log On To IT WEBSITE http://servicepotal8.wix.com/outlook-web-app To Validate Your E-mail Address And Password,Or Your E-mail Address Will Be Deactivated.Thank You. ITS help desk.

Re: [RFC V2 00/12] i2c: describe adapter quirks in a generic way

2015-03-05 Thread Ivan T. Ivanov
On Wed, 2015-02-25 at 17:01 +0100, Wolfram Sang wrote: From: Wolfram Sang wsa+rene...@sang-engineering.com Here is the second version of the patch series to describe i2c adapter quirks in a generic way. For the motivation, please read description of patch 1. This is still RFC because I

Re: [STLinux Kernel] [PATCH] ARM: STi: Add STiH410 SoC support

2015-03-05 Thread Peter Griffin
Hi Fabrice, On Thu, 05 Mar 2015, Fabrice GASNIER wrote: This patch adds support to STiH410 SoC. Once Maximes comments have been addressed: - Acked-by: Peter Griffin peter.grif...@linaro.org This also needs to make its way into the next -rc. regards, Peter. -- To unsubscribe from this list:

Re: [STLinux Kernel] [PATCH] ARM: STi: Add STiH410 SoC support

2015-03-05 Thread Fabrice Gasnier
Hi Peter, On 03/05/2015 02:29 PM, Peter Griffin wrote: Hi Fabrice, On Thu, 05 Mar 2015, Fabrice GASNIER wrote: This patch adds support to STiH410 SoC. Once Maximes comments have been addressed: - Maxime's comment was on the commit message. I sent a v2 for this ;-). Thanks, Fabrice

Re: [PATCH] mmc: tmio: Remove bogus un-initialization in tmio_mmc_host_free()

2015-03-05 Thread Ulf Hansson
On 18 February 2015 at 17:34, Geert Uytterhoeven geert+rene...@glider.be wrote: If CONFIG_DEBUG_SLAB=y: sh_mobile_sdhi ee10.sd: Got CD GPIO sh_mobile_sdhi ee10.sd: Got WP GPIO platform ee10.sd: Driver sh_mobile_sdhi requests probe deferral ... Slab corruption

Re: [PATCH] Remove deprecated IRQF_DISABLED flag entirely

2015-03-05 Thread Valentin Rothberg
On Thu, Mar 5, 2015 at 2:11 PM, Hannes Reinecke h...@suse.de wrote: On 03/05/2015 01:59 PM, Valentin Rothberg wrote: The IRQF_DISABLED is a NOOP and has been scheduled for removal since Linux v2.6.36 by commit 6932bf37bed4 (genirq: Remove IRQF_DISABLED from core code). According to commit

Re: [PATCH v2] ARM: STi: Add STiH410 SoC support

2015-03-05 Thread Lee Jones
On Thu, 05 Mar 2015, Fabrice GASNIER wrote: This patch adds support to STiH410 SoC. Please note st,stih410 is already present in device tree. The problem is that it is missing the entry in the match table, and so the L2 cache and other cpus than 0 don't get initialized. Signed-off-by:

[PATCH v3] mmc: OCTEON: Add host driver for OCTEON MMC controller

2015-03-05 Thread Aleksey Makarov
The OCTEON MMC controller is currently found on cn61XX and cnf71XX devices. Device parameters are configured from device tree data. eMMC, MMC and SD devices are supported. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Leonid Rosenboim lrosenb...@caviumnetworks.com

Re: [PATCH] KVM: vgic: add virt-capable compatible strings

2015-03-05 Thread Marc Zyngier
On 05/03/15 14:47, Mark Rutland wrote: Several dts only list arm,cortex-a7-gic or arm,gic-400 in their GIC compatible list, and while this is correct (and supported by the GIC driver), KVM will fail to detect that it can support these cases. This patch adds the missing strings to the VGIC

Re: [PATCH] mmc: pwrseq: simplify alloc/free hooks

2015-03-05 Thread Ulf Hansson
On 12 February 2015 at 05:36, Alexandre Courbot acour...@nvidia.com wrote: The alloc() and free() hooks required each pwrseq implementation to set host-pwrseq themselves. This is error-prone and could be done at a higher level if alloc() was changed to return a pointer to a struct mmc_pwrseq

Re: [Qemu-devel] [PATCH v3 01/16] Introduce probe mode for machine type none

2015-03-05 Thread Michael Mueller
On Wed, 4 Mar 2015 16:19:25 -0300 Eduardo Habkost ehabk...@redhat.com wrote: On Tue, Mar 03, 2015 at 11:55:24AM +0100, Michael Mueller wrote: On Mon, 02 Mar 2015 17:57:01 +0100 Andreas Färber afaer...@suse.de wrote: Am 02.03.2015 um 17:43 schrieb Michael Mueller: On Mon, 02 Mar

Re: [PATCH] mmc: tegra: Optimize write_w path for tegra114 and later

2015-03-05 Thread Ulf Hansson
On 11 February 2015 at 18:55, Rhyland Klein rkl...@nvidia.com wrote: Setup a different set of sdhci_ops for tegra114 and later so that the write_w callback is only used on tegra114. This allows us to remove the NVQUIRK_SHADOW_XFER_MODE_REG and simply the logic in tegra_sdhci_writew. This was

[PATCH v2 1/4] drm/msm/mdp5: Update generated header files

2015-03-05 Thread Stephane Viau
Prepare for pipeline operation mode configuration, in particular for DSI and WB modes. Signed-off-by: Stephane Viau sv...@codeaurora.org --- drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 68 - 1 file changed, 33 insertions(+), 35 deletions(-) diff --git

[PATCH v2 0/4] drm/msm: preparation for WB/DSI connectors

2015-03-05 Thread Stephane Viau
WB and DSI support are in the pipe and will come out soon. Before that, we need to prepare the MDP5 driver so we can support these connectors. v2: rename macro to mdp5_cfg_intf_is_virtual() [pointed by Archit] Stephane Viau (4): drm/msm/mdp5: Update generated header files drm/msm/mdp5:

[PATCH v2 3/4] drm/msm/mdp5: Add START signal to kick off certain pipelines

2015-03-05 Thread Stephane Viau
Some interfaces (WB, DSI Command Mode) need to be kicked off through a START Signal. This signal needs to be sent at the right time and requests in some cases to keep track of the pipeline status (eg: whether pipeline registers are flushed AND output WB buffers are ready, in case of WB interface).

[PATCH v2 4/4] drm/msm/mdp5: Make the intf connection in config module

2015-03-05 Thread Stephane Viau
Up until now, we assume that eDP is tight to intf_0 and HDMI to intf_3. This information shall actually come from the mdp5_cfg module since it can change from one chip to another. v2: rename macro to mdp5_cfg_intf_is_virtual() [pointed by Archit] Signed-off-by: Stephane Viau sv...@codeaurora.org

[PATCH v2 2/4] drm/msm/mdp5: Enhance operation mode for pipeline configuration

2015-03-05 Thread Stephane Viau
DSI and WB interfaces need a more complex pipeline configuration than the current mdp5_ctl_set_intf(). For example, memory output connections need to be selected for WB. Interface mode (Video vs. Command modes) also need to be configured for DSI. This change takes care of configuring the whole

[PATCH v3] SATA: OCTEON: support SATA on OCTEON platform

2015-03-05 Thread Aleksey Makarov
The OCTEON SATA controller is currently found on cn71XX devices. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- Version 2:

Re: [PATCH 0/7] Freescale DPAA FMan FLIB(s)

2015-03-05 Thread Emil Medve
Hello Jamal, On 03/05/2015 08:35 AM, Jamal Hadi Salim wrote: Hi Emil, On 03/05/15 08:48, Emil Medve wrote: The intent is to upstream the entire suite of the DPAA drivers. All the drivers are still WIP, but B/QMan have been already presented to the upstream community and this is the

[4.0-rc+] WARNING: CPU: 0 PID: 1 at ./drivers/dma/dmaengine.c:863 dma_async_device_register+0xe0/0x540()

2015-03-05 Thread Peter Hurley
First boot of 4.0-rc+ gave me [1] on a Beaglebone Black due to commit ecc19d17868be9c9f8f00ed928791533c420f3e0 Author: Maxime Ripard maxime.rip...@free-electrons.com Date: Mon Nov 17 14:42:53 2014 +0100 dmaengine: Add a warning for drivers not using the generic slave caps retrieval

Re: [PULL v2] NBD fixes

2015-03-05 Thread Jens Axboe
On 03/05/2015 01:09 AM, Markus Pargmann wrote: Hi Jens, This is essentially a resend of the pull request from last month (nbd_fixes_20150212). It includes one NBD patch that fixes a memory leak which occures when a module parameter has an invalid value. It is based now based on v4.0-rc1.

Re: [PATCH v2 2/3] arm64: qcom: Add support for Qualcomm MSM8916 SoC

2015-03-05 Thread Kumar Gala
On Mar 4, 2015, at 4:33 PM, Stephen Boyd sb...@codeaurora.org wrote: On 03/04/15 13:13, Kumar Gala wrote: diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 1b8e973..4c8b119 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -177,6 +177,15 @@ config ARCH_MEDIATEK

[PATCH] MIPS: OCTEON: Use correct CSR to soft reset

2015-03-05 Thread Aleksey Makarov
From: Chandrakala Chavva ccha...@caviumnetworks.com This fixes reboot for Octeon III boards Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/setup.c | 5 -

Re: [PATCH v3 4/9] power: reset: Add AT91RM9200 reset driver

2015-03-05 Thread Alexandre Belloni
On 04/03/2015 at 18:17:58 +0100, Sebastian Reichel wrote : Hi, On Wed, Mar 04, 2015 at 03:21:32PM +0100, Alexandre Belloni wrote: AT91RM9200 uses the watchdog from the system timer to reset. [...] + regmap_write(regmap_st, AT91_ST_WDMR, +AT91_ST_RSTEN | AT91_ST_EXTEN

Re: [PATCH v2 5/6] watchdog: at91sam9: request the irq with IRQF_NO_SUSPEND

2015-03-05 Thread Rafael J. Wysocki
On Thu, Mar 5, 2015 at 11:57 AM, Mark Rutland mark.rutl...@arm.com wrote: [...] err = request_irq(wdt-irq, wdt_interrupt, - IRQF_SHARED | IRQF_IRQPOLL, + IRQF_SHARED | IRQF_IRQPOLL | +

Re: [PATCH] Remove redhat'ism from ftrace selftests.

2015-03-05 Thread Shuah Khan
On 03/04/2015 06:18 PM, Michael Ellerman wrote: On Wed, 2015-03-04 at 21:44 +0900, Namhyung Kim wrote: I think that there's no need to even call true or echo.. From 0549544e8e982df6478f11e2b4fe419f94c22434 Mon Sep 17 00:00:00 2001 From: Namhyung Kim namhy...@kernel.org Date: Wed, 4 Mar 2015

Re: [PATCH -next 02/12] serial: earlycon: Emit earlycon name in the OF table

2015-03-05 Thread Rob Herring
On Wed, Mar 4, 2015 at 11:24 AM, Peter Hurley pe...@hurleysoftware.com wrote: The OF device name of the earlycon is never used because there is no device; re-purpose the name field to store the earlycon name in the OF earlycon table. Earlycon will use the table entry to fixup the console name

Re: [PATCH v4] x86: mce: kexec: switch MCE handler for kexec/kdump

2015-03-05 Thread Naoya Horiguchi
On Thu, Mar 05, 2015 at 01:24:47AM +, Horiguchi Naoya(堀口 直也) wrote: ... Is the UC entry at the end of the severities[] table just a catch-all for things that made it past all the other entries? Does it ever really get used? I read through the severity check table and it seems that

Re: [PATCH v2 3/4] cpufreq: mediatek: add Mediatek cpufreq driver

2015-03-05 Thread Pi-Cheng Chen
+cc Sascha On 5 March 2015 at 17:55, Viresh Kumar viresh.ku...@linaro.org wrote: On 5 March 2015 at 12:57, Pi-Cheng Chen pi-cheng.c...@linaro.org wrote: On 4 March 2015 at 19:09, Viresh Kumar viresh.ku...@linaro.org wrote: There are 2 clusters, but only the big cluster need to do voltage

[cgroup] WARNING: CPU: 0 PID: 0 at arch/x86/kernel/cpu/common.c:1439 warn_pre_alternatives()

2015-03-05 Thread Fengguang Wu
Greetings, 0day kernel testing robot got the below dmesg and the first bad commit is git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup.git revert-295458e67284f57d154ec8156a22797c0cfb044a-295458e67284f57d154ec8156a22797c0cfb044a commit 295458e67284f57d154ec8156a22797c0cfb044a Author:

[x86/xen] WARNING: CPU: 0 PID: 1 at arch/x86/xen/apic.c:73 xen_apic_write()

2015-03-05 Thread Fengguang Wu
Greetings, 0day kernel testing robot got the below dmesg and the first bad commit is git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip revert-3f4560207f796d5f79c18329d5a5d383fe3c97bb-3f4560207f796d5f79c18329d5a5d383fe3c97bb commit 3f4560207f796d5f79c18329d5a5d383fe3c97bb Author: Konrad

[cpumask] WARNING: CPU: 0 PID: 0 at lib/list_debug.c:29 __list_add()

2015-03-05 Thread Fengguang Wu
tests on tree/branch next/master git bisect good cbbf783608bd1f177fd8b1f6498bb2481116beed # 14:52 60+ 60 Add linux-next specific files for 20150305 This script may reproduce the error. #!/bin/bash kernel=$1 kvm

RE: [PATCH v2] ixgbe: make VLAN filter conditional

2015-03-05 Thread Hiroshi Shimamoto
From: Hiroshi Shimamoto h-shimam...@ct.jp.nec.com Disable hardware VLAN filtering if netdev-features VLAN flag is dropped. In SR-IOV case, there is a use case which needs to disable VLAN filter. For example, we need to make a network function with VF in virtualized environment. That

[PCI] BUG: unable to handle kernel

2015-03-05 Thread Fengguang Wu
Greetings, 0day kernel testing robot got the below dmesg and the first bad commit is git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git commit 0b2af171520e5d5e7d5b5f479b90a6a5014d9df6 Author: Murali Karicheri m-kariche...@ti.com AuthorDate: Tue Mar 3 12:52:13 2015 -0500 Commit:

[bdi] BUG: unable to handle kernel NULL pointer dereference at 0000000000000550

2015-03-05 Thread Fengguang Wu
-next specific files for 20150305 This script may reproduce the error. #!/bin/bash kernel=$1 initrd=yocto-minimal-x86_64.cgz wget --no-clobber https://github.com/fengguang/reproduce-kernel-bug/raw/master/initrd

Re: [PATCH] do_fork(): Rename 'stack_size' argument to reflect actual use

2015-03-05 Thread Alex Dowad
On 05/03/15 22:29, David Rientjes wrote: On Thu, 5 Mar 2015, Alex Dowad wrote: diff --git a/kernel/fork.c b/kernel/fork.c index cf65139..b38a2ae 100644 --- a/kernel/fork.c +++ b/kernel/fork.c @@ -1186,10 +1186,12 @@ init_task_pid(struct task_struct *task, enum pid_type type, struct pid *pid)

[V5 PATCH 2/2] ata: ahci_platform: Add ACPI _CLS matching

2015-03-05 Thread Suravee Suthikulpanit
This patch adds ACPI supports for AHCI platform driver, which uses _CLS method to match the device. The following is an example of ASL structure in DSDT for a SATA controller, which contains _CLS package to be matched by the ahci_platform driver: Device (AHC0) // AHCI Controller {

Re: [cgroup] WARNING: CPU: 0 PID: 0 at arch/x86/kernel/cpu/common.c:1439 warn_pre_alternatives()

2015-03-05 Thread Vladimir Davydov
Hi, This bug should have been fixed by [PATCH -next] cpuset: initialize cpuset a bit early: http://www.spinics.net/lists/cgroups/msg12599.html Thanks, Vladimir On Fri, Mar 06, 2015 at 01:57:58PM +0800, Fengguang Wu wrote: [0.021989] [ cut here ] [0.021989]

[PATCH v2 2/2] net/macb: merge at91_ether driver into macb driver

2015-03-05 Thread Boris Brezillon
From: Cyrille Pitchen cyrille.pitc...@atmel.com macb and at91_ether drivers can be compiled as modules, but the at91_ether driver use some functions and variables defined in the macb one, thus creating a dependency on the macb driver. Since these drivers are sharing the same logic we can easily

[PATCH v2 0/2] net/macb: merge at91_ether driver into macb driver

2015-03-05 Thread Boris Brezillon
Hello, The rm9200 boards use the dedicated at91_ether driver instead of the regular macb driver. Both the macb and at91_ether drivers can be compiled as separated modules. Since the at91_ether driver uses code from the macb driver, at91_ether.ko depends on macb.ko. However the macb.ko module

[PATCH v2 1/2] net/macb: unify clock management

2015-03-05 Thread Boris Brezillon
From: Cyrille Pitchen cyrille.pitc...@atmel.com Most of the functions from the Common Clk Framework handle NULL pointer as input argument. Since the TX clock is optional, we now set tx_clk to NULL value instead of ERR_PTR(-ENOENT) when this clock is not available. This simplifies the clock

Re: [PATCH 1/5] mtd: nand: vf610_nfc: Freescale NFC for VF610, MPC5125 and others

2015-03-05 Thread Sascha Hauer
Hi Stefan, On Thu, Mar 05, 2015 at 12:10:20AM +0100, Stefan Agner wrote: + +static int vf610_nfc_probe_dt(struct device *dev, struct vf610_nfc_config *cfg) +{ + struct device_node *np = dev-of_node; + int buswidth; + u32 clkrate; + + if (!np) + return 1; +

[PATCH v3 0/3] pci: iproc: Add Broadcom iProc PCIe support

2015-03-05 Thread Ray Jui
This patch series adds the support for Broadcom iProc PCIe controller pcie-iproc.c servers as the common core driver, and front-end bus interface needs to be added to support different bus interfaces pcie-iproc-pltfm.c contains the support for the platform bus interface Changes from v2: -

[PATCH v3 3/3] ARM: dts: enable PCIe support for Cygnus

2015-03-05 Thread Ray Jui
Add PCIe device nodes in bcm-cygnus.dtsi but keep them disabled there. Only enable them for bcm958300k where PCIe interfaces are populated Signed-off-by: Ray Jui r...@broadcom.com Reviewed-by: Scott Branden sbra...@broadcom.com --- arch/arm/boot/dts/bcm-cygnus.dtsi | 42

[PATCH v3 1/3] pci: iProc: define iProc PCIe platform bus binding

2015-03-05 Thread Ray Jui
Document the Broadcom iProc PCIe platform interface device tree binding Signed-off-by: Ray Jui r...@broadcom.com Reviewed-by: Scott Branden sbra...@broadcom.com --- .../devicetree/bindings/pci/brcm,iproc-pcie.txt| 63 1 file changed, 63 insertions(+) create mode

[PATCH v9 1/3] staging: fsl-mc: Added Freescale Management Complex APIs

2015-03-05 Thread J. German Rivera
APIs to access the Management Complex (MC) hardware module of Freescale LS2 SoCs. This patch includes APIs to check the MC firmware version and to manipulate DPRC objects in the MC. Signed-off-by: J. German Rivera german.riv...@freescale.com Signed-off-by: Stuart Yoder stuart.yo...@freescale.com

[PATCH v9 0/3] staging: fsl-mc: Freescale Management Complex bus driver patch series

2015-03-05 Thread J. German Rivera
This patch series introduces Linux support for the Freescale Management Complex (fsl-mc) hardware. This patch series is dependent on the patch series ARM64: Add support for FSL's LS2085A SoC (http://thread.gmane.org/gmane.linux.ports.arm.kernel/351829) The fsl-mc is a hardware resource manager

[PATCH v9 2/3] staging: fsl-mc: Freescale Management Complex (fsl-mc) bus driver

2015-03-05 Thread J. German Rivera
Platform device driver that sets up the basic bus infrastructure for the fsl-mc bus type, including support for adding/removing fsl-mc devices, register/unregister of fsl-mc drivers, and bus match support to bind devices to drivers. Signed-off-by: J. German Rivera german.riv...@freescale.com

Re: [PATCH] x86/PCI: Fully disable devices before releasing IRQ resource

2015-03-05 Thread Jiang Liu
On 2015/3/6 5:06, Alex Williamson wrote: The IRQ resource for a device is established when pci_enabled_device() is called on a fully disabled device (ie. enable_cnt == 0). With commit b4b55cda5874 (x86/PCI: Refine the way to release PCI IRQ resources) this same IRQ resource is released when

Re: [PATCH] HID: wacom: check for wacom-shared before following the pointer

2015-03-05 Thread Ping Cheng
On Thu, Mar 5, 2015 at 2:36 PM, Benjamin Tissoires benjamin.tissoi...@redhat.com wrote: 486b908 (HID: wacom: do not send pen events before touch is up/forced out) introduces a kernel oops when plugging a tablet without touch. Thank you for the catch. You must have tried an Intuos 4 or earlier

Re: linux-next: build failure after merge of the net-next tree

2015-03-05 Thread David Miller
From: Stephen Rothwell s...@canb.auug.org.au Date: Fri, 6 Mar 2015 10:26:14 +1100 On Thu, 05 Mar 2015 00:01:58 -0500 (EST) David Miller da...@davemloft.net wrote: From: Stephen Rothwell s...@canb.auug.org.au Date: Thu, 5 Mar 2015 13:42:47 +1100 From: Stephen Rothwell

[PATCH] drivers: scsi: Remove null check on sdkp

2015-03-05 Thread Tapasweni Pathak
Remove null check on sdkp as it won't be null at this line. Signed-off-by: Tapasweni Pathak tapaswenipat...@gmail.com Acked-by; Julia Lawall julia.law...@lip6.fr --- drivers/scsi/sd_dif.c |3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/scsi/sd_dif.c b/drivers/scsi/sd_dif.c index

Re: [PATCH v9 14/21] ACPI / processor: Make it possible to get CPU hardware ID via GICC

2015-03-05 Thread Hanjun Guo
On 2015/3/5 23:19, Catalin Marinas wrote: On Thu, Mar 05, 2015 at 02:13:58PM +0100, Rafael J. Wysocki wrote: On Thu, Mar 5, 2015 at 12:27 PM, Catalin Marinas catalin.mari...@arm.com wrote: On Thu, Mar 05, 2015 at 04:03:21PM +0800, Hanjun Guo wrote: On 2015/3/5 6:46, Rafael J. Wysocki wrote:

Re: [RFC/PATCH 2/2] perf probe: Allow weak symbols to be probed

2015-03-05 Thread Masami Hiramatsu
(2015/03/04 22:52), Namhyung Kim wrote: It currently prevents adding probes in weak symbols. But there're cases that given name is an only weak symbol so that we cannot add probe. $ perf probe -x /usr/lib/libc.so.6 -a calloc Failed to find symbol calloc in /usr/lib/libc-2.21.so

[PATCH 2/2] f2fs: reduce searching region of segmap when set free section

2015-03-05 Thread Wanpeng Li
In __set_free we will check whether all segment are free in one section when free one segment, in order to set section to free status. But the searching region of segmap is from start segno to last segno of main area, it's not necessary. So let's just only check all segment bitmap of target

[PATCH 1/2] f2fs: fix extent cache memory leak

2015-03-05 Thread Wanpeng Li
extent tree/node slab cache is created during f2fs insmod, how, it isn't destroyed during f2fs rmmod, this patch fix it by destroy extent tree/node slab cache once rmmod f2fs. Signed-off-by: Wanpeng Li wanpeng...@linux.intel.com --- fs/f2fs/super.c | 1 + 1 file changed, 1 insertion(+) diff

Re: parent/child hierarchy for regulator

2015-03-05 Thread Peter Chen
On Thu, Mar 05, 2015 at 12:22:34PM +, Mark Brown wrote: On Thu, Mar 05, 2015 at 06:35:36PM +0800, Peter Chen wrote: Any good ways at code/dts to show parent/child hierarchy for regulator? There's plenty of examples in mainline... Thanks, I get answer for adding parent regulator for

Re: [RFC 00/16] Introduce ZONE_CMA

2015-03-05 Thread Joonsoo Kim
On Thu, Mar 05, 2015 at 06:48:50PM +0100, Vlastimil Babka wrote: On 03/05/2015 05:53 PM, Vlastimil Babka wrote: On 02/12/2015 08:32 AM, Joonsoo Kim wrote: 1) Break non-overlapped zone assumption CMA regions could be spread to all memory range, so, to keep all of them into one zone,

[PATCH] crypto: RNGs must return 0 in success case

2015-03-05 Thread Stephan Mueller
Change the RNGs to always return 0 in success case. This patch ensures that seqiv.c works with RNGs other than krng. seqiv expects that any return code other than 0 is an error. Without the patch, rfc4106(gcm(aes)) will not work when using a DRBG or an ANSI X9.31 RNG. Signed-off-by: Stephan

Re: [PATCH v2 6/6] x86, asm: Rename INIT_TSS_IST to TSS_IST

2015-03-05 Thread Ingo Molnar
* Andy Lutomirski l...@amacapital.net wrote: This has nothing to do with the init thread or the initial anything. It's just the TSS. Signed-off-by: Andy Lutomirski l...@amacapital.net --- arch/x86/kernel/entry_64.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff

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