It's often useful to be able to use a stacktrace as a hash key, for
keeping a count of the number of times a particular call path resulted
in a trace event, for instance. Add a special key named 'stacktrace'
which can be used as key in a 'keys=' param for this purpose:
# echo
Allow users to have syscall id fields displayed as syscall names in
the output by appending '.syscall' to field names:
# echo hist:keys=aaa.syscall ... \
[ if filter] event/trigger
Signed-off-by: Tom Zanussi tom.zanu...@linux.intel.com
---
kernel/trace/trace.c | 1
If we assume the maximum size for a string field, we don't have to
worry about its position. Since we only allow two keys in a compound
key and having more than one string key in a given compound key
doesn't make much sense anyway, trading a bit of extra space instead
of introducing an arbitrary
On Wed, 15 Jul 2015, David Daney wrote:
From: David Daney david.da...@cavium.com
The subject pretty much says it all. The first four patches tweak the
infrastructure a little so that we can get required behavior. The
Just that you avoid to describe what the required behaviour is.
Can you
Allow users to specify multiple trace event fields to use in keys by
allowing multiple fields in the 'keys=' keyword. With this addition,
any unique combination of any of the fields named in the 'keys'
keyword will result in a new entry being added to the hash table.
Signed-off-by: Tom Zanussi
Allow users to append 'clear' to an existing trigger in order to have
the hash table cleared.
This expands the hist trigger syntax from this:
# echo hist:keys=xxx:vals=yyy:sort=zzz.descending:pause/cont \
[ if filter] event/trigger
to this:
# echo
Allow users to append 'pause' or 'continue' to an existing trigger in
order to have it paused or to have a paused trace continue.
This expands the hist trigger syntax from this:
# echo hist:keys=xxx:vals=yyy:sort=zzz.descending \
[ if filter] event/trigger
to this:
# echo
Allow users to specify trace event fields to use in aggregated sums
via a new 'vals=' keyword. Before this addition, the only aggregated
sum supported was the implied value 'hitcount'. With this addition,
'hitcount' is also supported as an explicit value field, as is any
numeric trace event
Add a utility function to grab the syscall name from the syscall
metadata, given a syscall id.
Signed-off-by: Tom Zanussi tom.zanu...@linux.intel.com
---
kernel/trace/trace.h | 5 +
kernel/trace/trace_syscalls.c | 11 +++
2 files changed, 16 insertions(+)
diff --git
Add tracing_map, a special-purpose lock-free map for tracing.
tracing_map is designed to aggregate or 'sum' one or more values
associated with a specific object of type tracing_map_elt, which
is associated by the map to a given key.
It provides various hooks allowing per-tracer customization and
Hi Linus,
A collection of fixes from the last few weeks that should go into the
current series. This pull request contains:
- Various fixes for the per-blkcg policy data, fixing regressions since
4.1 From Arianna and Tejun.
- Code cleanup for bcache closure macros from me. Really just
Add a simple per-trigger 'paused' flag, allowing individual triggers
to pause. We could leave it to individual triggers that need this
functionality to do it themselves, but we also want to allow other
events to control pausing, so add it to the trigger data.
Signed-off-by: Tom Zanussi
Some triggers may need access to the trace event, so pass it in. Also
fix up the existing trigger funcs and their callers.
Signed-off-by: Tom Zanussi tom.zanu...@linux.intel.com
---
include/linux/trace_events.h| 7 ---
kernel/trace/trace.h| 6 --
Make is_string_field() and is_function_field() accessible outside of
trace_event_filters.c for other users of ftrace_event_fields.
Signed-off-by: Tom Zanussi tom.zanu...@linux.intel.com
---
kernel/trace/trace.h | 12
kernel/trace/trace_events_filter.c | 12
On 16/07/15 18:14, David Daney wrote:
On 07/16/2015 10:09 AM, Marc Zyngier wrote:
On 16/07/15 17:50, David Daney wrote:
[...]
Patch 5 has established that you're using virtual wire SPIs, so we
need to work on exposing that with the normal kernel abstraction, and
not by messing with the
Currently there is an incoherent mess of atomic_{set,clear}_mask() and
atomic_or() (but no atomic_{and,nand,xor}()) in the tree.
Those archs that implement atomic_{set,clear}_mask() are not even consistent on
its signature.
Implement atomic_{or,and,xor}() on all archs and deprecate
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/ia64/include/asm/atomic.h | 26 ++
1 file changed, 22
On Thu, Jul 16, 2015 at 08:13:38PM +0300, Konstantin Khlebnikov wrote:
Rw-sem have special non-owner mode for keeping lockdep away.
Nooo, no new ones of those please!!
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/x86/include/asm/atomic.h | 35 ++-
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/avr32/include/asm/atomic.h | 14 ++
1 file changed, 14 insertions(+)
Implement atomic logic ops -- atomic_{or,xor,and}
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Also rework the atomic implementation in terms of CPP macros to avoid
the typical repetition -- I seem to have missed this arch the last
time around when I
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
TODO: use inline asm or at least asm macros to collapse the lot.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
change from previous patchset
- separate patch to remove unnecessary tracing kallsyms.h and module.h usage
The following changes since commit 6593e2dcdedd0493e1b1fcb419609d2101c4d0be:
Add linux-next specific files for 20150716 (2015-07-16 16:23:42 +1000)
are available in the git repository
kallsyms.h was included by ftrace.h for KSYM_NAME_LEN, but that usage
was removed by commit 3f5ec13696f [tracing/fastboot: move boot tracer
structs and funcs into their own header].
Remove kallsyms.h and have users relying on ftrace.h to include it for
them include it explicitly.
Signed-off-by:
kallsyms.h now includes module.h, so remove module.h includes that
were apparently there only to satisfy kallsyms use of MODULE_NAME_LEN
(via KSYM_SYMBOL_LEN).
Signed-off-by: Tom Zanussi tom.zanu...@linux.intel.com
---
lib/vsprintf.c | 1 -
1 file changed, 1 deletion(-)
diff --git
At some point, these files made use of something from kallsyms.h
and/or module.h, but they now use nothing from either and can be
removed.
Signed-off-by: Tom Zanussi tom.zanu...@linux.intel.com
---
kernel/trace/trace.c | 1 -
kernel/trace/trace_branch.c | 2 --
kallsyms.h now includes module.h, so remove module.h includes that
were apparently there only to satisfy kallsyms use of MODULE_NAME_LEN
(via KSYM_SYMBOL_LEN).
Signed-off-by: Tom Zanussi tom.zanu...@linux.intel.com
Acked-by: David Rientjes rient...@google.com
---
mm/slub.c | 1 -
1 file changed,
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/alpha/include/asm/atomic.h | 43 ++--
1 file
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Acked-by: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
kallsyms.h now includes module.h, so remove module.h includes that
were apparently there only to satisfy kallsyms use of MODULE_NAME_LEN
(via KSYM_SYMBOL_LEN).
Signed-off-by: Tom Zanussi tom.zanu...@linux.intel.com
---
drivers/scsi/fnic/fnic_trace.c | 1 -
1 file changed, 1 deletion(-)
diff
kallsyms.h now includes module.h, so remove module.h includes that
were apparently there only to satisfy kallsyms use of MODULE_NAME_LEN
(via KSYM_SYMBOL_LEN).
Signed-off-by: Tom Zanussi tom.zanu...@linux.intel.com
---
kernel/trace/trace_output.c | 1 -
kernel/trace/trace_syscalls.c | 1 -
2
On 7/16/15 9:46 AM, Nicolas Schichan wrote:
This serie fixes issues with the ARM BPF JIT and adds support for more
instructions to the ARM BPF JIT.
The first three patches are fixing bugs in the ARM JIT and should
probably find their way to a stable kernel.
The last three patches add support
On 07/16, Jan Kara wrote:
On Wed 15-07-15 20:19:20, Oleg Nesterov wrote:
Perhaps it makes to merge other 2 patches from Dave first? (those which
change __sb_start/end_write to rely on RCU). Afaics these changes are
straightforward and correct. Although I'd suggest to use
On 07/16/2015 05:04 AM, Sekhar Nori wrote:
On Tuesday 14 July 2015 07:31 PM, Linus Walleij wrote:
On Thu, Jun 18, 2015 at 7:10 PM, Vitaly Andrianov vita...@ti.com wrote:
Interrupts for GPIOs 16 through 31 are enabled by bit 1 in the
binten register (offset 8). Previous versions of GPIO only
On Thu, Jul 09, 2015 at 10:19:53PM +0900, Krzysztof Kozlowski wrote:
Value returned by devm_ioremap_resource() was checked for non-NULL but
devm_ioremap_resource() returns IOMEM_ERR_PTR, not NULL. In case of
error this could lead to dereference of ERR_PTR.
Signed-off-by: Krzysztof Kozlowski
Replace the deprecated atomic_{set,clear}_mask() usage with the now
ubiquous atomic_{or,andnot}() functions.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/blackfin/mach-common/smp.c |2 -
arch/m32r/kernel/smp.c |4 +-
arch/mn10300/mm/tlb-smp.c |2
Add a few atomic_t tests, gets some compile coverage for the new
operations.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
lib/atomic64_test.c | 69
1 file changed, 48 insertions(+), 21 deletions(-)
---
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Acked-by: Vineet Gupta vgu...@synopsys.com
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/arc/include/asm/atomic.h | 19
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/parisc/include/asm/atomic.h |9 +
1 file changed, 9 insertions(+)
---
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/m32r/include/asm/atomic.h | 44 +
1 file
Clean up the #ifdef guards a bit to prepare for architectures to
supply their own logic ops.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
include/asm-generic/atomic.h | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
--- a/include/asm-generic/atomic.h
+++
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/xtensa/include/asm/atomic.h | 85 +++
1 file
On Tue, Jul 14, 2015 at 07:59:47PM +0200, David Herrmann wrote:
Hi
On Fri, Jul 10, 2015 at 2:32 AM, Peter Hutterer
peter.hutte...@who-t.net wrote:
All Elantech touchpads pre-v4 with dynamic resolution queries have a fixed
resolution of 800dpi - 31.49 units/mm. Set this statically, so
Allow a trace events header file to disable compilation of its
trace events by defining the preprocessor macro NOTRACE.
This could be done, for example, according to a Kconfig option.
Signed-off-by: Tal Shorer tal.sho...@gmail.com
---
include/linux/tracepoint.h | 17 ++---
Currently, enabling CONFIG_TRACING on a system comes as all-or-nothing: either
tracepoints for all subsystems are compiled (with CONFIG_TRACING) or none of
them do (without it).
This caused me an unacceptable performance penalty (obviously SOME penalty was
expected, but not one so severe) which
the discussion on the generic cpu seems to be stuck, is there a possibility to
take this patch. so that Thunder has a chance to run some KVM.
Thanks,
Tirumalesh.
On Jun 29, 2015, at 10:11 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 29/06/15 18:06, Chalamarla, Tirumalesh wrote:
On
Add a new options to gpio Kconfig, CONFIG_GPIO_TRACING, that is used
for enabling/disabling compilation of gpio function trace events.
Signed-off-by: Tal Shorer tal.sho...@gmail.com
---
drivers/gpio/Kconfig| 7 +++
include/trace/events/gpio.h | 4
2 files changed, 11
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/alpha/include/asm/atomic.h|1 -
arch/arc/include/asm/atomic.h |
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Acked-by: David S. Miller da...@davemloft.net
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/sparc/include/asm/atomic_32.h |4
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/arm/include/asm/atomic.h | 15 +++
1 file changed, 15 insertions(+)
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/arm64/include/asm/atomic.h | 15 +++
1 file changed, 15 insertions(+)
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/sh/include/asm/atomic-grb.h | 45 +-
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/metag/include/asm/atomic_lnkget.h | 38 -
On Thursday, July 16, 2015 at 05:27:51 PM, Cyrille Pitchen wrote:
Hi!
Both the SPI controller and the NOR flash memory need to agree on the
number of dummy cycles to use for Fast Read commands. For Spansion
memories, this number of dummy cycles is not given directly but through a
so called
Move the now generic definitions of atomic_{set,clear}_mask() into
linux/atomic.h to avoid endless and pointless repetition.
Also, provide an atomic_andnot() wrapper for those few archs that can
implement that.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
From: Chris Metcalf cmetc...@ezchip.com
Implement atomic logic ops -- atomic_{or,xor,and}.
For tilegx, these are relatively straightforward; the architecture
provides atomic or and and, both 32-bit and 64-bit. To support
xor we provide a loop using cmpexch.
For the older 32-bit tilepro
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Acked-by: Heiko Carstens heiko.carst...@de.ibm.com
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/s390/include/asm/atomic.h | 47
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Acked-by: Ralf Baechle r...@linux-mips.org
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/mips/include/asm/atomic.h |9 +
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/mn10300/include/asm/atomic.h | 57 ++
1 file
Mostly complete rewrite of the FRV atomic implementation, instead of
using assembly files, use inline assembler.
The out-of-line CONFIG option makes a bit of a mess of things, but a
little CPP trickery gets that done too.
FRV already had the atomic logic ops but under a non standard name,
the
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Acked-by: Geert Uytterhoeven ge...@linux-m68k.org
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/m68k/include/asm/atomic.h | 14
Implement atomic logic ops -- atomic_{or,xor,and}.
These will replace the atomic_{set,clear}_mask functions that are
available on some archs.
Signed-off-by: Peter Zijlstra (Intel) pet...@infradead.org
---
arch/hexagon/include/asm/atomic.h |6 ++
1 file changed, 6 insertions(+)
---
On Wed, Jul 08, 2015 at 05:19:13PM +0100, Marc Zyngier wrote:
With the ARMv8.1 VHE, the architecture is able to (almost) transparently
run the kernel at EL2, despite being written for EL1.
This patch takes care of the almost part, mostly preventing the kernel
from dropping from EL2 to EL1,
On Thu, Jul 16, 2015 at 12:22:40PM -0500, Tom Zanussi wrote:
+ for (i = 0; i elt-map-n_fields; i++) {
+ atomic64_set(dup_elt-fields[i].sum,
+ atomic64_read(elt-fields[i].sum));
+ dup_elt-fields[i].cmp_fn = elt-fields[i].cmp_fn;
+ }
+
On Thu, Jul 16, 2015 at 08:13:38PM +0300, Konstantin Khlebnikov wrote:
@@ -1187,14 +1195,14 @@ void __init page_alloc_init_late(void)
{pgdat_init_rwsempgdat_init_rwsempgdat_init_rwsem
int nid;
+ /* There will be num_node_state(N_MEMORY) threads */
+
88PM860 falls under 88pm800 family of devices, with some feature
additions, for example, support for dual phase on BUCK1.
This patch series, enabled chip ID support for 88pm860 in the driver
and adds Init time configuration support based on chip ID
V2 = V3
===
Link to V2:
Add chip identification support for 88PM860 device
to the pm80x_chip_mapping table.
Signed-off-by: Vaibhav Hiremath vaibhav.hirem...@linaro.org
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/mfd/88pm80x.c | 2 ++
include/linux/mfd/88pm80x.h | 1 +
2 files changed, 3
This patch adds init time configuration of 88PM800/805 and
88PM860. It includes,
- Enable BUCK clock gating in low power mode
- Full mode support for BUCK2 and 4
- Enable voltage change (LPF, DVC) in PMIC
Note that both 88PM800 and 88PM860 do share common configurations,
but since I can
Commit 68234df4ea79 (arm64: kill flush_cache_all()) removed
soft_reset() from the kernel. This was the only caller of
setup_mm_for_reboot(), so remove that also.
Signed-off-by: Mark Salter msal...@redhat.com
---
arch/arm64/include/asm/mmu.h | 1 -
arch/arm64/mm/mmu.c | 11 ---
The current code returns from probe without waiting for the proper handling
of subchannels that may be requested. If the netvsc driver were to be rapidly
loaded/unloaded, we can trigger a panic as the unload will be tearing
down state that may not have been fully setup yet. We fix this issue by
Hi Peter,
On Mon, 2015-07-13 at 23:08 +0200, Peter Hüwe wrote:
Hi Vicky,
sorry for the late reply
This patch makes the code endianness independent. We defined a
macro do_endian_conversion to apply endianness to raw integers
in the event entries so that they will be displayed
On Fri, 2015-07-17 at 00:20 +, Craig Inches wrote:
Hi Joe,
Rehi Craig.
On Thu, Jul 16, 2015 at 08:30:53AM -0700, Joe Perches wrote:
On Thu, 2015-07-16 at 23:11 +, Craig Inches wrote:
Fixed up some checkpatch.pl style issues.
Line greater than 80 Chars in multiple locations.
update TODO list to provide more detail on remaining work
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
drivers/staging/fsl-mc/TODO | 24 +++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/fsl-mc/TODO b/drivers/staging/fsl-mc/TODO
On Wed, Jul 08, 2015 at 05:19:14PM +0100, Marc Zyngier wrote:
Having both VHE and non-VHE capable CPUs in the same system
is likely to be a recipe for disaster.
If the boot CPU has VHE, but a secondary is not, we won't be
able to downgrade and run the kernel at EL1. Add CPU hotplug
to the
On Thu, 2015-07-16 at 20:03 +0200, Peter Zijlstra wrote:
On Thu, Jul 16, 2015 at 12:22:40PM -0500, Tom Zanussi wrote:
+ map-map = kcalloc(map-map_size, sizeof(struct tracing_map_entry),
+ GFP_KERNEL);
In a later email you state the max map size to be 128k, with a 16
On Thu, 16 Jul 2015 09:19:49 +0200 Michal Hocko mho...@kernel.org wrote:
On Wed 15-07-15 13:57:11, Andrew Morton wrote:
On Wed, 15 Jul 2015 13:14:41 +0200 Michal Hocko mho...@kernel.org wrote:
mem_cgroup structure is defined in mm/memcontrol.c currently which
means that the code
On Thu, Jul 16, 2015 at 11:46:57PM +0530, Vaibhav Hiremath wrote:
88PM860 falls under 88pm800 family of devices, with
additional feature enhancements, like,
- 88pm860 had additional BUCK regulator (BUCK6 and BUCK1B)
- Additional LDO (LDO20)
- different voltage and current capability
On Thursday, July 16, 2015 10:16:14 AM Jon Medhurst wrote:
On Thu, 2015-07-16 at 02:32 +0200, Rafael J. Wysocki wrote:
On Wednesday, July 08, 2015 04:50:23 PM Viresh Kumar wrote:
On 08-07-15, 12:17, Jon Medhurst (Tixy) wrote:
I tried these patches without the earlier cpufreq: Initialize
On Thu, Jul 16, 2015 at 3:42 PM, H. Peter Anvin h...@zytor.com wrote:
On 07/16/2015 12:14 PM, Dave Hansen wrote:
The FPU rewrite removed the dynamic allocations of 'struct fpu'.
But, this potentially wastes massive amounts of memory (2k per
task on systems that do not have AVX-512 for
On Wed, Jul 08, 2015 at 05:19:06PM +0100, Marc Zyngier wrote:
Add a new ARM64_HAS_VIRT_HOST_EXTN features to indicate that the
CPU has the ARMv8,1 VHE capability.
This will be used to trigger kernel patching in KVM.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
Acked-by: Will Deacon
Notes about recent changes.
Signed-off-by: Konstantin Khlebnikov khlebni...@yandex-team.ru
---
Documentation/vm/pagemap.txt | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/vm/pagemap.txt b/Documentation/vm/pagemap.txt
index
From: Boris Brezillon boris.brezil...@free-electrons.com
drm_vblank_on() now warns on nested use or if vblank is not properly
initialized. This patch fixes Atmel HLCDC vblank initial state.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Reported-by: Sylvain Rochet
On 07/09/2015 10:24 AM, Nicholas Krause wrote:
This removes the no longer required comment for the function
send_mad_adapter_info stating that it always return zero due
to this function being declared as void and thus never returning
any useful value.
Signed-off-by: Nicholas Krause
On Wed, 15 Jul 2015, Paul E. McKenney wrote:
On Tue, Jul 14, 2015 at 04:48:24PM -0700, David Rientjes wrote:
On Tue, 14 Jul 2015, Paul E. McKenney wrote:
commit a1992f2f3b8e174d740a8f764d0d51344bed2eed
Author: Paul E. McKenney paul...@linux.vnet.ibm.com
Date: Tue Jul 14 16:24:14
Hi Sato-san,
On Thu, Jul 16, 2015 at 7:15 AM, Yoshinori Sato
ys...@users.sourceforge.jp wrote:
Current implemantation ptr argument evaluate 2 times.
It'll be an unexpected result.
Signed-off-by: Yoshinori Sato ys...@users.sourceforge.jp
Acked-by: Geert Uytterhoeven ge...@linux-m68k.org
---
I have to say, I am a bit leery about applying the omap_device.c and
omap_hwmod.c changes, since the called functions -- omap_device_delete()
and clk_disable() -- don't explicitly document that NULLs are allowed
to be passed in.
How are the chances to improve documentation around such
On 7/14/2015 11:28 PM, Alex Thorlton wrote:
We see the same exact messages on 4.1-rc8.
does this solves the problem?
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index ad31e47..c8ae3b9 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@
The Exynos5420 based Peach Pit and Exynos5800 based Peach Pi Chromebooks
use the Maxim max77802 Power Management IC (PMIC). This PMIC has besides
other devices, a set of regulators that can be controller over I2C.
Commit f3caa529c6f5 (ARM: multi_v7_defconfig: Enable max77802 regulator,
rtc and
The Exynos5420 Peach Pit and Exynos5800 Peach Pi Chromebooks have
IIO based ADC thermistors. Enable built-in support for its driver.
Signed-off-by: Javier Martinez Canillas jav...@osg.samsung.com
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes in v2:
- Add Krzysztof
Hi all,
For those that care: I have stopped signing these messages because
vger's mailing list software destroys the signatures and then Google
(at least) assumes that they are spam. I could clear sign them instead
(if anyone thinks that is worth while).
Changes since 20150715:
Removed tree:
Hello Brian,
On Mon, 15 Jun 2015, Brian Hutchinson wrote:
Clocks 4-7 are capable of PWM output on dm816x.
This adds the pwm capability to those timers.
Cc: Paul Walmsley p...@pwsan.com
Cc: Tero Kristo t-kri...@ti.com
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Brian Hutchinson
On Wed, Jul 15, 2015 at 2:35 PM, Peter Zijlstra pet...@infradead.org wrote:
On Wed, Jul 15, 2015 at 08:42:50AM +0200, Stephane Eranian wrote:
On Fri, Jul 3, 2015 at 9:49 PM, Vince Weaver vincent.wea...@maine.edu
wrote:
On Fri, 3 Jul 2015, Peter Zijlstra wrote:
That said, its far too warm
On Wed, 15 Jul 2015, I wrote:
On Tue, 14 Jul 2015, Benjamin Herrenschmidt wrote:
Maybe we should have a dedicated accessor for mac_xpram ...
... I can see how to implement XPRAM for matroxfb and imsttfb
I'll have to retract that. The video mode and color mode settings used by
the
On 16.07.2015 14:44, Javier Martinez Canillas wrote:
Hello Krzysztof,
Thanks for the feedback.
On 07/16/2015 02:45 AM, Krzysztof Kozlowski wrote:
On 16.07.2015 01:32, Javier Martinez Canillas wrote:
The Maxim max77802 Power Management IC has besides other devices, a set of
regulators.
On 2015/07/16 11:16, Wang Long wrote:
In debugfs_kprobe_init, we create a directory 'kprobes' and three
files 'list', 'enabled' and 'blacklist'. When any one of the three
files creation fails, we should remove all of them. But debugfs_remove
function can not complete this work. So use
* Paul Walmsley p...@pwsan.com [150715 22:58]:
Hello Markus
On Tue, 30 Jun 2015, SF Markus Elfring wrote:
From: Markus Elfring elfr...@users.sourceforge.net
Date: Tue, 30 Jun 2015 14:00:16 +0200
The functions clk_disable(), of_node_put() and omap_device_delete() test
whether their
On Wed, Jul 15, 2015 at 02:13:26PM +0200, Sebastian Reichel wrote:
-static int tsc2005_write(struct tsc2005 *ts, u8 reg, u16 value)
-{
- u32 tx = ((reg | TSC2005_REG_PND0) 16) | value;
- struct spi_transfer xfer = {
- .tx_buf = tx,
- .len=
On Wed, Jul 15, 2015 at 02:48:00PM -0400, Matthew Wilcox wrote:
On Wed, Jul 15, 2015 at 11:25:55AM -0600, Jens Axboe wrote:
On 07/15/2015 11:19 AM, Keith Busch wrote:
On Wed, 15 Jul 2015, Bart Van Assche wrote:
* With blk-mq and scsi-mq optimal performance can only be achieved if
the
This patch update the Documentation/filesystems/debugfs.txt
file. The main work is to add the description of the following
functions:
debugfs_create_atomic_t
debugfs_create_u32_array
debugfs_create_devm_seqfile
debugfs_create_file_size
Signed-off-by: Wang Long
The Exynos5420 Peach Pit and Exynos5800 Peach Pi Chromebooks have
IIO based ADC thermistors. Enable module support for its driver
and also for the needed Exynos ADC driver.
Signed-off-by: Javier Martinez Canillas jav...@osg.samsung.com
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
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