This patch series adds basic support for IPQ8019 series of SoCs,
presently it just boots to prompt via serial but more functionality
will follow.
This is partially based off a previously submitted patch series from
Varada which can be found here:
https://patchwork.ozlabs.org/patch/509954/
The
Hi Michal,
Sorry this has sat so long...
On Fri, Aug 14, 2015 at 09:23:08AM -, Michal Suchanek wrote:
> The spi-nor write loop assumes that what is passed to the hardware
> driver write() is what gets written.
>
> When write() writes less than page size at once data is dropped on the
>
Am 18.11.2015 um 21:47 schrieb Richard Weinberger:
> Am 18.11.2015 um 21:44 schrieb Andrew Morton:
>> On Mon, 16 Nov 2015 19:18:21 +0100 Richard Weinberger wrote:
>>
>>> sigsuspend() is nowhere used except in signal.c itself,
>>> so we can mark it static do not pollute the global namespace.
>>>
On Thu, 19 Nov 2015 21:13:19 +0100 Michael B__sch wrote:
> The expression (~0 >> x) will always yield all-ones, because the right
> shift is an arithmetic right shift that will always shift ones in.
> Hence the old fault code bits will not be cleared before being ORed
> with the new fault code.
Hi Arnd,
On 11/19/2015 12:31 AM, Arnd Bergmann wrote:
On Wednesday 18 November 2015 17:37:16 Ray Jui wrote:
I haven't spent too much time investigating, and am hoping to eventually
enable affinity support with an incremental patch in the future when I
have more time to investigate.
Is it
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar Plus SoC
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 77 +++---
1 file changed, 64 insertions(+), 13 deletions(-)
diff --git
Changes in v2:
Rebased off of outstanding NSP DT patches and tweaked the entry names
per Ray Jui
This patch series adds device tree support for the Broadcom Northstar,
Northstar Plus, and Northstar 2 clocks.
Last sent as an RFC (see https://lkml.org/lkml/2015/10/13/882) due to
the inability to
Add device tree entries for clock support for Broadcom Northstar 2 SoC
Signed-off-by: Jon Mason
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 80 ++-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi
Add support for the TPS65912 device. It provides communication
through I2C and contains the following components:
- Regulators
- Load switches
- GPO controller
Signed-off-by: Andrew F. Davis
---
drivers/mfd/Kconfig | 13
drivers/mfd/Makefile | 1 +
On Tue, Nov 17, 2015 at 11:00:42PM +, Al Viro wrote:
> From: Al Viro
>
> kmap() in page_follow_link_light() needed to go - allowing to hold
> an arbitrary number of kmaps for long is a great way to deadlocking
> the system.
>
> new helper (inode_nohigh(inode)) needs to be used for pagecache
On Thu, Nov 19, 2015 at 04:55:44PM -0500, Boris Ostrovsky wrote:
> The first patch fixes Xen PV regression introduced by 32-bit rewrite. Unlike
> the
> earlier version it uses ALTERNATIVE instruction and avoids using xen_sysexit
> (and sysret32 in compat mode) pv ops, as suggested by Andy.
>
>
Hi Marcus,
On Fri, Nov 20, 2015 at 2:53 AM, Marcus Weseloh wrote:
> Adds support and documentation for a new slave device property
> "sun4i,spi-wdelay" that allows to set the SPI Wait Clock Register per
> device / transfer. The SPI hardware will wait the specified amount of
> SPI clock periods
Add support for the TPS65086 PMIC GPOs.
TPS65086 has four configurable GPOs that can be used for several
purposes. These are output only.
Signed-off-by: Andrew F. Davis
---
drivers/gpio/Kconfig | 6 ++
drivers/gpio/Makefile| 1 +
drivers/gpio/gpio-tps65086.c | 144
Add support for TPS65086 PMIC regulators.
The regulators set consists of 3 Step-down Controllers, 3 Step-down
Converters, 3 LDOs, 3 Load Switches, and a Sink and Source LDO. The
output voltages are configurable and are meant to supply power to a
SoC and/or other components.
Signed-off-by: Andrew
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar SoCs.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm5301x.dtsi | 92 +++--
1 file changed, 71 insertions(+), 21 deletions(-)
diff --git
> >What phy is it?
>
>Micrel KSZ8041RNLI for sh_eth, KSZ9031 for ravb.
>
> >Do you have phy DT properties in the MAC node?
>
>I have PHY subnodes (with props) in the MAC node.
O.K, so this could be the same problems as
https://lkml.org/lkml/2015/10/15/726
This series adds support for the TPS65086 PMIC. It is a MFD with an I2C
interface, several regulators and load switches, and a GPO controller.
v1 can be found here: [1] v2: [2] v3: [3]
Changes from v3:
- Removed compatible strings from DT sub-nodes
- Rearranged DT bindings
- Small fixes
The TPS65086 PMIC contains several regulators and a GPO controller.
Add bindings for the TPS65086 PMIC.
Signed-off-by: Andrew F. Davis
---
Documentation/devicetree/bindings/mfd/tps65086.txt | 55 ++
1 file changed, 55 insertions(+)
create mode 100644
On Thu, Nov 19, 2015 at 10:55:43PM +0100, Borislav Petkov wrote:
> On Thu, Nov 19, 2015 at 10:43:01PM +0100, Markus Trippelsdorf wrote:
> > It looks like the ability to update x86/microcode without using an
> > initrd was removed this merge window.
>
> Whoops, that shouldnt've happened. Will
On Thursday 19 November 2015 03:24:56 Finn Thain wrote:
> On Wed, 18 Nov 2015, Ondrej Zary wrote:
> > On Wednesday 18 November 2015, Finn Thain wrote:
> > > Like my previous work on the NCR5380 drivers, this patch series has
> > > bug fixes, code cleanup and modernization. These drivers suffer
Hi!
UML recently had an interesting bug[1] where the host side of UML
tried to call sigsuspend() but as the kernel itself offers a function
with the same name it called sigsuspend() on
the UML kernel side and funny things happened.
The root cause of the problem is that the UML links userspace
On Thu, 2015-11-19 at 13:00 +0900, Krzysztof Kozlowski wrote:
> platform_driver does not need to set an owner because
> platform_driver_register() will set it.
>
> Signed-off-by: Krzysztof Kozlowski
> Acked-by: Baptiste Reynal
>
> ---
Oops, sorry I dropped it. Since it's a fix, I'll queue it
On 11/19/2015 5:32 PM, Arnd Bergmann wrote:
> _calc_dynamic_ram_rate is defined inside an #ifdef but called
> later in the same file outside of that #ifdef, which can cause a
> build error:
>
> drivers/clk/tegra/clk-pll.c: In function '_tegra_clk_register_pll':
>
_calc_dynamic_ram_rate is defined inside an #ifdef but called
later in the same file outside of that #ifdef, which can cause a
build error:
drivers/clk/tegra/clk-pll.c: In function '_tegra_clk_register_pll':
drivers/clk/tegra/clk-pll.c:1541:29: error: '_calc_dynamic_ramp_rate'
undeclared (first
On Thu, Nov 19, 2015 at 2:18 PM, Rafael J. Wysocki wrote:
> Hi,
>
> On Thu, Nov 19, 2015 at 7:24 PM, Dmitry Torokhov
> wrote:
>> On Thu, Nov 19, 2015 at 02:26:37PM +0200, Irina Tirdea wrote:
>>> Implement suspend/resume for goodix driver.
>>>
>
> [cut]
>
>>>
>>> +static int __maybe_unused
On Thu, Nov 19, 2015 at 10:09:03AM +0100, Thomas Gleixner wrote:
> On Wed, 18 Nov 2015, Marcelo Tosatti wrote
> > Actually, there is a point that is useful: you might want the important
> > application to share the L3 portion with HW (that HW DMAs into), and
> > have only the application and the
Hi,
On Thu, Nov 19, 2015 at 7:24 PM, Dmitry Torokhov
wrote:
> On Thu, Nov 19, 2015 at 02:26:37PM +0200, Irina Tirdea wrote:
>> Implement suspend/resume for goodix driver.
>>
[cut]
>>
>> +static int __maybe_unused goodix_suspend(struct device *dev)
>> +{
>> + struct i2c_client *client =
'perf test topo' is broken on my x86_64 system, with a rather cryptic message.
$ ./perf test -v topo
36: Test topology in session :
--- start ---
test child forked, pid 2705
templ file: /tmp/perf-test-6rSAkb
core_id
This patch introduces the multi-buffer job manager which is responsible
for submitting scatter-gather buffers from several AES CBC jobs
to the multi-buffer algorithm. The glue code interfaces with the
underlying algorithm that handles 8 data streams of AES CBC encryption
in parallel. AES key
This patch implements in-order scheduler for encrypting multiple buffers
in parallel supporting AES CBC encryption with key sizes of
128, 192 and 256 bits. It uses 8 data lanes by taking advantage of the
SIMD instructions with XMM registers.
The multibuffer manager and scheduler is mostly
This patch introduces the assembly routine to do a by8 AES CBC encryption
in support of the AES CBC multi-buffer implementation.
Encryption of 8 data streams of a key size are done simultaneously.
Originally-by: Chandramouli Narayanan
Signed-off-by: Tim Chen
---
This patch introduces the data structures and prototypes of functions
needed for doing AES CBC encryption using multi-buffer. Included are
the structures of the multi-buffer AES CBC job, job scheduler in C and
data structure defines in x86 assembly code.
Originally-by: Chandramouli Narayanan
In this patch, the infrastructure needed to support multibuffer
encryption implementation is added:
a) Enhace mcryptd daemon to support blkcipher requests.
b) Update configuration to include multi-buffer encryption build support.
For an introduction to the multi-buffer implementation, please
In this patch series, we introduce AES CBC encryption that is parallelized
on x86_64 cpu with XMM registers. The multi-buffer technique encrypt 8
data streams in parallel with SIMD instructions. Decryption is handled
as in the existing AESNI Intel CBC implementation which can already
parallelize
Hello,
On Thu, Nov 19, 2015 at 10:56:43PM +0100, Ilya Dryomov wrote:
> Detaching the inode earlier is what I suggested in the first email, but
> I didn't know if this kind of special casing was OK. I'll try it out.
Yeah, I was confused. Sorry about that. On the surface, it looks
like a
On Wed, 18 Nov 2015 16:46:02 +0200, Kalle Valo wrote:
> Part of reorganising wireless drivers directory and Kconfig.
>
> Signed-off-by: Kalle Valo
For Ralink you could probably drop the rt2x00 directory. RaLink Tech.
doesn't exist any more and rt2x00 contains drivers for all of their
devices.
drivers/block/null_blk.c:850:2-20: WARNING: NULL check before freeing functions
like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb is not
needed. Maybe consider reorganizing relevant code to avoid passing NULL values.
NULL check before some freeing functions is not needed.
This adds support for the Sigma Designs SMP86xx/SMP87xx family built-in
watchdog.
Signed-off-by: Mans Rullgard
---
Changes:
- #include bitops.h
- clk_disable_unprepare() on failure
---
drivers/watchdog/Kconfig | 10 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/tangox_wdt.c |
Replaced constant clock_{enable,disable} calls with pm_runtime
hooks for suspend and resume to avoid constant clk_enable /
clk_disable.
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
Changes:
v1:
- Removed superfluous #ifdef CONFIG_PM as suggested by Michal
- Changed commit message
On Thu, Nov 19, 2015 at 1:55 PM, Boris Ostrovsky
wrote:
> The first patch fixes Xen PV regression introduced by 32-bit rewrite. Unlike
> the
> earlier version it uses ALTERNATIVE instruction and avoids using xen_sysexit
> (and sysret32 in compat mode) pv ops, as suggested by Andy.
>
> As result
The hpsa driver recently started using the sas transport class, but it
does not ensure that the corresponding code is actually built, which
may lead to a link error:
drivers/built-in.o: In function `hpsa_free_sas_phy':
(.text+0x1ce874): undefined reference to `sas_port_delete_phy'
Hi Sudeep,
On 10/27/2015 8:09 AM, Sudeep Holla wrote:
> Hi Prashanth,
>
> On 27/10/15 00:21, Prakash, Prashanth wrote:
>> Hi Sudeep,
>>
>> While testing with these patches everything looked fine except that we
>> are flattening all the LPI
>> states even if it is disabled. I added a simple check
On Thu, Nov 19, 2015 at 12:11:11PM -0800, Kees Cook wrote:
> On Tue, Nov 10, 2015 at 7:08 AM, Jan Kara wrote:
> > On Sat 07-11-15 21:02:06, Ted Tso wrote:
> >> On Fri, Nov 06, 2015 at 09:05:57PM -0800, Kees Cook wrote:
> >> > They're certainly not used early enough -- we need to remove suid
On Nov 19, 2015 5:45 AM, "Michael S. Tsirkin" wrote:
>
> On Tue, Oct 27, 2015 at 11:38:57PM -0700, Andy Lutomirski wrote:
> > This switches virtio to use the DMA API unconditionally. I'm sure
> > it breaks things, but it seems to work on x86 using virtio-pci, with
> > and without Xen, and using
On Nov 19, 2015 12:11 PM, "Kees Cook" wrote:
>
> On Tue, Nov 10, 2015 at 7:08 AM, Jan Kara wrote:
> > On Sat 07-11-15 21:02:06, Ted Tso wrote:
> >> On Fri, Nov 06, 2015 at 09:05:57PM -0800, Kees Cook wrote:
> >> > They're certainly not used early enough -- we need to remove suid
> >> >
As result of commit "x86/xen: Avoid fast syscall path for Xen PV guests"
irq_enable_sysexit pv op is not called by Xen PV guests anymore and since
they were the only ones who used it we can safely remove it.
Signed-off-by: Boris Ostrovsky
---
arch/x86/entry/entry_32.S | 8 ++--
After 32-bit syscall rewrite, and specifically after commit 5f310f739b4c
("x86/entry/32: Re-implement SYSENTER using the new C path"), the stack
frame that is passed to xen_sysexit is no longer a "standard" one (i.e.
it's not pt_regs).
Since we end up calling xen_iret from xen_sysexit we don't
On Thu, Nov 19, 2015 at 10:18 PM, Tejun Heo wrote:
> Hello, Ilya.
>
> On Thu, Nov 19, 2015 at 09:56:21PM +0100, Ilya Dryomov wrote:
>> > Yes, that's where *I* think we should be headed. Stuff in lower
>> > layers should stick around while upper layer things are around
>>
>> I think the
The first patch fixes Xen PV regression introduced by 32-bit rewrite. Unlike the
earlier version it uses ALTERNATIVE instruction and avoids using xen_sysexit
(and sysret32 in compat mode) pv ops, as suggested by Andy.
As result of this patch irq_enable_sysexit and usergs_sysret32 pv ops are not
As result of commit "x86/xen: Avoid fast syscall path for Xen PV guests"
usergs_sysret32 pv op is not called by Xen PV guests anymore and
since they were the only ones who used it we can safely remove it.
Signed-off-by: Boris Ostrovsky
---
arch/x86/entry/entry_64_compat.S | 10 ++
On Thu, Nov 19, 2015 at 10:43:01PM +0100, Markus Trippelsdorf wrote:
> It looks like the ability to update x86/microcode without using an
> initrd was removed this merge window.
Whoops, that shouldnt've happened. Will debug it tomorrow and provide a
fix.
Thanks for letting me know.
--
Hi Maxime,
Hi Chen-Yu,
Am Dienstag, den 17.11.2015, 02:42 +0100 schrieb Timo Sigurdsson:
> Commit 3d0b16a66c8a ("nvmem: sunxi: Move the SID driver to the nvmem
> framework") moved the the sunxi SID driver to a new framework, but left
> sunxi_defconfig with the deprecated config symbol
Hi Lin,
Am Donnerstag, 19. November 2015, 18:21:10 schrieb Lin Huang:
> support rk3399 dmc clock driver. Note, ddr set rate function will
> use dcf controller which run in ATF, it need to fishish it when rk3399
> arm trust firmware ready.
this unfinalized state is slightly unfortunate and I
It looks like the ability to update x86/microcode without using an
initrd was removed this merge window.
Why?
I've used "echo -n 1 >| /sys/devices/system/cpu/microcode/reload" in my
init script for years without any issues.
--
Markus
--
To unsubscribe from this list: send the line "unsubscribe
On Thursday, November 19, 2015 10:08:43 AM Andrzej Hajda wrote:
> On 11/18/2015 03:17 AM, Rafael J. Wysocki wrote:
> > On Tuesday, November 17, 2015 01:44:59 PM Andrzej Hajda wrote:
> >> Hi Rafael,
> >>
[cut]
> > So the operations that need to be taken care of are:
> > - Probe (suppliers need to
Commit 3d0b16a66c8a ("nvmem: sunxi: Move the SID driver to the nvmem
framework") moved the the sunxi SID driver to a new framework, but left
multi_v7_defconfig with the deprecated config symbol EEPROM_SUNXI_SID
instead of the new symbol NVMEM_SUNXI_SID. Hence, re-enable the driver
in
On Thu, 19 Nov 2015, Ioan-Adrian Ratiu wrote:
> But please understand further my reasoning for submitting this patch.
> Consider if this is a bug in the wacom driver or in the usbhid core? IMO
> this is a usbhid bug: the critical region in hid_ctrl() is too big,
> there is no reason for the
The otgphy clocks really only drive the phy blocks. These in turn
contain plls that then generate the 480m clocks the clock controller
uses to supply some other clocks like uart0, gpu or the video-codec.
So fix this structure to actually respect that hirarchy and removed
that usb480m fixed-rate
Hello.
On 11/20/2015 12:06 AM, Andrew Lunn wrote:
From: David Daney
commit 18ee49ddb0d2 ("phylib: rename mii_bus::dev to mii_bus::parent")
changed the parent of PHY devices from the bus to the bus parent.
Then, commit 4dea547fef1b ("phylib: rework to prepare for OF
registration of PHYs")
This unclutters the loop in probe a lot and makes current (and future)
error handling easier to read.
Signed-off-by: Heiko Stuebner
Reviewed-by: Douglas Anderson
---
drivers/phy/phy-rockchip-usb.c | 83 ++
1 file changed, 43 insertions(+), 40
This patch addresses two related memory management issues in the probe
function:
1. for_each_available_child_of_node performs an of_node_get on each
iteration, so a break out of the loop requires an of_node_put.
A simplified version of the semantic patch that fixes this problem is as
follows
The USB phys on Rockchip SoCs contain their own internal PLLs to create
the 480MHz needed. Additionally this PLL output is also fed back into the
core clock-controller as possible source for clocks like the GPU or others.
Until now this was modelled incorrectly with a "virtual" factor clock in
Most newer Rockchip SoCs provide the possibility to use a usb-phy
as passthrough for the debug uart (uart2), making it possible to
for example get console output without needing to open the device.
This patch adds an early_initcall to enable this functionality
conditionally via the commandline
Add the #clock-cells properties for the usbphy nodes as they
provide the pll-clocks now.
Signed-off-by: Heiko Stuebner
Reviewed-by: Douglas Anderson
---
arch/arm/boot/dts/rk3066a.dtsi | 2 ++
arch/arm/boot/dts/rk3188.dtsi | 2 ++
arch/arm/boot/dts/rk3288.dtsi | 3 +++
3 files changed, 7
changes in v3:
- rebase on top of Julias of_node_put fix
- address comments from Kishon Vijay Abraham
- position of the devm_action in the first patch
- separate compatible-addition into separate patch
- don't rephrase comment when moving stuff around
- address Doug's comment and keep
We need custom handling for these two socs in the driver shortly,
so add the necessary compatible values to binding and driver.
Signed-off-by: Heiko Stuebner
---
Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt | 5 -
drivers/phy/phy-rockchip-usb.c | 2
Currently the phy driver only gets the optional clock reference but
never puts it again, neither during error handling nor on remove.
Fix that by moving the clk_put to a devm-action that gets called at
the right time when all other devm actions are done.
Signed-off-by: Heiko Stuebner
In general it is wise to clear interrupts before processing them. If
you don't do that, you can get:
1. Interrupt happens
2. You look at system state and process interrupt
3. A new interrupt happens
4. You clear interrupt without processing it.
This patch was actually a first attempt to fix
If you've got your interrupt signals bouncing a bit as you insert your
USB device, you might end up in a state when the device is connected but
the driver doesn't know it.
Specifically, the observed order is:
1. hardware sees connect
2. hardware sees disconnect
3. hardware sees connect
4.
This introduces a common struct that holds data belonging to
the umbrella device that contains all the phys and that we
want to use later.
Signed-off-by: Heiko Stuebner
---
drivers/phy/phy-rockchip-usb.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff
On Thu, Nov 19, 2015 at 10:34:09PM +0300, Dan Carpenter wrote:
> It should be >= ARRAY_SIZE() instead of > ARRAY_SIZE().
>
> Fixes: 6231da675578 ('rcu: Print symbolic name for ->gp_state')
> Signed-off-by: Dan Carpenter
Good catch! I folded this into the original commit with attribution,
Hello, Ilya.
On Thu, Nov 19, 2015 at 09:56:21PM +0100, Ilya Dryomov wrote:
> > Yes, that's where *I* think we should be headed. Stuff in lower
> > layers should stick around while upper layer things are around
>
> I think the fundamental problem is the embedding of bdi in the queue.
> The
Hi Geert,
On Thursday 19 November 2015 21:39:50 Geert Uytterhoeven wrote:
> On Thu, Nov 19, 2015 at 9:27 PM, Laurent Pinchart wrote:
> > On Thursday 19 November 2015 22:19:14 Laurent Pinchart wrote:
> >> On Thursday 19 November 2015 19:38:40 Geert Uytterhoeven wrote:
> >> > Amend the DT bindings
Hi Geert,
On Thursday 19 November 2015 21:44:27 Geert Uytterhoeven wrote:
> On Thu, Nov 19, 2015 at 9:26 PM, Laurent Pinchart wrote:
> > On Thursday 19 November 2015 19:38:41 Geert Uytterhoeven wrote:
> >> Amend the DT bindings to include the optional clock sources for the Baud
> >> Rate
Antti,
On Thu, Nov 19, 2015 at 1:09 PM, Antti Seppälä wrote:
> On 19 November 2015 at 21:45, Douglas Anderson wrote:
>> In general it is wise to clear interrupts before processing them. If
>> you don't do that, you can get:
>> 1. Interrupt happens
>> 2. You look at system state and process
On 19 November 2015 at 21:45, Douglas Anderson wrote:
> In general it is wise to clear interrupts before processing them. If
> you don't do that, you can get:
> 1. Interrupt happens
> 2. You look at system state and process interrupt
> 3. A new interrupt happens
> 4. You clear interrupt
Hi Geert,
Thank you for the patches.
For patches 3-6, 13, 15-16 and 22 and 24,
Reviewed-by: Laurent Pinchart
I'm not sure I'd bother with patch 25/25, but I'm not against merging it
either. I'd be surprised if the serial driver still worked at all on SH :-)
On Thursday 19 November 2015
On Thu, Nov 19, 2015 at 11:51:37PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 08/22/2015 02:16 AM, David Daney wrote:
>
> >From: David Daney
> >
> >commit 18ee49ddb0d2 ("phylib: rename mii_bus::dev to mii_bus::parent")
> >changed the parent of PHY devices from the bus to the bus parent.
> >
Hi Geert,
Thank you for the patch.
On Thursday 19 November 2015 19:39:02 Geert Uytterhoeven wrote:
> Add the device node for the external SCIF_CLK.
> The presence of the SCIF_CLK crystal and its clock frequency depend on
> the actual board.
>
> Add the two optional clock sources (ZS_CLK and
Hi Geert,
Thank you for the patch.
On Thursday 19 November 2015 19:38:57 Geert Uytterhoeven wrote:
> Refactor the clock and baud rate parameter code to ease adding support
> for multiple clocks and baud rate generators later.
> sci_scbrr_calc() now returns the bit rate error, so it can be
On 19.11.2015 14:40, Jacob Siverskog wrote:
> This is according to figure 12 ("I2C Programming Procedure") in
> "Si5351A/B/C Data Sheet"
> (https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351-B.pdf).
>
> Without the PLL soft reset, we were unable to get three outputs
> working at the
On Wed, Nov 18, 2015 at 4:48 PM, Ilya Dryomov wrote:
> On Wed, Nov 18, 2015 at 4:30 PM, Tejun Heo wrote:
>> Hello, Ilya.
>>
>> On Wed, Nov 18, 2015 at 04:12:07PM +0100, Ilya Dryomov wrote:
>>> > It's stinky that the bdi is going away while the inode is still there.
>>> > Yeah, blkdev inodes are
Hi Geert,
Thank you for the patch.
On Thursday 19 November 2015 19:38:56 Geert Uytterhoeven wrote:
> The "renesas,scif" compatible value is currently used for the SCIF
> variant in all Renesas SoCs of the R-Car family. However, the variant
> used in the R-Car family is not the common "SH-4(A)"
On Thu, Nov 19, 2015 at 5:55 PM, Brian Foster wrote:
> On Wed, Nov 18, 2015 at 12:46:21AM +0200, Octavian Purdila wrote:
>> Naive implementation for non-mmu architectures: allocate physically
>> contiguous xfs buffers with alloc_pages. Terribly inefficient with
>> memory and fragmentation on high
On Sunday, November 15, 2015 12:42:52 PM SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Sun, 15 Nov 2015 12:38:33 +0100
>
> The functions consume_skb() and kfree_skb() test whether their argument
> is NULL and then return immediately.
> Thus the tests around their calls are not needed.
Hello.
On 08/22/2015 02:16 AM, David Daney wrote:
From: David Daney
commit 18ee49ddb0d2 ("phylib: rename mii_bus::dev to mii_bus::parent")
changed the parent of PHY devices from the bus to the bus parent.
Then, commit 4dea547fef1b ("phylib: rework to prepare for OF
registration of PHYs")
On Thu, Nov 19, 2015 at 9:37 PM, Laurent Pinchart
wrote:
>> --- a/drivers/tty/serial/sh-sci.c
>> +++ b/drivers/tty/serial/sh-sci.c
>> @@ -1870,7 +1870,7 @@ static unsigned int sci_scbrr_calc(struct sci_port *s,
>> unsigned int bps, static void sci_baud_calc_hscif(unsigned int bps,
>> unsigned
On 16.11.2015 12:37, Jisheng Zhang wrote:
> The firmware can support PSCI-1.0 in fact. This change also enables
> suspend to ram on Marvell berlin arm64 SoC.
>
> Signed-off-by: Jisheng Zhang
Appled to berlin64/dt.
Thanks!
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 2 +-
> 1 file
On Thu, Nov 19, 2015 at 9:36 PM, Laurent Pinchart
wrote:
>> --- a/drivers/tty/serial/sh-sci.c
>> +++ b/drivers/tty/serial/sh-sci.c
>> @@ -1880,9 +1881,9 @@ static void sci_baud_calc_hscif(unsigned int bps,
>> unsigned long freq, int *brr, for (c = 0; c <= 3; c++) {
>> /*
On 16.11.2015 12:33, Julia Lawall wrote:
> for_each_available_child_of_node performs an of_node_get on each iteration,
> so a return from the middle of the loop requires an of_node_put.
>
> A simplified version of the semantic patch that finds this problem is as
> follows
On 16.11.2015 12:09, Jisheng Zhang wrote:
> The Marvell Berlin BG2Q has 3 watchdogs which are compatible with the
> snps,dw-wdt driver sit in the sysmgr domain. This patch adds the
> corresponding device tree nodes.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm/boot/dts/berlin2q.dtsi | 24
Hi Laurent,
On Thu, Nov 19, 2015 at 9:26 PM, Laurent Pinchart
wrote:
> On Thursday 19 November 2015 19:38:41 Geert Uytterhoeven wrote:
>> Amend the DT bindings to include the optional clock sources for the Baud
>> Rate Generator for External Clock (BRG), as found on some SCIF variants
>> and on
Hi Geert,
Thank you for the patch.
On Thursday 19 November 2015 19:38:53 Geert Uytterhoeven wrote:
> Add register definitions for the Baud Rate Generator for External Clock
> (BRG), as found in some SCIF and in HSCIF, including a new regtype for
> the "SH-4(A)"-derived SCIF variant with BRG.
>
This patchset adds support of Hisilicon Hip06 SoC to the existing HNS
ethernet driver.
The changes in the driver are mainly due to changes in the DMA
descriptor provided by the Hip06 ethernet hardware. These changes
need to co-exist with already present Hip05 DMA descriptor and its
operating
This patch adds the support of "TSO (TCP Segment Offload)" feature
provided by the Hip06 ethernet hardware to the HNS ethernet
driver.
Enabling this feature would help offload the TCP Segmentation
process to the Hip06 ethernet hardware. This eventually would help
in saving precious cpu cycles.
This patch adds the support of "RSS (Receive Side Scaling)" feature
provided by the Hip06 ethernet hardware to the HNS ethernet
driver.
This feature helps in distributing the different flows (mapped as
hash by hardware using Toeplitz Hash) to different Queues asssociated
with the processor cores.
This patch adds the initializzation code to disable the hardware
vlan support for VLAN Tag stripping by default for now.
Proper support of "hardware VLAN assitance" feature would
soon come in the next coming patches.
Signed-off-by: Salil Mehta
---
This PATCH V3 addresses the comment floated by David Miller and
has been created over PATCH V2 sent earlier.
PATCH V2:
1) Bug Fixes and Clean-up: Internally identified
2) Addresses internal review comments by Kenneth Lee and
by Huang Daode
3) Addresses the review comment from
From: Salil
This patch adds the support of ethtool TSO option to V1 patch,
meant to add support of Hip06 SoC to HNS
Signed-off-by: Salil Mehta
Signed-off-by: lisheng
---
drivers/net/ethernet/hisilicon/hns/hns_enet.c | 47 +
1 file changed, 47 insertions(+)
diff
On Thu, Nov 19, 2015 at 07:33:58PM +, Luck, Tony wrote:
> > Applied, thanks.
>
> Did you test it (note the "UNTESTED" in the subject!). My usual system for
> this is getting upgrades and being
> flaky at the moment.
Bah, it builds, should be enough. Ship it. :-)
Lemme get a box...
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