On Thu, Dec 03, 2015 at 08:41:29PM +0800, Herbert Xu wrote:
> On Mon, Nov 30, 2015 at 06:18:59PM +0800, Herbert Xu wrote:
> >
> > OK that's better. I think I see the problem. The test in
> > rhashtable_insert_rehash is racy and if two threads both try
> > to grow the table one of them may be
On 12/03/2015 05:32 PM, Arnd Bergmann wrote:
> On Thursday 03 December 2015 16:33:11 Peter Ujfalusi wrote:
>> +
>> +/**
>> + * dma_request_chan - try to allocate an exclusive slave channel
>> + * @dev: pointer to client device structure
>> + * @name: slave channel name
>> + *
>> + *
On Thu, Dec 03, 2015 at 10:16:32AM -0500, Tejun Heo wrote:
> Applying 1-2 to libata/for-4.4-fixes.
That should have been cgroup/for-4.4-fixes.
Thanks.
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On Thursday 03 December 2015 16:33:12 Peter Ujfalusi wrote:
> diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
> index 0675e268d577..46b305ea0d21 100644
> --- a/drivers/dma/edma.c
> +++ b/drivers/dma/edma.c
> @@ -2297,6 +2297,12 @@ static int edma_probe(struct platform_device *pdev)
>
2015-12-03 18:30 GMT+03:00 Sasha Levin :
> Passing 0 to roundup_pow_of_two would lead to wrapping around and trying to
> find the last set bit on (unsigned long)(-1), which is obviously wrong.
>
> Instead, deal with this case by rounding it up to the closest power of two
> (2 ** 0).
>
>
* Sekhar Nori [151203 07:25]:
> On Thursday 03 December 2015 08:32 PM, Tony Lindgren wrote:
> >
> > Yes we should naturally fix up the kernel locking.
>
> Alright. Thanks!
>
> >
> > Please also add something like "enable debug for more information"
> > to the warning. And then print out the
Passing 0 to roundup_pow_of_two would lead to wrapping around and trying to
find the last set bit on (unsigned long)(-1), which is obviously wrong.
Instead, deal with this case by rounding it up to the closest power of two
(2 ** 0).
Signed-off-by: Sasha Levin
---
include/linux/log2.h |3
On Thu, 3 Dec 2015 15:09:26 +
Will Deacon wrote:
> Yeah, I think the comments on x86 and arm64 are out of date. They also
> mention the freeing of __init sections -- is that still a concern?
No we black list them, any section that we are not sure will be there
when we expect it to has
On Thursday 03 December 2015 16:33:11 Peter Ujfalusi wrote:
> +
> +/**
> + * dma_request_chan - try to allocate an exclusive slave channel
> + * @dev: pointer to client device structure
> + * @name: slave channel name
> + *
> + * Returns pointer to appropriate DMA channel on success or
On Thu, 03 Dec 2015 15:56:12 +0100,
Mark Brown wrote:
>
> On Thu, Dec 03, 2015 at 12:07:26PM +0100, Takashi Iwai wrote:
> > Mark Brown wrote:
> > > On Thu, Dec 03, 2015 at 10:41:38AM +0100, Takashi Iwai wrote:
>
> > > > While reading this patch, I wondered how regmap can be used safely in
> > >
2015-11-20 16:52 keltezéssel, cp...@redhat.com írta:
> From: Stephen Chandler Paul
>
> HPD signals on DVI ports can be fired off before the pins required for
> DDC probing actually make contact, due to the pins for HPD making
> contact first. This results in a HPD signal being asserted but DDC
>
On Thu, 3 Dec 2015 12:44:59 +0800
Xunlei Pang wrote:
> root_domain::rto_mask allocated through alloc_cpumask_var()
> contains garbage data with CONFIG_CPUMASK_OFFSTACK set, this
> may cause problems. For instance, When doing pull_rt_task(),
> it may do useless iterations if rto_mask retains
On Thu, 3 Dec 2015, Nicolas Ferre wrote:
> Le 02/12/2015 20:36, Alexandre Belloni a �crit :
> > The interrupt handler, ohci_hcd_at91_overcurrent_irq may be called right
> > after registration. At that time, pdev->dev.platform_data is not yet set,
> > leading to a NULL pointer dereference.
> >
>
On Thursday 03 December 2015 08:32 PM, Tony Lindgren wrote:
> * Sekhar Nori [151203 03:29]:
>> On Tuesday 20 October 2015 08:22 PM, Tony Lindgren wrote:
>>>
>>> OK thanks for testing. My guess from the above list would be EDMA
>>> or CPSW missing a flush of posted write. Maybe try adding a
* Roger Quadros [151203 01:02]:
> On 03/12/15 11:52, Brian Norris wrote:
> > On Thu, Dec 03, 2015 at 11:38:14AM +0530, Roger Quadros wrote:
> >
> > I think I may have misunderstood the branch proposal. If Tony queues up:
> >
> > l2-mtd.git (or just up to commit a61ae81a1907)
> > +
> >
On Fri, Nov 27, 2015 at 07:57:25PM +0100, Oleg Nesterov wrote:
> Now that nobody use the "priv" arg passed to can_fork/cancel_fork/fork we can
> kill CGROUP_CANFORK_COUNT/SUBSYS_TAG/etc and cgrp_ss_priv[] in copy_process().
>
> Signed-off-by: Oleg Nesterov
Applied to cgroup/for-4.5.
Thanks.
On Mon, Nov 30, 2015 at 05:45:43PM -0500, Tejun Heo wrote:
> From 7bbb8d4e913853a1346d95745ca8092f0cc8ce00 Mon Sep 17 00:00:00 2001
> From: Tejun Heo
> Date: Mon, 30 Nov 2015 17:24:34 -0500
>
> Because accounting resources for the root cgroup sometimes incurs
> measureable overhead for workloads
Signed-off-by: Paolo Bonzini
---
I am sending this as RFC because the error messages it produces are
very ugly. Because of inlining, the original line is lost. The
alternative is to change vmcs_read/write/checkXX into macros, but
then you need to have a single
Hello,
On Thu, Dec 03, 2015 at 10:33:55AM +0100, Andreas Werner wrote:
> All the other "flag" fields in the structs are used and/or reserved
> and it seems to be no good place for such flags.
You can use the port flags - ATA_FLAG_*.
> What I am thinking about is.
>
> 1. Add new flag e.g.
On Mon, Nov 30, 2015 at 05:44:31PM -0500, Tejun Heo wrote:
> From 0d7d444e260493252e30c70813c7657e9ede2f12 Mon Sep 17 00:00:00 2001
> From: Tejun Heo
> Date: Mon, 30 Nov 2015 17:24:34 -0500
>
> Consider the following v2 hierarchy.
>
> P0 (+memory) --- P1 (-memory) --- A
>
In theory this should have broken EPT on 32-bit kernels (due to
reading the high part of natural-width field GUEST_CR3). Not sure
if no one noticed or the processor behaves differently from the
documentation.
Signed-off-by: Paolo Bonzini
---
arch/x86/kvm/vmx.c | 8
1 file changed, 4
Linus,
During the merge window I added a new file that is used to filter trace
events on pids. It filters all events where only tasks with their pid in that
file exists. It also handles the sched_switch and sched_wakeup trace events
where the current task does not have its pid in the file, but
On Thu, Dec 03, 2015 at 10:05:25AM -0500, Steven Rostedt wrote:
> On Thu, 3 Dec 2015 09:38:21 +
> Will Deacon wrote:
> > I think you're missing the case where the instruction changes under our
> > feet after we've read it but before we've replaced it (e.g. due to module
> > unloading). I
This was not printing the high parts of several 64-bit fields on
32-bit kernels. Separate from the previous one to make the patches
easier to review.
Signed-off-by: Paolo Bonzini
---
arch/x86/kvm/vmx.c | 39 ---
1 file changed, 20 insertions(+), 19
From: Herbert Xu
> Sent: 03 December 2015 12:51
> On Mon, Nov 30, 2015 at 06:18:59PM +0800, Herbert Xu wrote:
> >
> > OK that's better. I think I see the problem. The test in
> > rhashtable_insert_rehash is racy and if two threads both try
> > to grow the table one of them may be tricked into
On Thu, Dec 03, 2015 at 08:14:33AM +, Simon Arlott wrote:
> On 03/12/15 00:06, Mark Brown wrote:
> > this it should know at least something about how to control the device
> > from the compatible string. If you're making a generic driver it should
> > not make reference to specific devices.
On Thu, Dec 3, 2015 at 4:14 AM, Martyn Welch
wrote:
>
> On 02/12/15 15:15, Rob Herring wrote:
>>
>> On Tue, Dec 01, 2015 at 07:12:49PM +, Martyn Welch wrote:
>>>
>>> This patch adds documentation for the chromeos-firmware binding.
>>>
>>> Cc: Rob Herring
>>> Cc: Pawel Moll
>>> Cc: Mark
This patchset is based on Nowicki patchset:
[PATCH V1 00/11] MMCONFIG refactoring and ARM64 PCI hostbridge init based on
ACPI
This patchset:
1) adds ACPI support for non ECAM PCI Host Bridge Controllers
2) adds ACPI support for Hip05 PCIe Host Bridge Controller
Gabriele Paoloni (1):
PCI/ACPI:
On Thu, 3 Dec 2015 11:48:24 +
Will Deacon wrote:
> Hmm, so this should all be fine if we exclusively use the probe_kernel_*
> functions and handle the -EFAULT gracefully. Now, that leaves an
> interesting scenario with the flush_icache_range call in
> aarch64_insn_patch_text_nosync, since
On Thu, Dec 03, 2015 at 04:04:42PM +0100, Peter Zijlstra wrote:
> On Thu, Dec 03, 2015 at 09:48:11AM -0500, Tejun Heo wrote:
> > We can add MEM_RECLAIM -> !MEM_RECLAIM warning mechanism in addition
> > but I think adding stall detection is justified.
>
> Sure, a stall mech is always nice, but I
This patch adds ACPI support for HiSilicon PCIe Host Bridge
controller
Signed-off-by: Liudongdong
Signed-off-by: Gabriele Paoloni
---
MAINTAINERS | 8 ++
arch/arm64/kernel/Makefile| 1 +
arch/arm64/kernel/pci.c | 1 +
On 03/12/15 11:23, Vitaly Kuznetsov wrote:
> David Vrabel writes:
>
>> Adding the rtc platform device when there are no legacy irqs (no
>> legacy PIC)
>
> No PIC != No legacy IRQs, Hyper-V Gen2 represents such a platform (and
> it has RTC on irq8). I've tested this patch against it and it
This patch modifies the ARM64 architecure specific PCI framework to
support Host Bridge specific quirks. these quirks are need for
host bridge controllers that are not fully ECAM compliant.
The quirks array allows each vendor to define his own
acpi_scan_handler where its own pci_ops can be defined
On Thu, Dec 03, 2015 at 09:48:11AM -0500, Tejun Heo wrote:
> We can add MEM_RECLAIM -> !MEM_RECLAIM warning mechanism in addition
> but I think adding stall detection is justified.
Sure, a stall mech is always nice, but I was thinking we should be able
to better catch some of these with explicit
On Thu, 3 Dec 2015 09:38:21 +
Will Deacon wrote:
> I think you're missing the case where the instruction changes under our
> feet after we've read it but before we've replaced it (e.g. due to module
> unloading). I think that's why ftrace_modify_code has the comment about
> lack of locking
On Thu, Dec 03, 2015 at 12:07:26PM +0100, Takashi Iwai wrote:
> Mark Brown wrote:
> > On Thu, Dec 03, 2015 at 10:41:38AM +0100, Takashi Iwai wrote:
> > > While reading this patch, I wondered how regmap can be used safely in
> > > an irq-disabled context. Mark, do we have any API for that?
> >
* Sekhar Nori [151203 03:29]:
> On Tuesday 20 October 2015 08:22 PM, Tony Lindgren wrote:
> >
> > OK thanks for testing. My guess from the above list would be EDMA
> > or CPSW missing a flush of posted write. Maybe try adding a readback
> > of the related device revision register after acking
On Thu 03-12-15 14:43:26, Michal Hocko wrote:
> On Thu 03-12-15 14:37:19, Michal Hocko wrote:
> > On Thu 03-12-15 21:59:50, Minchan Kim wrote:
> > > On Thu, Dec 03, 2015 at 09:54:52AM +0100, Michal Hocko wrote:
> > > > On Thu 03-12-15 11:10:06, Minchan Kim wrote:
> > > > > On Thu, Dec 03, 2015 at
Hi Dave,
Today's linux-next merge of the drm tree got a conflict in
drivers/gpu/drm/i915/intel_hdmi.c between commit ac9b8236551d1 ("drm/i915:
Introduce a gmbus power domain") from the drm-intel-fixes tree and commit
69172f210e9fffaf8 ("drm/i915: take a power domain ref only when needed
during
On Thu, Dec 03, 2015 at 11:59:48AM +0100, Michal Hocko wrote:
> On Thu 03-12-15 10:08:11, Pradeep Goswami (Pradeep Kumar Goswami) wrote:
> > This patch corrects the number of pages which are rotated on active list.
> > The counter for rotated pages effects the number of pages
> > to be scanned on
On Thu, 3 Dec 2015, Geliang Tang wrote:
> while (nr_freed < tofree && !list_empty(>slabs_free)) {
>
> spin_lock_irq(>list_lock);
> - p = n->slabs_free.prev;
> - if (p == >slabs_free) {
> + if (list_empty_careful(>slabs_free)) {
We have
On to, 2015-12-03 at 14:47 +, Mark Brown wrote:
> Hi Dave,
>
> Today's linux-next merge of the drm tree got a conflict in
> drivers/gpu/drm/i915/i915_drv.h and
> drivers/gpu/drm/i915/i915_debugfs.c between
> commit ac9b8236551d ("drm/i915: Introduce a gmbus power domain") from
> the
>
Hi,
I would have liked to be in copy of that mail. Maybe you used
get_maintainers on an old tree?
On 02/12/2015 at 17:53:04 -0800, Julius Werner wrote :
> In Fuzhou, China, the month of November seems to be having 31 days.
> That's nice and all (I'm sure you can get a lot more done in a year
Hi Matwey,
On 12/03/2015 12:50 AM, Matwey V. Kornilov wrote:
> I am working on v4, where I completely redesigned implementation. And
> now I think that it is considerably better than v3.
> It looks like the following:
> https://github.com/matwey/linux/commits/8520_rs485_v4
> But it is not ready
Hi Dave,
Today's linux-next merge of the drm tree got a conflict in
drivers/gpu/drm/i915/intel_runtime_pm.c between commit
ac9b8236551d11 ("drm/i915: Introduce a gmbus power domain") from the
drm-intel-fixes tree and commit 73dfc227ff5c8e005 ("drm/i915/skl: init/uninit
display core as part of
On Wed, Dec 02, 2015 at 07:28:39PM -0500, Tejun Heo wrote:
...
> +void touch_workqueue_watchdog(int cpu)
> +{
> + /*
> + * If not explicitly touched, these stamps are never updated, which
> + * means that they may affect stall detection if jiffies wraps;
> + * however, it's
On Thu, Dec 03, 2015 at 02:20:26PM +, Daniel Stone wrote:
> Hi Liviu,
>
> On 3 December 2015 at 10:00, Liviu Dudau wrote:
> > On Wed, Dec 02, 2015 at 05:21:44PM +, Daniel Stone wrote:
> >> On 2 December 2015 at 12:23, Liviu Dudau wrote:
> >> > + if (irq_status &
Hi Dave,
Today's linux-next merge of the drm tree got a conflict in
drivers/gpu/drm/i915/i915_drv.h and drivers/gpu/drm/i915/i915_debugfs.c between
commit ac9b8236551d ("drm/i915: Introduce a gmbus power domain") from the
drm-intel-fixes tree and commit dfa5762793a40b4b03 ("drm/i915: Add a
On Thu, 3 Dec 2015, Geliang Tang wrote:
> Add a new helper function get_first_slab() that get the first slab
> from a kmem_cache_node.
Acked-by: Christoph Lameter
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Hey, Peter.
On Thu, Dec 03, 2015 at 11:00:18AM +0100, Peter Zijlstra wrote:
> > have you considered something as simple as:
> >
> > WARN_ON(current->reclaim_state && !WQ_MEM_RECLAIM);
> >
> > ?
>
> Alternatively, you can 'abuse' the lockdep reclaim bits by marking
> !MEM_RECLAIM workqueue
On December 03, 2015 11:37, Takashi Iwai wrote:
> > > > This patch adds support to the codec driver to handle mic level
> > > > detect related IRQs, and report these to user-space using a uevent
> > > > variable.
> > >
> > > Is the uevent the best way for this?
> > >
> > >
> > > thanks,
> > >
> >
Add support for providing device to filter_fn mapping so client drivers
can switch to use the dma_request_chan() API.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/edma.c | 6 ++
include/linux/platform_data/edma.h | 7 +++
2 files changed, 13 insertions(+)
diff --git
Channel matching with private_candidate() is used in two paths, the error
checking is slightly different in them and they are duplicating code also.
Move the code under find_candidate() to provide consistent execution and
going to allow us to reuse this mode of channel lookup later.
"Jon Medhurst (Tixy)" writes:
> On Wed, 2015-12-02 at 22:19 +0100, Ben Gamari wrote:
>> The frequency units are very confusing in this area as OPPs use Hz
>> whereas cpufreq uses kHz. Be explicit about this in variable naming.
>>
>> Cc: Javier Martinez Canillas
>> Signed-off-by: Ben Gamari
>>
Hi,
Changes since RFC v03:
- No longer RFC
- Dropped the arch/arm/mcah-davinci and daVinci MMC and SPI patches so we don't
have inter subsystem issues.
- Comments from Andy to patch no 3 has been addressed with the exception of
moving code over to device_property
- 'struct dma_filter_map'
The two API function can cover most, if not all current APIs used to
request a channel. With minimal effort dmaengine drivers, platforms and
dmaengine user drivers can be converted to use the two function.
struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask);
To request any
To make the intention clearer, use list_{next,first}_entry instead
of list_entry.
Signed-off-by: Geliang Tang
---
mm/swapfile.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/mm/swapfile.c b/mm/swapfile.c
index 7073fae..7c714c6 100644
--- a/mm/swapfile.c
+++
If mask is NULL skip the mask matching against the DMA device capabilities.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/dmaengine.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index daf54a39bcc7..6311e1fc80be 100644
---
There is a split tracepoint that is supposed to be called when
bio is splitted, and it was called in bio_split function until
commit 4b1faf931650d4a35b2a ("block: Kill bio_pair_split()").
But now, no one reports splits, so this patch adds call to
trace_block_split back in blk_queue_split right
Add ignore_zero_blocks option, which returns zeros for blocks matching a
zero hash without validating the content.
Signed-off-by: Sami Tolvanen
---
Documentation/device-mapper/verity.txt | 5 ++
drivers/md/dm-verity-fec.c | 8 +++-
drivers/md/dm-verity-target.c | 84
Add support for correcting corrupted blocks using Reed-Solomon.
This code uses RS(255, N) interleaved across data and hash
blocks. Each error-correcting block covers N bytes evenly
distributed across the combined total data, so that each byte is a
maximum distance away from the others. This makes
Changes since v1:
- Added CONFIG_DM_VERITY_FEC and split error correction into
dm-verity-fec.[ch] to further separate the functionality from the
rest of dm-verity. Follows the same pattern as dm-uevent.
- Added missing dependencies for REED_SOLOMON to Kconfig.
- Renamed
Simplify the code with list_for_each_entry_safe().
Signed-off-by: Geliang Tang
---
mm/shmem.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/mm/shmem.c b/mm/shmem.c
index 9b05111..816685f 100644
--- a/mm/shmem.c
+++ b/mm/shmem.c
@@ -793,8 +793,7 @@ static int
On Wed, 2015-12-02 at 22:19 +0100, Ben Gamari wrote:
> The frequency units are very confusing in this area as OPPs use Hz
> whereas cpufreq uses kHz. Be explicit about this in variable naming.
>
> Cc: Javier Martinez Canillas
> Signed-off-by: Ben Gamari
> ---
> drivers/cpufreq/arm_big_little.c
Each allocated buffer, whose pointer is put into BM pool is DMA-mapped.
Hence it should be properly unmapped after usage or when removing buffers
from pool.
This commit fixes DMA handling on RX path by adding dma_unmap_single() in
mvpp2_rx() and in mvpp2_bufs_free(). The latter function's
The Tx descriptor release code currently calls dma_unmap_single() and
dev_kfree_skb_any() if the descriptor is associated with a non-NULL skb.
This condition is true only for the last fragment of the packet.
Since every descriptor's buffer is DMA-mapped it has to be properly
unmapped.
Hi Liviu,
On 3 December 2015 at 10:00, Liviu Dudau wrote:
> On Wed, Dec 02, 2015 at 05:21:44PM +, Daniel Stone wrote:
>> On 2 December 2015 at 12:23, Liviu Dudau wrote:
>> > + if (irq_status & HDLCD_INTERRUPT_VSYNC) {
>> > + unsigned long flags;
>> > +
>> > +
I have very similar problem with SAS2X28, please take a look on a bug
report here https://bugzilla.kernel.org/show_bug.cgi?id=108771
Thanks, Pavel
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More majordomo info
In hitherto code in case of RX buffer allocation error during refill,
original buffer is pushed to the network stack, but the amount of
available buffer pointers in BM pool is decreased.
This commit fixes the situation by moving refill call before skb_put(),
and returning original buffer pointer
Hi,
During my work on mvneta driver I revised mvpp2, and it occurred that the
initial version of Marvell Armada 375 SoC comprised bugs around
DMA-unmapping in both ingress and egress paths - not all buffers were
umapped in TX path and none(!) in RX. Three patches that I send fix
this situation.
On 03/12/15 15:48, Philip Elcan wrote:
> This allows setting an SDHC controller as non-removable
> by using the _RMV method in the ACPI table. It doesn't
Is that _RMV on the host controller? Shouldn't it be on the card i.e. child
device node?
> mark it as non-removable if GPIO card detection is
To make the intention clearer, use list_{first,next}_entry instead
of list_entry.
Signed-off-by: Geliang Tang
---
mm/memcontrol.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 79a29d5..a6301ea 100644
--- a/mm/memcontrol.c
Add a new helper function get_first_slab() that get the first slab
from a kmem_cache_node.
Signed-off-by: Geliang Tang
---
mm/slab.c | 39 +--
1 file changed, 21 insertions(+), 18 deletions(-)
diff --git a/mm/slab.c b/mm/slab.c
index 925921e..2463b57 100644
To make the intention clearer, use list_empty_careful and list_last_entry
in drain_freelist().
Signed-off-by: Geliang Tang
---
mm/slab.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/mm/slab.c b/mm/slab.c
index 5d5aa3b..925921e 100644
--- a/mm/slab.c
+++ b/mm/slab.c
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_smd_rpm driver to communicate with RPM.
Such platforms are msm8916, apq8084 and msm8974.
The RPM is a dedicated hardware engine for managing the shared
SoC
Add the RPM Clock Controller DT node and include the necessary header
file for clocks.
Signed-off-by: Georgi Djakov
---
arch/arm64/boot/dts/qcom/msm8916.dtsi |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
Currently the rates of the xo and sleep clocks are hard-coded in the
GCC driver, but this is a board layout description that actually should
be in the DT. Moving them into DT also allows us to insert the RPM
controlled clocks between the DT and GCC clocks.
Signed-off-by: Georgi Djakov
---
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_rpm driver to communicate with RPM.
Such platforms are apq8064 and msm8960.
Signed-off-by: Georgi Djakov
---
.../devicetree/bindings/clock/qcom,rpmcc.txt
Currently the rates of the xo and sleep clocks are hard-coded in the
GCC driver, but this is a board layout description that actually should
be in the DT. Moving them into DT also allows us to insert the RPM
controlled clocks between the DT and GCC clocks.
Signed-off-by: Georgi Djakov
---
Add the RPM Clock Controller DT node.
Signed-off-by: Georgi Djakov
---
arch/arm/boot/dts/qcom-apq8064.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index eb929f2693b2..0860fff6e4a7 100644
---
This patchset adds initial support for the clocks controlled by
the RPM (Resource Power Manager) processor on Qualcomm platforms.
The RPM is a dedicated hardware engine for managing the shared
SoC resources in order to keep the lowest power profile. It
communicates with other hardware subsystems
This allows setting an SDHC controller as non-removable
by using the _RMV method in the ACPI table. It doesn't
mark it as non-removable if GPIO card detection is
already setup.
Signed-off-by: Philip Elcan
---
drivers/mmc/host/sdhci-acpi.c | 20
1 file changed, 20
On 12/03/2015 01:37 PM, Rasmus Villemoes wrote:
> On Wed, Dec 02 2015, Vlastimil Babka wrote:
>> --- a/include/linux/mmdebug.h
>> +++ b/include/linux/mmdebug.h
>> @@ -7,6 +7,9 @@
>> struct page;
>> struct vm_area_struct;
>> struct mm_struct;
>> +struct trace_print_flags; // can't include
Hi David,
On mer., déc. 02 2015, David Miller wrote:
> From: Gregory CLEMENT
> Date: Wed, 02 Dec 2015 09:16:06 +0100
>
>> Hi David,
>>
>> On mer., déc. 02 2015, David Miller wrote:
>>
>>> From: Marcin Wojtas
>>> Date: Mon, 30 Nov 2015 13:27:40 +0100
>>>
I'm sending v4 with
On Thu 03-12-15 14:37:19, Michal Hocko wrote:
> On Thu 03-12-15 21:59:50, Minchan Kim wrote:
> > On Thu, Dec 03, 2015 at 09:54:52AM +0100, Michal Hocko wrote:
> > > On Thu 03-12-15 11:10:06, Minchan Kim wrote:
> > > > On Thu, Dec 03, 2015 at 10:34:04AM +0900, Minchan Kim wrote:
> > > > > On Wed,
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Add 'write memory' barrier after enable region in PCIE_ATU_CR2
register. The barrier is needed to ensure that the region enable
request has been reached it's destination at time when we
read/write to PCI configuration space.
Without this barrier PCI device enumeration during kernel boot
is not
Hi,
Here is v4, comments from Bjorn and Rob have been addressed.
The previous version can be found at [1].
regards,
Stan
[1] https://lkml.org/lkml/2015/11/23/114
Stanimir Varbanov (5):
PCI: designware: add memory barrier after enabling region
DT: PCI: qcom: Document PCIe devicetree
On Thu, Dec 03, 2015 at 12:08:11PM +, Peter Rosin wrote:
> Russell King wrote:
> > On Thu, Dec 03, 2015 at 11:38:20AM +, Peter Rosin wrote:
> > > Russell King wrote:
> > > > On Thu, Dec 03, 2015 at 08:33:13AM +, Peter Rosin wrote:
> > > > > I wrote:
> > > > > > If I enable
On Thu 03-12-15 21:59:50, Minchan Kim wrote:
> On Thu, Dec 03, 2015 at 09:54:52AM +0100, Michal Hocko wrote:
> > On Thu 03-12-15 11:10:06, Minchan Kim wrote:
> > > On Thu, Dec 03, 2015 at 10:34:04AM +0900, Minchan Kim wrote:
> > > > On Wed, Dec 02, 2015 at 11:16:43AM +0100, Michal Hocko wrote:
From: Stanimir Varbanov
The PCIe driver reuse the Designware common code for host
and MSI initialization, and also program the Qualcomm
application specific registers.
Signed-off-by: Stanimir Varbanov
Signed-off-by: Stanimir Varbanov
---
MAINTAINERS |7 +
Add the pcie dt node so that it can probe and used.
Signed-off-by: Stanimir Varbanov
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 36 +++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
From: Stanimir Varbanov
Document Qualcomm PCIe driver devicetree bindings.
Signed-off-by: Stanimir Varbanov
Signed-off-by: Stanimir Varbanov
---
.../devicetree/bindings/pci/qcom,pcie.txt | 233
1 file changed, 233 insertions(+)
create mode 100644
Enable pcie dt node and fill pcie dt node with regulator, pinctrl
and reset gpio, to use the pcie on the ifc6410 board.
Signed-off-by: Stanimir Varbanov
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git
On Thu, 2015-12-03 at 08:27 -0500, Josh Boyer wrote:
> The driver is missing calls to pci_dma_mapping_error() after
> performing the DMA mapping, which caused DMA-API warning to
> show up in dmesg's output. Though that happens only when
> DMA_API_DEBUG option is enabled. This change fixes the
Em Mon, 16 Nov 2015 11:47:58 +0200
Sakari Ailus escreveu:
> Jacek Anaszewski wrote:
> > This patch depends on the preceding LED core improvements patches
> > from this patch set, and it would be best if it was merged through
> > the LED tree. Can I get your ack for this? I've already obtained
On Thu, Dec 03, 2015 at 09:16:48PM +0800, Boqun Feng wrote:
> On Thu, Dec 03, 2015 at 01:40:14PM +0100, Peter Zijlstra wrote:
> [snip]
> > + *
> > + * CPU0 (schedule) CPU1 (try_to_wake_up) CPU2 (schedule)
> > + *
> > + * LOCK rq(0)->lock LOCK X->pi_lock
> > + * dequeue X
> > + * sched-out
The driver is missing calls to pci_dma_mapping_error() after
performing the DMA mapping, which caused DMA-API warning to
show up in dmesg's output. Though that happens only when
DMA_API_DEBUG option is enabled. This change fixes the issue
and makes pvscsi_map_buffers() function more robust.
put the allocated blks back to the free list
when the luns configure failed, to make these
blks useable to others.
Signed-off-by: Wenwei Tao
---
drivers/lightnvm/rrpc.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/lightnvm/rrpc.c
On Thursday 03 December 2015 13:03:41 Lee Jones wrote:
> On Thu, 03 Dec 2015, Arnd Bergmann wrote:
>
> > On Thursday 03 December 2015 12:26:34 Lee Jones wrote:
> > > > >
> > > > > +static ssize_t rproc_state_write(struct file *filp, const char
> > > > > __user *userbuf,
> > > > > +
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