On 2016/3/3 15:42, Joonsoo Kim wrote:
> 2016-03-03 10:25 GMT+09:00 Laura Abbott :
>> (cc -mm and Joonsoo Kim)
>>
>>
>> On 03/02/2016 05:52 AM, Hanjun Guo wrote:
>>> Hi,
>>>
>>> I came across a suspicious error for CMA stress test:
>>>
>>> Before the test, I got:
>>> -bash-4.3#
On 2016/3/3 15:42, Joonsoo Kim wrote:
> 2016-03-03 10:25 GMT+09:00 Laura Abbott :
>> (cc -mm and Joonsoo Kim)
>>
>>
>> On 03/02/2016 05:52 AM, Hanjun Guo wrote:
>>> Hi,
>>>
>>> I came across a suspicious error for CMA stress test:
>>>
>>> Before the test, I got:
>>> -bash-4.3# cat /proc/meminfo |
Hi Sedat,
On Thu, 3 Mar 2016 08:31:57 +0100 Sedat Dilek wrote:
>
> Does Linux next-20160303 has this patch?
> On a quick view I could not find it.
It is applied as part of the merge commit that merges the tip tree, so
there is not a separate commit for it.
--
Cheers,
Hi Sedat,
On Thu, 3 Mar 2016 08:31:57 +0100 Sedat Dilek wrote:
>
> Does Linux next-20160303 has this patch?
> On a quick view I could not find it.
It is applied as part of the merge commit that merges the tip tree, so
there is not a separate commit for it.
--
Cheers,
Stephen Rothwell
On 03/03/2016 04:49, Parav Pandit wrote:
> Hi Tejun, Haggai,
>
> On Thu, Mar 3, 2016 at 1:28 AM, Parav Pandit wrote:
+ rpool->refcnt--;
+ if (rpool->refcnt == 0 && rpool->num_max_cnt ==
pool_info->table_len) {
>>>
>>> If the caller charges 2 and
On 03/03/2016 04:49, Parav Pandit wrote:
> Hi Tejun, Haggai,
>
> On Thu, Mar 3, 2016 at 1:28 AM, Parav Pandit wrote:
+ rpool->refcnt--;
+ if (rpool->refcnt == 0 && rpool->num_max_cnt ==
pool_info->table_len) {
>>>
>>> If the caller charges 2 and then uncharges 1 two
Hi Jens,
On Sunday, February 21, 2016 03:01:20 PM Markus Pargmann wrote:
> Hi Jens,
>
> This pull request contains 7 patches for 4.6.
any news on this pull request?
Best Regards,
Markus
>
> Patch 1 fixes some unnecessarily complicated code I introduced some versions
> ago for debugfs.
>
>
Hi Jens,
On Sunday, February 21, 2016 03:01:20 PM Markus Pargmann wrote:
> Hi Jens,
>
> This pull request contains 7 patches for 4.6.
any news on this pull request?
Best Regards,
Markus
>
> Patch 1 fixes some unnecessarily complicated code I introduced some versions
> ago for debugfs.
>
>
2016-03-03 1:44 GMT+09:00 Vlastimil Babka :
> On 02/26/2016 01:58 AM, js1...@gmail.com wrote:
>>
>> From: Joonsoo Kim
>>
>> Success of CMA allocation largely depends on success of migration
>> and key factor of it is page reference count. Until now, page
2016-03-03 1:44 GMT+09:00 Vlastimil Babka :
> On 02/26/2016 01:58 AM, js1...@gmail.com wrote:
>>
>> From: Joonsoo Kim
>>
>> Success of CMA allocation largely depends on success of migration
>> and key factor of it is page reference count. Until now, page reference
>> is manipulated by direct
On 3/3/16, Linus Torvalds wrote:
> On Mar 2, 2016 23:14, "Sedat Dilek" wrote:
>>
>> Is that commit [1] Linux-4.5 material or affects other versions, too?
>
> Hmm. I guess this affects anything with userfaultfd.
>
OK, Linux v4.4.y LTS has
On 3/3/16, Linus Torvalds wrote:
> On Mar 2, 2016 23:14, "Sedat Dilek" wrote:
>>
>> Is that commit [1] Linux-4.5 material or affects other versions, too?
>
> Hmm. I guess this affects anything with userfaultfd.
>
OK, Linux v4.4.y LTS has userfaultfd - is affected.
Just anorganizational
Hi everyone,
This patchset enhances page migration functionality to handle thp migration
for various page migration's callers:
- mbind(2)
- move_pages(2)
- migrate_pages(2)
- cgroup/cpuset migration
- memory hotremove
- soft offline
The main benefit is that we can avoid unnecessary thp
Hi everyone,
This patchset enhances page migration functionality to handle thp migration
for various page migration's callers:
- mbind(2)
- move_pages(2)
- migrate_pages(2)
- cgroup/cpuset migration
- memory hotremove
- soft offline
The main benefit is that we can avoid unnecessary thp
This patch makes it possible to support thp migration gradually. If you fail
to allocate a destination page as a thp, you just split the source thp as we
do now, and then enter the normal page migration. If you succeed to allocate
destination thp, you enter thp migration. Subsequent patches
2016-03-03 10:25 GMT+09:00 Laura Abbott :
> (cc -mm and Joonsoo Kim)
>
>
> On 03/02/2016 05:52 AM, Hanjun Guo wrote:
>>
>> Hi,
>>
>> I came across a suspicious error for CMA stress test:
>>
>> Before the test, I got:
>> -bash-4.3# cat /proc/meminfo | grep Cma
>> CmaTotal:
This patch makes it possible to support thp migration gradually. If you fail
to allocate a destination page as a thp, you just split the source thp as we
do now, and then enter the normal page migration. If you succeed to allocate
destination thp, you enter thp migration. Subsequent patches
2016-03-03 10:25 GMT+09:00 Laura Abbott :
> (cc -mm and Joonsoo Kim)
>
>
> On 03/02/2016 05:52 AM, Hanjun Guo wrote:
>>
>> Hi,
>>
>> I came across a suspicious error for CMA stress test:
>>
>> Before the test, I got:
>> -bash-4.3# cat /proc/meminfo | grep Cma
>> CmaTotal: 204800 kB
>>
2016-03-03 1:58 GMT+09:00 Vlastimil Babka :
> On 02/26/2016 01:58 AM, js1...@gmail.com wrote:
>>
>> From: Joonsoo Kim
>>
>> CMA allocation should be guaranteed to succeed by definition, but,
>> unfortunately, it would be failed sometimes. It is hard to
During testing thp migration, I saw the BUG_ON triggered due to the race between
soft offline and unpoison (what I actually saw was "bad page" warning of freeing
page with PageActive set, then subsequent bug messages differ each time.)
I tried to solve similar problem a few times (see commit
2016-03-03 1:58 GMT+09:00 Vlastimil Babka :
> On 02/26/2016 01:58 AM, js1...@gmail.com wrote:
>>
>> From: Joonsoo Kim
>>
>> CMA allocation should be guaranteed to succeed by definition, but,
>> unfortunately, it would be failed sometimes. It is hard to track down
>> the problem, because it is
During testing thp migration, I saw the BUG_ON triggered due to the race between
soft offline and unpoison (what I actually saw was "bad page" warning of freeing
page with PageActive set, then subsequent bug messages differ each time.)
I tried to solve similar problem a few times (see commit
If one of callers of page migration starts to handle thp, memory management code
start to see pmd migration entry, so we need to prepare for it before enabling.
This patch changes various code point which checks the status of given pmds in
order to prevent race between thp migration and the
If one of callers of page migration starts to handle thp, memory management code
start to see pmd migration entry, so we need to prepare for it before enabling.
This patch changes various code point which checks the status of given pmds in
order to prevent race between thp migration and the
This patch enables thp migration for move_pages(2).
Signed-off-by: Naoya Horiguchi
---
mm/migrate.c | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git v4.5-rc5-mmotm-2016-02-24-16-18/mm/migrate.c
This patch enables thp migration for mbind(2) and migrate_pages(2).
Signed-off-by: Naoya Horiguchi
---
mm/mempolicy.c | 94 --
1 file changed, 72 insertions(+), 22 deletions(-)
diff --git
This patch enables thp migration for memory hotremove. Stub definition of
prep_transhuge_page() is added for CONFIG_TRANSPARENT_HUGEPAGE=n.
Signed-off-by: Naoya Horiguchi
---
include/linux/huge_mm.h | 3 +++
mm/memory_hotplug.c | 8
mm/page_isolation.c
This patch prepares thp migration's core code. These code will be open when
unmap_and_move() stops unconditionally splitting thp and get_new_page() starts
to allocate destination thps.
Signed-off-by: Naoya Horiguchi
---
arch/x86/include/asm/pgtable.h| 11 ++
This patch enables thp migration for soft offline.
Signed-off-by: Naoya Horiguchi
---
mm/memory-failure.c | 31 ---
1 file changed, 12 insertions(+), 19 deletions(-)
diff --git v4.5-rc5-mmotm-2016-02-24-16-18/mm/memory-failure.c
This patch enables thp migration for move_pages(2).
Signed-off-by: Naoya Horiguchi
---
mm/migrate.c | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git v4.5-rc5-mmotm-2016-02-24-16-18/mm/migrate.c
v4.5-rc5-mmotm-2016-02-24-16-18_patched/mm/migrate.c
This patch enables thp migration for mbind(2) and migrate_pages(2).
Signed-off-by: Naoya Horiguchi
---
mm/mempolicy.c | 94 --
1 file changed, 72 insertions(+), 22 deletions(-)
diff --git v4.5-rc5-mmotm-2016-02-24-16-18/mm/mempolicy.c
This patch enables thp migration for memory hotremove. Stub definition of
prep_transhuge_page() is added for CONFIG_TRANSPARENT_HUGEPAGE=n.
Signed-off-by: Naoya Horiguchi
---
include/linux/huge_mm.h | 3 +++
mm/memory_hotplug.c | 8
mm/page_isolation.c | 8
3 files
This patch prepares thp migration's core code. These code will be open when
unmap_and_move() stops unconditionally splitting thp and get_new_page() starts
to allocate destination thps.
Signed-off-by: Naoya Horiguchi
---
arch/x86/include/asm/pgtable.h| 11 ++
This patch enables thp migration for soft offline.
Signed-off-by: Naoya Horiguchi
---
mm/memory-failure.c | 31 ---
1 file changed, 12 insertions(+), 19 deletions(-)
diff --git v4.5-rc5-mmotm-2016-02-24-16-18/mm/memory-failure.c
Soft dirty bit is designed to keep tracked over page migration, so this patch
makes it done for thp migration too.
This patch changes the bit for _PAGE_SWP_SOFT_DIRTY bit, because it's necessary
for thp migration (i.e. both of _PAGE_PSE and _PAGE_PRESENT is used to detect
pmd migration entry.)
Soft dirty bit is designed to keep tracked over page migration, so this patch
makes it done for thp migration too.
This patch changes the bit for _PAGE_SWP_SOFT_DIRTY bit, because it's necessary
for thp migration (i.e. both of _PAGE_PSE and _PAGE_PRESENT is used to detect
pmd migration entry.)
Introduces CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION to limit thp migration
functionality to x86_64, which should be safer at the first step.
Signed-off-by: Naoya Horiguchi
---
arch/x86/Kconfig| 4
include/linux/huge_mm.h | 14 ++
mm/Kconfig
Introduce a separate check routine related to MPOL_MF_INVERT flag. This patch
just does cleanup, no behavioral change.
Signed-off-by: Naoya Horiguchi
---
mm/mempolicy.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git
Introduces CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION to limit thp migration
functionality to x86_64, which should be safer at the first step.
Signed-off-by: Naoya Horiguchi
---
arch/x86/Kconfig| 4
include/linux/huge_mm.h | 14 ++
mm/Kconfig | 3 +++
3 files
Introduce a separate check routine related to MPOL_MF_INVERT flag. This patch
just does cleanup, no behavioral change.
Signed-off-by: Naoya Horiguchi
---
mm/mempolicy.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git
Hi Wei,
[auto build test WARNING on thermal/next]
[also build test WARNING on v4.5-rc6 next-20160302]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Wei-Ni/thermal-consistently-use-int
Hi Wei,
[auto build test WARNING on thermal/next]
[also build test WARNING on v4.5-rc6 next-20160302]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Wei-Ni/thermal-consistently-use-int
On Wed, 2 Mar 2016, Vikas Shivappa wrote:
> + if (cqm_enabled && mbm_enabled)
> + intel_cqm_events_group.attrs = intel_cmt_mbm_events_attr;
> + else if (!cqm_enabled && mbm_enabled)
> + intel_cqm_events_group.attrs = intel_mbm_events_attr;
> + else if
On Wed, 2 Mar 2016, Vikas Shivappa wrote:
> + if (cqm_enabled && mbm_enabled)
> + intel_cqm_events_group.attrs = intel_cmt_mbm_events_attr;
> + else if (!cqm_enabled && mbm_enabled)
> + intel_cqm_events_group.attrs = intel_mbm_events_attr;
> + else if
On 03/03/2016 03:24 PM, Chanwoo Choi wrote:
> Hi Lu,
>
> On 2016년 03월 03일 15:37, Lu Baolu wrote:
>> GPIO resource could be retrieved through APCI as well.
>>
>> Signed-off-by: Lu Baolu
>> Reviewed-by: Felipe Balbi
>> ---
>>
On 03/03/2016 03:24 PM, Chanwoo Choi wrote:
> Hi Lu,
>
> On 2016년 03월 03일 15:37, Lu Baolu wrote:
>> GPIO resource could be retrieved through APCI as well.
>>
>> Signed-off-by: Lu Baolu
>> Reviewed-by: Felipe Balbi
>> ---
>> drivers/extcon/extcon-usb-gpio.c | 3 ++-
>> 1 file changed, 2
On 03/03/2016 03:24 PM, Chanwoo Choi wrote:
> Hell Lu,
>
> On 2016년 03월 03일 15:37, Lu Baolu wrote:
>> This is needed to handle the GPIO connected USB ID pin found on
>> Intel Baytrail devices.
>>
>> Signed-off-by: Lu Baolu
>> Reviewed-by: Felipe Balbi
On 03/03/2016 03:24 PM, Chanwoo Choi wrote:
> Hell Lu,
>
> On 2016년 03월 03일 15:37, Lu Baolu wrote:
>> This is needed to handle the GPIO connected USB ID pin found on
>> Intel Baytrail devices.
>>
>> Signed-off-by: Lu Baolu
>> Reviewed-by: Felipe Balbi
>> ---
>>
On Wed, 2 Mar 2016, Paul E. McKenney wrote:
> > --- a/kernel/cpu.c
> > +++ b/kernel/cpu.c
> > @@ -762,6 +762,7 @@ void cpuhp_report_idle_dead(void)
> > BUG_ON(st->state != CPUHP_AP_OFFLINE);
> > st->state = CPUHP_AP_IDLE_DEAD;
> > complete(>done);
>
> Not to be repetitive or anything,
On Wed, 2 Mar 2016, Paul E. McKenney wrote:
> > --- a/kernel/cpu.c
> > +++ b/kernel/cpu.c
> > @@ -762,6 +762,7 @@ void cpuhp_report_idle_dead(void)
> > BUG_ON(st->state != CPUHP_AP_OFFLINE);
> > st->state = CPUHP_AP_IDLE_DEAD;
> > complete(>done);
>
> Not to be repetitive or anything,
On 3/2/16, Stephen Rothwell wrote:
> Hi Josh,
>
> On Tue, 1 Mar 2016 15:54:51 -0600 Josh Poimboeuf
> wrote:
>>
>> Changing it to use the host compiler would probably be an easy fix, but
>> that would expose a harder bug related to endianness.
>
> Just
On 3/2/16, Stephen Rothwell wrote:
> Hi Josh,
>
> On Tue, 1 Mar 2016 15:54:51 -0600 Josh Poimboeuf
> wrote:
>>
>> Changing it to use the host compiler would probably be an easy fix, but
>> that would expose a harder bug related to endianness.
>
> Just by luck, my PowerPC host is little endian
Hi Wei,
[auto build test WARNING on thermal/next]
[also build test WARNING on v4.5-rc6 next-20160302]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Wei-Ni/thermal-consistently-use-int
Hi Wei,
[auto build test WARNING on thermal/next]
[also build test WARNING on v4.5-rc6 next-20160302]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Wei-Ni/thermal-consistently-use-int
Hi Lu,
On 2016년 03월 03일 15:37, Lu Baolu wrote:
> GPIO resource could be retrieved through APCI as well.
>
> Signed-off-by: Lu Baolu
> Reviewed-by: Felipe Balbi
> ---
> drivers/extcon/extcon-usb-gpio.c | 3 ++-
> 1 file changed, 2 insertions(+), 1
Hi Lu,
On 2016년 03월 03일 15:37, Lu Baolu wrote:
> GPIO resource could be retrieved through APCI as well.
>
> Signed-off-by: Lu Baolu
> Reviewed-by: Felipe Balbi
> ---
> drivers/extcon/extcon-usb-gpio.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git
On 03/01/2016 09:32 PM, yga...@codeaurora.org wrote:
>> On 02/28/2016 09:32 PM, Yaniv Gardi wrote:
>>> Sometimes due to hw issues it takes some time to the
>>> host controller register to update. In order to verify the register
>>> has updated, a polling is done until its value is set.
>>>
>>> In
Hell Lu,
On 2016년 03월 03일 15:37, Lu Baolu wrote:
> This is needed to handle the GPIO connected USB ID pin found on
> Intel Baytrail devices.
>
> Signed-off-by: Lu Baolu
> Reviewed-by: Felipe Balbi
> ---
> drivers/extcon/extcon-usb-gpio.c | 7 +++
Hell Lu,
On 2016년 03월 03일 15:37, Lu Baolu wrote:
> This is needed to handle the GPIO connected USB ID pin found on
> Intel Baytrail devices.
>
> Signed-off-by: Lu Baolu
> Reviewed-by: Felipe Balbi
> ---
> drivers/extcon/extcon-usb-gpio.c | 7 +++
> 1 file changed, 7 insertions(+)
>
>
On 03/01/2016 09:32 PM, yga...@codeaurora.org wrote:
>> On 02/28/2016 09:32 PM, Yaniv Gardi wrote:
>>> Sometimes due to hw issues it takes some time to the
>>> host controller register to update. In order to verify the register
>>> has updated, a polling is done until its value is set.
>>>
>>> In
On 03/01/2016 09:25 PM, yga...@codeaurora.org wrote:
>> On 02/28/2016 09:32 PM, Yaniv Gardi wrote:
>>> A race condition exists between request requeueing and scsi layer
>>> error handling:
>>> When UFS driver queuecommand returns a busy status for a request,
>>> it will be requeued and its tag
On 03/01/2016 09:25 PM, yga...@codeaurora.org wrote:
>> On 02/28/2016 09:32 PM, Yaniv Gardi wrote:
>>> A race condition exists between request requeueing and scsi layer
>>> error handling:
>>> When UFS driver queuecommand returns a busy status for a request,
>>> it will be requeued and its tag
From: Yunhui Cui
For Micron family ,The status register write enable/disable bit,
provides hardware data protection for the device.
When the enable/disable bit is set to 1, the status register
nonvolatile bits become read-only and the WRITE STATUS REGISTER
operation will not
From: Yunhui Cui
For Micron family ,The status register write enable/disable bit,
provides hardware data protection for the device.
When the enable/disable bit is set to 1, the status register
nonvolatile bits become read-only and the WRITE STATUS REGISTER
operation will not execute.
We can get the read/write/erase opcode from the spi nor framework
directly. This patch uses the information stored in the SPI-NOR to
remove the hardcode in the fsl_qspi_init_lut().
Signed-off-by: Yunhui Cui
Signed-off-by: Yunhui Cui
---
We can get the read/write/erase opcode from the spi nor framework
directly. This patch uses the information stored in the SPI-NOR to
remove the hardcode in the fsl_qspi_init_lut().
Signed-off-by: Yunhui Cui
Signed-off-by: Yunhui Cui
---
drivers/mtd/spi-nor/fsl-quadspi.c | 40
The commit 17e8351a7739 consistently use int for temperature,
however it missed a few in trip temperature and thermal_core.
In current codes, the trip->temperature used "unsigned long"
and zone->temperature used"int", if the temperature is negative
value, it will get wrong result when compare
The commit 17e8351a7739 consistently use int for temperature,
however it missed a few in trip temperature and thermal_core.
In current codes, the trip->temperature used "unsigned long"
and zone->temperature used"int", if the temperature is negative
value, it will get wrong result when compare
On 3/2/16, Linus Torvalds wrote:
> On Wed, Mar 2, 2016 at 6:55 AM, Andrea Arcangeli
> wrote:
>>
>> Running page faults that late in the exit path with signal disabled
>> was frankly unexpected.
>
> I agree that it's less than wonderful.
>
>>
On 3/2/16, Linus Torvalds wrote:
> On Wed, Mar 2, 2016 at 6:55 AM, Andrea Arcangeli
> wrote:
>>
>> Running page faults that late in the exit path with signal disabled
>> was frankly unexpected.
>
> I agree that it's less than wonderful.
>
>>Apparently it's not just
>> PF_EXITING that
There are some read modes for flash, such as NORMAL, FAST,
QUAD, DDR QUAD. These modes will use the identical lut table base
So rename SEQID_QUAD_READ to SEQID_READ.
Signed-off-by: Yunhui Cui
Signed-off-by: Yunhui Cui
---
There are some read modes for flash, such as NORMAL, FAST,
QUAD, DDR QUAD. These modes will use the identical lut table base
So rename SEQID_QUAD_READ to SEQID_READ.
Signed-off-by: Yunhui Cui
Signed-off-by: Yunhui Cui
---
drivers/mtd/spi-nor/fsl-quadspi.c | 8
1 file changed, 4
From: Yunhui Cui
The qspi driver add generic fast-read mode for different
flash venders. There are some different board flash work on
different mode, such fast-read, quad-mode.
Signed-off-by: Yunhui Cui
---
drivers/mtd/spi-nor/fsl-quadspi.c | 21
From: Yunhui Cui
The qspi driver add generic fast-read mode for different
flash venders. There are some different board flash work on
different mode, such fast-read, quad-mode.
Signed-off-by: Yunhui Cui
---
drivers/mtd/spi-nor/fsl-quadspi.c | 21 -
1 file changed, 16
From: Li Zhang
Uptream has supported page parallel initialisation for X86 and the
boot time is improved greately. Some tests have been done for Power.
Here is the result I have done with different memory size.
* 4GB memory:
boot time is as the following:
From: Li Zhang
Parallel initialisation has been enabled for X86,
boot time is improved greatly.
On Power8, for small memory, it is improved greatly.
Here is the result from my test on Power8 platform:
For 4GB memory: 57% is improved
For 50GB memory: 22% is improve
From: Li Zhang
This patch is based on Mel Gorman's old patch in the mailing list,
https://lkml.org/lkml/2015/5/5/280 which is dicussed but it is
fixed with a completion to wait for all memory initialised in
page_alloc_init_late(). It is to fix the oom problem on X86
From: Li Zhang
Uptream has supported page parallel initialisation for X86 and the
boot time is improved greately. Some tests have been done for Power.
Here is the result I have done with different memory size.
* 4GB memory:
boot time is as the following:
with patch vs without patch:
From: Li Zhang
Parallel initialisation has been enabled for X86,
boot time is improved greatly.
On Power8, for small memory, it is improved greatly.
Here is the result from my test on Power8 platform:
For 4GB memory: 57% is improved
For 50GB memory: 22% is improve
Signed-off-by: Li Zhang
---
From: Li Zhang
This patch is based on Mel Gorman's old patch in the mailing list,
https://lkml.org/lkml/2015/5/5/280 which is dicussed but it is
fixed with a completion to wait for all memory initialised in
page_alloc_init_late(). It is to fix the oom problem on X86
with 24TB memory which
Changelog:
1. Implement review comments by Michael
2. The previous version compared _NIP from the
wrong location to check for whether we
are going to a patched location
This applies on top of the patches posted by Michael
Changelog:
1. Implement review comments by Michael
2. The previous version compared _NIP from the
wrong location to check for whether we
are going to a patched location
This applies on top of the patches posted by Michael
* Michael Ellerman [2016-03-03 15:26:53]:
> Move the logic to work out the kernel toc pointer into a header. This is
> a good cleanup, and also means we can use it elsewhere in future.
>
> Reviewed-by: Kamalesh Babulal
> Reviewed-by: Torsten
* Michael Ellerman [2016-03-03 15:26:53]:
> Move the logic to work out the kernel toc pointer into a header. This is
> a good cleanup, and also means we can use it elsewhere in future.
>
> Reviewed-by: Kamalesh Babulal
> Reviewed-by: Torsten Duwe
> Signed-off-by: Michael Ellerman
For the
Raydium I2C touch driver.
Signed-off-by: jeffrey.lin
---
drivers/input/touchscreen/Kconfig | 13 +
drivers/input/touchscreen/Makefile | 1 +
drivers/input/touchscreen/raydium_i2c_ts.c | 953 +
3 files changed, 967
Raydium I2C touch driver.
Signed-off-by: jeffrey.lin
---
drivers/input/touchscreen/Kconfig | 13 +
drivers/input/touchscreen/Makefile | 1 +
drivers/input/touchscreen/raydium_i2c_ts.c | 953 +
3 files changed, 967 insertions(+)
create mode 100644
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
---
drivers/extcon/extcon-usb-gpio.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
---
drivers/extcon/extcon-usb-gpio.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/extcon/extcon-usb-gpio.c
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-usb-gpio.c
In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.
This patch adds the support for USB GPIO controlled port mux.
Signed-off-by: David Cohen
Signed-off-by: Lu Baolu
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon-usb-gpio.c
index
In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.
This patch adds the support for USB GPIO controlled port mux.
Signed-off-by: David Cohen
Signed-off-by: Lu Baolu
Reviewed-by: Heikki Krogerus
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus
Signed-off-by: Lu Baolu
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
A usb port mux could be abstracted as the following elements:
1) mux state: HOST or PERIPHERAL;
2) an extcon cable which triggers the change of mux state between
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus
Signed-off-by: Lu Baolu
Signed-off-by: Wu Hao
Reviewed-by: Felipe
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
A usb port mux could be abstracted as the following elements:
1) mux state: HOST or PERIPHERAL;
2) an extcon cable which triggers the change of mux state between
Intel SOC chips are featured with USB dual role. The host role is
provided by Intel xHCI IP, and the gadget role is provided by IP
from designware. Tablet platform designs always share a single
port for both host and gadget controllers. There is a mux to
switch the port to the right controller
Intel SOC chips are featured with USB dual role. The host role is
provided by Intel xHCI IP, and the gadget role is provided by IP
from designware. Tablet platform designs always share a single
port for both host and gadget controllers. There is a mux to
switch the port to the right controller
Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides both USB ID
extcon device and a USB port mux device. This MFD driver will
split the 2 devices for their respective drivers.
Signed-off-by: Lu Baolu
In some Intel platforms, a single usb port is shared between USB host
and device controllers. The shared port is under control of a switch
which is defined in the Intel vendor defined extended capability for
xHCI.
This patch adds the support to detect and create the platform device
for the port
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