On Fri, Mar 04, 2016 at 03:49:37PM +, Li, Liang Z wrote:
> > > > > > > Only detect the unmapped/zero mapped pages is not enough.
> > > > Consider
> > > > > > the
> > > > > > > situation like case 2, it can't achieve the same result.
> > > > > >
> > > > > > Your case 2 doesn't exist in the real
On Fri, Mar 04, 2016 at 03:49:37PM +, Li, Liang Z wrote:
> > > > > > > Only detect the unmapped/zero mapped pages is not enough.
> > > > Consider
> > > > > > the
> > > > > > > situation like case 2, it can't achieve the same result.
> > > > > >
> > > > > > Your case 2 doesn't exist in the real
On Fri, Mar 04, 2016 at 09:09:40PM -0500, James Simmons wrote:
> This batch merges the remaining LNet patches from the OpenSFS
> branch for the upstream client. Once merged the LNet code
> will be up to date with the latest production code. Only style
> issues are remaining. Still future patches
On Fri, Mar 04, 2016 at 09:09:40PM -0500, James Simmons wrote:
> This batch merges the remaining LNet patches from the OpenSFS
> branch for the upstream client. Once merged the LNet code
> will be up to date with the latest production code. Only style
> issues are remaining. Still future patches
On Sat, Mar 05, 2016 at 11:28:45AM -0500, Michal Nazarewicz wrote:
> >> On Wed, Mar 02 2016, Felipe F. Tonello wrote:
> >>> @@ -16,7 +16,7 @@
> >>> * Copyright (C) 2006 Thumtronics Pty Ltd.
> >>> * Ben Williamson
> >>> *
> >>> - * Licensed under the
On Sat, Mar 05, 2016 at 11:28:45AM -0500, Michal Nazarewicz wrote:
> >> On Wed, Mar 02 2016, Felipe F. Tonello wrote:
> >>> @@ -16,7 +16,7 @@
> >>> * Copyright (C) 2006 Thumtronics Pty Ltd.
> >>> * Ben Williamson
> >>> *
> >>> - * Licensed under the GPL-2 or later.
> >>> + * Licensed
On 04/03/16 01:05, Krzysztof Kozlowski wrote:
> The devres.o gets linked if HAS_IOMEM is present so on ARCH=um
> allyesconfig (COMPILE_TEST) failed with:
>
> drivers/built-in.o: In function `at91_adc_probe':
> at91-sama5d2_adc.c:(.text+0x48f548): undefined reference to
> `devm_ioremap_resource'
On 04/03/16 01:05, Krzysztof Kozlowski wrote:
> The devres.o gets linked if HAS_IOMEM is present so on ARCH=um
> allyesconfig (COMPILE_TEST) failed with:
>
> drivers/built-in.o: In function `at91_adc_probe':
> at91-sama5d2_adc.c:(.text+0x48f548): undefined reference to
> `devm_ioremap_resource'
Hi Jan,
The description is not enough. A list what kind of changes you applied
would be nice.
I'd like to have these checkpatch issues fixed:
ERROR: trailing statements should be on next line
#177: FILE: drivers/i2c/busses/i2c-octeon.c:133:
+ while ((tmp & SW_TWSI_V) != 0);
ERROR:
Hi Jan,
The description is not enough. A list what kind of changes you applied
would be nice.
I'd like to have these checkpatch issues fixed:
ERROR: trailing statements should be on next line
#177: FILE: drivers/i2c/busses/i2c-octeon.c:133:
+ while ((tmp & SW_TWSI_V) != 0);
ERROR:
On 03/03/16 12:51, Sudip Mukherjee wrote:
> We are getting build failure with tilepro allmodconfig with the error:
>
> drivers/iio/adc/fsl-imx25-gcq.c:236:4: note: in expansion of macro 'do_div'
> do_div(priv->channel_vref_mv[reg], 1000);
> ^
>
> include/asm-generic/div64.h:198:17: note:
On 03/03/16 12:51, Sudip Mukherjee wrote:
> We are getting build failure with tilepro allmodconfig with the error:
>
> drivers/iio/adc/fsl-imx25-gcq.c:236:4: note: in expansion of macro 'do_div'
> do_div(priv->channel_vref_mv[reg], 1000);
> ^
>
> include/asm-generic/div64.h:198:17: note:
Hi Gregory,
[auto build test ERROR on v4.5-rc6]
[cannot apply to net-next/master robh/for-next next-20160304]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
Hi Gregory,
[auto build test ERROR on v4.5-rc6]
[cannot apply to net-next/master robh/for-next next-20160304]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
> Perhaps it's one to let sit into at least the next cycle (and get some testing
> on those media devices if we can) but, whilst it is fiddly the gains seen in
> individual drivers (like the example Peter put in response to the V4 series)
> make it look worthwhile to me. Also, whilst the
> Perhaps it's one to let sit into at least the next cycle (and get some testing
> on those media devices if we can) but, whilst it is fiddly the gains seen in
> individual drivers (like the example Peter put in response to the V4 series)
> make it look worthwhile to me. Also, whilst the
On Fri, Mar 04, 2016 at 11:59:37PM +0900, Namhyung Kim wrote:
SNIP
> @@ -1150,20 +1159,29 @@ static int hists__hierarchy_insert_entry(struct hists
> *hists,
>struct hist_entry *he)
> {
> struct perf_hpp_fmt *fmt;
> + struct perf_hpp_list_node
On Fri, Mar 04, 2016 at 11:59:37PM +0900, Namhyung Kim wrote:
SNIP
> @@ -1150,20 +1159,29 @@ static int hists__hierarchy_insert_entry(struct hists
> *hists,
>struct hist_entry *he)
> {
> struct perf_hpp_fmt *fmt;
> + struct perf_hpp_list_node
Hi Marcin,
[auto build test ERROR on v4.5-rc6]
[also build test ERROR on next-20160304]
[cannot apply to net-next/master robh/for-next]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
Hi Marcin,
[auto build test ERROR on v4.5-rc6]
[also build test ERROR on next-20160304]
[cannot apply to net-next/master robh/for-next]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
Linus,
please pull sound fixes for v4.5-rc7 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-4.5-rc7
The topmost commit is 790b415c98de62602810b0eedce26f0f9d6ddd78
sound fixes for 4.5-rc7
It's
Linus,
please pull sound fixes for v4.5-rc7 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-4.5-rc7
The topmost commit is 790b415c98de62602810b0eedce26f0f9d6ddd78
sound fixes for 4.5-rc7
It's
On 02/03/16 13:28, Lars-Peter Clausen wrote:
> On 03/01/2016 08:02 PM, Alison Schofield wrote:
>> It is often the case that the driver wants to be sure a device stays
>> in direct mode while it is executing a task or series of tasks. To
>> accomplish this today, the driver performs this sequence:
On 02/03/16 13:28, Lars-Peter Clausen wrote:
> On 03/01/2016 08:02 PM, Alison Schofield wrote:
>> It is often the case that the driver wants to be sure a device stays
>> in direct mode while it is executing a task or series of tasks. To
>> accomplish this today, the driver performs this sequence:
On 02/03/16 17:29, Wolfram Sang wrote:
> On Fri, Jan 08, 2016 at 04:04:48PM +0100, Peter Rosin wrote:
>> From: Peter Rosin
>>
>> Hi!
>>
>> [doing a v3 even if there is no "big picture" feedback yet, but
>> previous versions has bugs that make them harder to test than
>> needed,
On 02/03/16 17:29, Wolfram Sang wrote:
> On Fri, Jan 08, 2016 at 04:04:48PM +0100, Peter Rosin wrote:
>> From: Peter Rosin
>>
>> Hi!
>>
>> [doing a v3 even if there is no "big picture" feedback yet, but
>> previous versions has bugs that make them harder to test than
>> needed, and testing is
CONFIG_PARPORT_PC_SUPERIO toggles Super IO chip support in parport_pc
code, however only code accessing SIO chip via ISA (or LPC) bus
was conditional on it.
This patch makes SIO chip accesses via PCI bus also dependent on
this config option.
It should be noted that Super IO support in parport_pc
CONFIG_PARPORT_PC_SUPERIO toggles Super IO chip support in parport_pc
code, however only code accessing SIO chip via ISA (or LPC) bus
was conditional on it.
This patch makes SIO chip accesses via PCI bus also dependent on
this config option.
It should be noted that Super IO support in parport_pc
On Sat, Mar 05, 2016 at 11:48:45AM +0100, Jörg-Volker Peetz wrote:
> On my HP Pavilion dv7 with hybrid graphics (AMD HD 4200 - AMD 5400) X can't be
> started anymore. When trying to start X with "startx" Xorg freezes to an
> un-killable process before switching to a frame buffer. From another
On Sat, Mar 05, 2016 at 11:48:45AM +0100, Jörg-Volker Peetz wrote:
> On my HP Pavilion dv7 with hybrid graphics (AMD HD 4200 - AMD 5400) X can't be
> started anymore. When trying to start X with "startx" Xorg freezes to an
> un-killable process before switching to a frame buffer. From another
On 03/03/16 08:24, Martin Kepplinger wrote:
> This adds a mode of operation that consumes less power by lesser
> oversampling. It's exposed in IIO sysfs as in_accelX_power_mode, as
> documented.
>
> It consumes roughly half the power the default low_noise mode does.
> See the datasheet for
On 03/03/16 08:24, Martin Kepplinger wrote:
> This adds a mode of operation that consumes less power by lesser
> oversampling. It's exposed in IIO sysfs as in_accelX_power_mode, as
> documented.
>
> It consumes roughly half the power the default low_noise mode does.
> See the datasheet for
CONFIG_NO_HZ currently only sets the default value
of dynticks config so if PPS kernel consumer needs
periodic timer ticks it should depend on
!CONFIG_NO_HZ_COMMON instead of !CONFIG_NO_HZ.
Otherwise it is possible to enable it even on
tickless system which has CONFIG_NO_HZ not set and
CONFIG_NO_HZ currently only sets the default value
of dynticks config so if PPS kernel consumer needs
periodic timer ticks it should depend on
!CONFIG_NO_HZ_COMMON instead of !CONFIG_NO_HZ.
Otherwise it is possible to enable it even on
tickless system which has CONFIG_NO_HZ not set and
CONFIG_SERIAL_8250_RSA has waited for a long
time to have meaningful help text so let's
finally describe what this option actually does.
Signed-off-by: Maciej S. Szmigiero
---
drivers/tty/serial/8250/Kconfig | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
CONFIG_SERIAL_8250_RSA has waited for a long
time to have meaningful help text so let's
finally describe what this option actually does.
Signed-off-by: Maciej S. Szmigiero
---
drivers/tty/serial/8250/Kconfig | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
On 03/03/16 08:24, Martin Kepplinger wrote:
> The devices' config registers can only be changed in standby mode.
> Up until now the driver just held the device *always* active, so for
> changing a config it was *always* necessary to switch to standby.
>
> For upcoming support for runtime pm, the
On 03/03/16 08:24, Martin Kepplinger wrote:
> The devices' config registers can only be changed in standby mode.
> Up until now the driver just held the device *always* active, so for
> changing a config it was *always* necessary to switch to standby.
>
> For upcoming support for runtime pm, the
Hi Tejun,
On Sat, Mar 5, 2016 at 6:22 PM, Tejun Heo wrote:
> Hello, Parav.
>
> On Sat, Mar 05, 2016 at 04:45:09PM +0530, Parav Pandit wrote:
>> Design that remains same from v6 to v10.
>> * spin lock is still fine grained at cgroup level instead of one
>> global shared lock
Hi Linus,
Please consider PULL to recive one minor fix for pxa driver to fix cyclic
dmaengine transfers
The following changes since commit 81f70ba233d5f660e1ea5fe23260ee323af5d53a:
Linux 4.5-rc5 (2016-02-20 13:39:35 -0800)
are available in the git repository at:
Hi Tejun,
On Sat, Mar 5, 2016 at 6:22 PM, Tejun Heo wrote:
> Hello, Parav.
>
> On Sat, Mar 05, 2016 at 04:45:09PM +0530, Parav Pandit wrote:
>> Design that remains same from v6 to v10.
>> * spin lock is still fine grained at cgroup level instead of one
>> global shared lock among all cgroups.
Hi Linus,
Please consider PULL to recive one minor fix for pxa driver to fix cyclic
dmaengine transfers
The following changes since commit 81f70ba233d5f660e1ea5fe23260ee323af5d53a:
Linux 4.5-rc5 (2016-02-20 13:39:35 -0800)
are available in the git repository at:
From: Marcin Wojtas
Buffer manager (BM) is a dedicated hardware unit that can be used by all
ethernet ports of Armada XP and 38x SoC's. It allows to offload CPU on RX
path by sparing DRAM access on refilling buffer pool, hardware-based
filling of descriptor ring data and
From: Marcin Wojtas
Buffer manager (BM) is a dedicated hardware unit that can be used by all
ethernet ports of Armada XP and 38x SoC's. It allows to offload CPU on RX
path by sparing DRAM access on refilling buffer pool, hardware-based
filling of descriptor ring data and better memory
From: Marcin Wojtas
Since mvneta driver supports using hardware buffer management (BM), in
order to use it, board files have to be adjusted accordingly. This commit
enables BM on AXP-DB and AXP-GP in same manner - because number of ports
on those boards is the same as number
This basic implementation allows to share code between driver using
hardware buffer management. As the code is hardware agnostic, there is
few helpers, most of the optimization brought by the an HW BM has to be
done at driver level.
Signed-off-by: Gregory CLEMENT
This is a third version of an API set for HW Buffer management that I
initially submit here:
http://thread.gmane.org/gmane.linux.kernel/2125152
Since the last version I took into account David's remarks:
- I made a HWBM and a SWBM version of the mvneta_rx() function in
order to reduce the the
Now that the hardware buffer management framework had been introduced,
let's use it.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/Kconfig | 1 +
drivers/net/ethernet/marvell/mvneta.c| 38 +++--
On 03/03/16 08:24, Martin Kepplinger wrote:
> fix checkpatch issues like "space before tabs", too long lines or alignment.
>
> Signed-off-by: Martin Kepplinger
> Signed-off-by: Christoph Muellner
Applied to the togreg branch of
From: Marcin Wojtas
This commit enables finding appropriate mbus window and obtaining its
target id and attribute for given physical address in two separate
routines, both for IO and DRAM windows. This functionality
is needed for Armada XP/38x Network Controller's Buffer
This basic implementation allows to share code between driver using
hardware buffer management. As the code is hardware agnostic, there is
few helpers, most of the optimization brought by the an HW BM has to be
done at driver level.
Signed-off-by: Gregory CLEMENT
---
include/net/hwbm.h | 21
This is a third version of an API set for HW Buffer management that I
initially submit here:
http://thread.gmane.org/gmane.linux.kernel/2125152
Since the last version I took into account David's remarks:
- I made a HWBM and a SWBM version of the mvneta_rx() function in
order to reduce the the
Now that the hardware buffer management framework had been introduced,
let's use it.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/Kconfig | 1 +
drivers/net/ethernet/marvell/mvneta.c| 38 +++--
drivers/net/ethernet/marvell/mvneta_bm.c | 140
On 03/03/16 08:24, Martin Kepplinger wrote:
> fix checkpatch issues like "space before tabs", too long lines or alignment.
>
> Signed-off-by: Martin Kepplinger
> Signed-off-by: Christoph Muellner
Applied to the togreg branch of iio.git - initially pushed out as testing.
Thanks,
Jonathan
> ---
From: Marcin Wojtas
This commit enables finding appropriate mbus window and obtaining its
target id and attribute for given physical address in two separate
routines, both for IO and DRAM windows. This functionality
is needed for Armada XP/38x Network Controller's Buffer Manager and
PnC
From: Marcin Wojtas
Since mvneta driver supports using hardware buffer management (BM), in
order to use it, board files have to be adjusted accordingly. This commit
enables BM on AXP-DB and AXP-GP in same manner - because number of ports
on those boards is the same as number of possible pools,
From: Marcin Wojtas
Since mvneta driver supports using hardware buffer management (BM), in
order to use it, board files have to be adjusted accordingly. This commit
enables BM on:
* A385-DB-AP - each port has its own pool for long and common pool for
short packets,
*
Allow Openblock AX3 using hardware buffer management with mvneta.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git
Allow Openblock AX3 using hardware buffer management with mvneta.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
From: Marcin Wojtas
Since mvneta driver supports using hardware buffer management (BM), in
order to use it, board files have to be adjusted accordingly. This commit
enables BM on:
* A385-DB-AP - each port has its own pool for long and common pool for
short packets,
* A388-ClearFog - same as
From: Marcin Wojtas
Armada XP network controller supports hardware buffer management (BM).
Since it is now enabled in mvneta driver, appropriate nodes can be added
to armada-xp.dtsi - for the actual common BM unit (bm@c) and its
internal SRAM (bm-bppi), which is used for
From: Marcin Wojtas
Armada XP network controller supports hardware buffer management (BM).
Since it is now enabled in mvneta driver, appropriate nodes can be added
to armada-xp.dtsi - for the actual common BM unit (bm@c) and its
internal SRAM (bm-bppi), which is used for indirect access to
From: Marcin Wojtas
Armada 38x network controller supports hardware buffer management (BM).
Since it is now enabled in mvneta driver, appropriate nodes can be added
to armada-38x.dtsi - for the actual common BM unit (bm@c8000) and its
internal SRAM (bm-bppi), which is used for
From: Marcin Wojtas
Armada 38x network controller supports hardware buffer management (BM).
Since it is now enabled in mvneta driver, appropriate nodes can be added
to armada-38x.dtsi - for the actual common BM unit (bm@c8000) and its
internal SRAM (bm-bppi), which is used for indirect access to
On Sat, Mar 05, 2016 at 02:50:06PM +0100, Ingo Molnar wrote:
> A more workable method would be to have a test .c file that includes all UAPI
> structures in existence and defines a variable out of every single one, and
> then
> generates a list of sizeof() values or so. But even that isn't
On Sat, Mar 05, 2016 at 02:50:06PM +0100, Ingo Molnar wrote:
> A more workable method would be to have a test .c file that includes all UAPI
> structures in existence and defines a variable out of every single one, and
> then
> generates a list of sizeof() values or so. But even that isn't
On Wed, Mar 2, 2016 at 2:00 AM, Stephen Boyd wrote:
> This flag is a no-op now. Remove usage of the flag.
>
> Cc: Pawel Moll
> Cc: Linus Walleij
> Signed-off-by: Stephen Boyd
Acked-by: Linus Walleij
On Wed, Mar 2, 2016 at 2:00 AM, Stephen Boyd wrote:
> This flag is a no-op now. Remove usage of the flag.
>
> Cc: Pawel Moll
> Cc: Linus Walleij
> Signed-off-by: Stephen Boyd
Acked-by: Linus Walleij
Yours,
Linus Walleij
On Sat, Mar 05, 2016 at 12:18:54AM +0100, Rafael J. Wysocki wrote:
> >>> Even if there are platforms which may change the CPU frequency behind
> >>> cpufreq's back, breaking the transition notifiers, I'm worried about the
> >>> addition of an interface which itself breaks them. The platforms
On Sat, Mar 05, 2016 at 12:18:54AM +0100, Rafael J. Wysocki wrote:
> >>> Even if there are platforms which may change the CPU frequency behind
> >>> cpufreq's back, breaking the transition notifiers, I'm worried about the
> >>> addition of an interface which itself breaks them. The platforms
On Fri, 2016-03-04 at 17:23 -0800, Dmitry Torokhov wrote:
> This is a driver for ACPI-based keyboard backlight LEDs found on
> Chromebooks. The driver locates \\_SB.KBLT ACPI device and exports
> backlight as "chromeos::kbd_backlight" LED class device in sysfs.
>
> Signed-off-by: Simon Que
On Fri, 2016-03-04 at 17:23 -0800, Dmitry Torokhov wrote:
> This is a driver for ACPI-based keyboard backlight LEDs found on
> Chromebooks. The driver locates \\_SB.KBLT ACPI device and exports
> backlight as "chromeos::kbd_backlight" LED class device in sysfs.
>
> Signed-off-by: Simon Que
>
>> On Wed, Mar 02 2016, Felipe F. Tonello wrote:
>>> @@ -16,7 +16,7 @@
>>> * Copyright (C) 2006 Thumtronics Pty Ltd.
>>> * Ben Williamson
>>> *
>>> - * Licensed under the GPL-2 or later.
>>> + * Licensed under the GPLv2.
> On March 4, 2016 7:17:31 PM
>> On Wed, Mar 02 2016, Felipe F. Tonello wrote:
>>> @@ -16,7 +16,7 @@
>>> * Copyright (C) 2006 Thumtronics Pty Ltd.
>>> * Ben Williamson
>>> *
>>> - * Licensed under the GPL-2 or later.
>>> + * Licensed under the GPLv2.
> On March 4, 2016 7:17:31 PM GMT+00:00, Michal Nazarewicz
>
Hello,
On Sat, Mar 5, 2016 at 11:43 PM, Vishnu Patekar
wrote:
> This patch adds Kconfig for sunxi clocks.
> Currently, only sun8i-apb0 and sun9i-cpus clocks are added.
> It'll help to use common clocks across different SOCs.
> We can switch to kconfig for other
Hello,
On Sat, Mar 5, 2016 at 11:43 PM, Vishnu Patekar
wrote:
> This patch adds Kconfig for sunxi clocks.
> Currently, only sun8i-apb0 and sun9i-cpus clocks are added.
> It'll help to use common clocks across different SOCs.
> We can switch to kconfig for other clocks in future.
>
>
From: Joe Perches
Date: Fri, 4 Mar 2016 21:23:44 -0800
> Kernel style prefers "unsigned int " over "unsigned "
> and "signed int " over "signed ".
>
> Emit a warning for these simple signed/unsigned declarations.
> Fix it too if desired.
>
> Signed-off-by: Joe Perches
From: Joe Perches
Date: Fri, 4 Mar 2016 21:23:44 -0800
> Kernel style prefers "unsigned int " over "unsigned "
> and "signed int " over "signed ".
>
> Emit a warning for these simple signed/unsigned declarations.
> Fix it too if desired.
>
> Signed-off-by: Joe Perches
Acked-by: David S.
Hi David,
On Fri, Mar 04, 2016 at 02:31:47PM -0800, David Daney wrote:
> From: David Daney
>
> The root complexes used to access off-chip PCIe devices (called PEM
> units in the hardware manuals) on some Cavium ThunderX processors
> require quirky access methods for the
Hi David,
On Fri, Mar 04, 2016 at 02:31:47PM -0800, David Daney wrote:
> From: David Daney
>
> The root complexes used to access off-chip PCIe devices (called PEM
> units in the hardware manuals) on some Cavium ThunderX processors
> require quirky access methods for the config space of the PCIe
On 5 March 2016 at 03:47, Wim Van Sebroeck wrote:
> Hi Fu,
>
>> From: Fu Wei
>>
>> This patchset:
>> (1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt
>> for FDT info of SBSA Generic Watchdog, and give two examples of
>> adding
On 5 March 2016 at 03:47, Wim Van Sebroeck wrote:
> Hi Fu,
>
>> From: Fu Wei
>>
>> This patchset:
>> (1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt
>> for FDT info of SBSA Generic Watchdog, and give two examples of
>> adding SBSA Generic Watchdog device node
A83T mmc is compatible with earliers sunxi socs.
This adds mmc0, mmc1, and mmc2 controller nodes for A83T.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++
1 file changed, 57 insertions(+)
diff --git
A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as
Card Detect pin., so use PF6 as reference design CD pin in dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git
A83T mmc is compatible with earliers sunxi socs.
This adds mmc0, mmc1, and mmc2 controller nodes for A83T.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++
1 file changed, 57 insertions(+)
diff --git
A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as
Card Detect pin., so use PF6 as reference design CD pin in dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A83T dtsi.
Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.
Signed-off-by: Vishnu Patekar
---
This enables mmc0.
Signed-off-by: Vishnu Patekar
Tested-by: LABBE Corentin
---
arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git
This adds A83T PRCM related clocks, clock resets.
As a83t apb0 gates clock support is added earlier, this enables it.
Apart from apb0 gates, other added clocks are compatible with
earlier sun8i socs.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A83T dtsi.
Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 21
This enables mmc0.
Signed-off-by: Vishnu Patekar
Tested-by: LABBE Corentin
---
arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
This adds A83T PRCM related clocks, clock resets.
As a83t apb0 gates clock support is added earlier, this enables it.
Apart from apb0 gates, other added clocks are compatible with
earlier sun8i socs.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi |
This patch adds support for Sinovoip BPI-M3 A83T based board.
It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI,
mic, AP6212 Wifi, etc on it.
It is paired with AXP813 PMIC which is almost same as AXP818.
Signed-off-by: Vishnu Patekar
---
Now that we have a driver for the R_PIO controller,
add the corresponding device node to the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
This patch adds Kconfig for sunxi clocks.
Currently, only sun8i-apb0 and sun9i-cpus clocks are added.
It'll help to use common clocks across different SOCs.
We can switch to kconfig for other clocks in future.
Signed-off-by: Vishnu Patekar
---
drivers/clk/Kconfig
This patch adds support for Sinovoip BPI-M3 A83T based board.
It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI,
mic, AP6212 Wifi, etc on it.
It is paired with AXP813 PMIC which is almost same as AXP818.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/Makefile
Now that we have a driver for the R_PIO controller,
add the corresponding device node to the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
This patch adds Kconfig for sunxi clocks.
Currently, only sun8i-apb0 and sun9i-cpus clocks are added.
It'll help to use common clocks across different SOCs.
We can switch to kconfig for other clocks in future.
Signed-off-by: Vishnu Patekar
---
drivers/clk/Kconfig| 1 +
APB1 is similar to sun4i-a10-apb0-clk, except different dividers.
This adds support for apb1 on A83T.
Signed-off-by: Vishnu Patekar
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/clk-sunxi.c
This adds A83T system bus clocks, bus gates, and clock resets.
Three ahb reset registers are combined into one node.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 114 +-
1 file changed, 112 insertions(+),
201 - 300 of 498 matches
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