Base code to enable qspinlock on powerpc. this patch add some #ifdef
here and there. Although there is no paravirt related code, we can
successfully build a qspinlock kernel after apply this patch.
Signed-off-by: Pan Xinhui
---
arch/powerpc/include/asm/qspinlock.h | 22 +
pv-qspinlock core has pv_wait/pv_kick which will give a better
performace by yielding and kicking cpu at some cases.
lets support them by adding two corresponding helper functions.
Signed-off-by: Pan Xinhui
---
arch/powerpc/include/asm/spinlock.h | 4
arch/powerpc/lib/locks.c|
pseries can use pv-qspinlock.
Signed-off-by: Pan Xinhui
---
arch/powerpc/kernel/Makefile | 1 +
arch/powerpc/platforms/pseries/Kconfig | 8
2 files changed, 9 insertions(+)
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 2da380f..ae7c2f1 100644
pseries will use qspinlock by default.
Signed-off-by: Pan Xinhui
---
arch/powerpc/platforms/pseries/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/platforms/pseries/Kconfig
b/arch/powerpc/platforms/pseries/Kconfig
index bec90fb..f669323 100644
--- a/arch/powerpc/platfo
cmpxchg_release is lighter, we can gain a better performace then.
Suggested-by: Boqun Feng
Signed-off-by: Pan Xinhui
---
kernel/locking/qspinlock_paravirt.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/locking/qspinlock_paravirt.h
b/kernel/locking/qspinlock_paravi
On Tue, May 17, 2016 at 09:05:01AM +0200, Daniel Vetter wrote:
> On Thu, May 12, 2016 at 09:36:14PM +0300, Ville Syrjälä wrote:
> > On Thu, May 12, 2016 at 08:25:23PM +0200, Noralf Trønnes wrote:
> > > Provides helper functions for drivers that have a simple display
> > > pipeline. Plane, crtc and
Add static keyword to intel_bdw_event_constraints, snb_events_attrs,
nhm_events_attrs, intel_skl_event_constraints arrays.
Signed-off-by: Lukasz Odzioba
---
arch/x86/events/intel/core.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arc
Due to change in register definition we need to update OCR mask.
MSR_OFFCORE_RESP0 reserved bits: 3,4,18,29,30,33,34, 8,11,14
MSR_OFFCORE_RESP1 reserved bits: 3,4,18,29,30,33,34, 38
Reported-by: Andi Kleen
Signed-off-by: Lukasz Odzioba
---
arch/x86/events/intel/core.c | 6 ++
1 file changed
Hi Arnd
I have already send a fix for this on the mailing list on 12th may
([PATCH 0/2] pinctrl: stm32: .pin_config_dbg_show fixes).
I don't know if Linus will merged it on his pinctrl branch.
Sorry
Patrice
On 05/13/2016 03:53 PM, Arnd Bergmann wrote:
The newly added stm32_pconf_dbg_show fu
There's a race window between checking page->flags and unpoisoning, which
taints kernel with "BUG: Bad page state". That's overkill. It's safer to
use bad_flags to detect hwpoisoned page.
Signed-off-by: Naoya Horiguchi
---
mm/page_alloc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Hi
> -Original Message-
> From: Roger Quadros [mailto:rog...@ti.com]
> Sent: Monday, May 16, 2016 5:52 PM
> To: Peter Chen
> Cc: peter.c...@freescale.com; ba...@kernel.org; t...@atomide.com;
> gre...@linuxfoundation.org; dan.j.willi...@intel.com;
> mathias.ny...@linux.intel.com; joao.pi..
On 16/05/16 16:32, Arnaldo Carvalho de Melo wrote:
> Em Fri, May 13, 2016 at 08:51:49AM +, He Kuang escreveu:
>> There's a problem in machine__findnew_vdso(), vdso buildid generated
>> by a 32-bit machine stores it with the name 'vdso', but when
>> processing buildid on a 64-bit machine with th
Linus,
please pull the latest irq-core-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq-core-for-linus
This update delivers:
- Yet another interrupt chip diver (LPC32xx)
- Core functions to handle partitioned per-cpu interrupts
- Enhancements to th
On 13/05/16 11:51, He Kuang wrote:
> There's a problem in machine__findnew_vdso(), vdso buildid generated
> by a 32-bit machine stores it with the name 'vdso', but when
> processing buildid on a 64-bit machine with the same 'perf.data', perf
> will search for vdso named as 'vdso32' and get failed.
Since we have now moved the include directories over to
include/linux/visorbus this patch makes all of visorbus
use the new include folders.
Signed-off-by: David Kershner
---
drivers/staging/unisys/visorbus/controlvmchannel.h | 2 +-
drivers/staging/unisys/visorbus/periodic_work.c| 3 +--
This patchset moves the visorbus driver (fromdrivers/staging/unisys/visorbus)
and its dependent headers files (from drivers/staging/unisys/include)
out of staging into the main kernel tree.
The visorbus driver is a bus driver for various paravirtualized devices
presented within a Unisys s-Par gues
Update include/linux to include the s-Par associated common include
header files needed for the s-Par visorbus.
Signed-off-by: David Kershner
---
include/linux/visorbus/channel.h | 572 +++
include/linux/visorbus/channel_guid.h| 55 +++
include/linux/viso
Only visorbus needs this header file so move it to visorbus
directory.
Signed-off-by: David Kershner
---
drivers/staging/unisys/include/vbushelper.h | 46
drivers/staging/unisys/visorbus/vbushelper.h | 46
2 files changed, 46 insertions(
This patch simple does a git mv of the
drivers/staging/unisys/Documentation directory to Documentation. Renames
overview.txt to visorbus.txt and renames sysfs-platform-visorchipset to
the correct name sysfs-bus-visorbus.
Signed-off-by: David Kershner
---
Documentation/ABI/stable/sysfs-bus-visorb
tip-bot for Alexander Shishkin writes:
> Commit-ID: ab92b232ae05c382c3df0e3d6a5c6d16b639ac8c
> Gitweb: http://git.kernel.org/tip/ab92b232ae05c382c3df0e3d6a5c6d16b639ac8c
> Author: Alexander Shishkin
> AuthorDate: Tue, 10 May 2016 16:18:32 +0300
> Committer: Ingo Molnar
> CommitDate: T
Linus,
please pull the latest timers-core-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
timers-core-for-linus
A rather small set of patches from the timer departement:
- Some more y2038 work
- Yet another new clocksource driver
- The usual set of s
Although unbinding a driver requires root privileges but it still might
be used theoretically in certain attacks (by triggering NULL pointer
exception or memory corruption if driver does not provide proper remove
callbacks or core does not handle it).
Samsung clock drivers are essential for system
Hi,
2016-05-16 17:04 GMT+02:00 Rob Herring :
> On Wed, May 11, 2016 at 05:36:10PM +0200, M'boumba Cedric Madianga wrote:
>> This patch adds documentation of device tree bindings for the STM32 I2C
>> controller.
>>
>> Signed-off-by: M'boumba Cedric Madianga
>> ---
>> .../devicetree/bindings/i2c/
On 05/17/2016 09:03 AM, Geert Uytterhoeven wrote:
[...]
Someone's not gonna be happy with commit 606b5908 ("bpf: split
HAVE_BPF_JIT into cBPF and eBPF variant") breaking the sort order again...
Wasn't aware of that. Maybe I'm missing something, but there appears
to be no throughout consiste
On Thu, May 12, 2016 at 07:06:56PM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
Applied to drm-misc, thanks.
-Daniel
> ---
> drivers/gpu/drm/qxl/qxl_fb.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/qxl/qxl_fb.c b/drivers/gpu/drm/qxl/qxl_fb.c
> inde
On Mon 16-05-16 13:32:28, Linus Torvalds wrote:
> On Mon, May 16, 2016 at 7:55 AM, Ingo Molnar wrote:
> >
> > This tree, by Michal Hocko, implements down_write_killable(). The main
> > usecase
> > will be to update mm_sem usage sites to use this new API,
>
> Hmm. Is somebody (Michal?) looking at
On Thu, May 12, 2016 at 08:25:22PM +0200, Noralf Trønnes wrote:
> Add drm_fb_cma_create_with_funcs() for drivers that need to set the
> dirty() callback.
>
> Signed-off-by: Noralf Trønnes
> Acked-by: Laurent Pinchart
Merged the first 2 patches to drm-misc, thanks.
-Daniel
> ---
>
> Changes si
On Mon 16-05-16 15:36:56, Andrew Morton wrote:
> On Mon, 16 May 2016 16:23:33 +0200 Michal Hocko wrote:
>
> > Andrew, I think that the following is more straightforward fix and
> > should be folded in to the patch which has introduced vmstat_refresh.
> > ---
> > >From b8dd18fb7df040e1bfe61aadde1d
Once the linear memory space has been mapped with 8Mb pages, as
seen in the related commit, we get 11 millions DTLB missed during
the reference 600s period. 77% of the misses are on user addresses
and 23% are on kernel addresses (1 fourth for linear address space
and 3 fourth for virtual address sp
CONFIG_PIN_TLB maps IMMR area and the first 24 Mbytes of memory.
In some circunstances it might be more interesting to not map
IMMR but map 32 Mbytes of memory instead.
Therefore we add config option CONFIG_PIN_TLB_IMMR to select if
IMMR shall be pinned or not, hence whether we pin 24 or 32 Mbytes
IMMR is now mapped by a fixed 512k page managed by the TLB miss
handler so it is not anymore necessary to PIN TLBs
Signed-off-by: Christophe Leroy
---
v2: No change
v3: No change
arch/powerpc/Kconfig.debug | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/Kconfig.debug b/arch/powe
On Thu, May 12, 2016 at 09:36:14PM +0300, Ville Syrjälä wrote:
> On Thu, May 12, 2016 at 08:25:23PM +0200, Noralf Trønnes wrote:
> > Provides helper functions for drivers that have a simple display
> > pipeline. Plane, crtc and encoder are collapsed into one entity.
> >
> > Cc: jsa...@ti.com
> > S
Bootloader may have pinned some TLB entries so the kernel must
unpin them before flushing TLBs with tlbia otherwise pinned TLB
entries won't get flushed
Signed-off-by: Christophe Leroy
---
v2: No change
v3: No change
arch/powerpc/kernel/head_8xx.S | 18 ++
1 file changed, 10 ins
On Tue, May 17, 2016 at 2:24 AM, Stephen Rothwell wrote:
>
> Today's linux-next merge of the net-next tree got a conflict in:
>
> arch/arm64/Kconfig
>
> between commit:
>
> 8ee708792e1c ("arm64: Kconfig: remove redundant
> HAVE_ARCH_TRANSPARENT_HUGEPAGE definition")
>
> from the arm64 tree an
On recent kernels, with some debug options like for instance
CONFIG_LOCKDEP, the BSS requires more than 8M memory, allthough
the kernel code fits in the first 8M.
Today, it is necessary to activate CONFIG_PIN_TLB to get more than 8M
at startup, allthough pinning TLB is not necessary for that.
We c
Instead of using the first level page table to define mappings for
the linear memory space, we can use direct mapping from the TLB
handling routines. This has several advantages:
* No need to read the tables at each TLB miss
* No issue in 16k pages mode where the 1st level table maps 64 Mbytes
The
Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
648K rodata, 508K init, 290K bss, 6644K reserved)
Kernel virtual memory layout:
* 0xfffdf000..0xf000 : fixmap
* 0xfde0..0xfe00 : consistent mem
* 0xfddf6000..0xfde0 : early ioremap
* 0xc900..0xfddf6000
The purpose of this set of patches is to continue on TLB handling
optimisation on the 8xx with the handling of IMMR area as a
single 512k area instead of multiple 4k pages.
This set includes a rework of linear RAM mapping in order to not use
page table but direct linear mapping. The result is equi
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