This patch added a new verbs that is getting port immutable.
It is added in the 4.5 kernel and latest. It is necessary to
solve the fail questions for registering ib device.
Signed-off-by: Wei Hu
Signed-off-by: Lijun Ou
---
drivers/infiniband/hw/hns/hns_roce_main.c | 22 ++
On Thu, May 12, 2016 at 7:05 AM, Kefeng Wang wrote:
> The arch code calls of_platform_populate() with default match table
> when it want to populate default bus.
>
> This patch introduce a new of_platform_default_populate_init() and make it
> arch_initcall_sync(it should be later than some iommu c
This patch mainly setup hca for RoCE. It will do a series of
initial works, as follows:
1. init uar table, allocate uar resource
2. init pd table
3. init cq table
4. init mr table
5. init qp table
Signed-off-by: Wei Hu
Signed-off-by: Nenglong Zhao
Signed-off-by: Lijun Ou
---
This patch was for implementing of address handle operations.
It includes three verbs that create ah, query ah and destroy
ah. They is completed independently by RoCE driver.
Signed-off-by: Wei Hu
Signed-off-by: Nenglong Zhao
Signed-off-by: Lijun Ou
---
drivers/infiniband/hw/hns/hns_roce_ah.c
This patch was mainly for implementing of memory region.
Memory Registration provides mechanisms that allow consumers
to describe a set of virtually contiguous memory locations or
a set of physically contiguous memory locations.
MR operations includes as follows:
1. get dma MR in kernel mode
This patch mainly configured some profile resoure. For example,
vendor_id, hardware version, and some data structure sizes so on.
Signed-off-by: Wei Hu
Signed-off-by: Nenglong Zhao
Signed-off-by: Lijun Ou
---
drivers/infiniband/hw/hns/hns_roce_common.h | 47 +
drivers/infiniban
The HiSilicon Network Substem is a long term evolution IP which is
supposed to be used in HiSilicon ICT SoCs. HNS (HiSilicon Network
Sybsystem) also has a hardware support of performing RDMA with
RoCEE.
The driver for HiSilicon RoCEE(RoCE Engine) is a platform driver and
will support mulitple versi
This patch added the operation for cmd, and added some functions
for initializing eq table and selecting cmd mode.
Signed-off-by: Wei Hu
Signed-off-by: Nenglong Zhao
Signed-off-by: Lijun Ou
---
drivers/infiniband/hw/hns/hns_roce_cmd.c| 119
drivers/infiniband/h
This patch added maintainers for RoCE driver.
Signed-off-by: Wei Hu
Signed-off-by: Lijun Ou
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5f83015..ba23a81 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10121,6 +10121,14 @@ W: htt
It added reset function for RoCE driver. RoCE is a feature of hns.
In hip06 SoC, in RoCE reset process, it's needed to configure dsaf
channel reset, port and sl map info. Reset function of RoCE is
located in dsaf module, we only call it in RoCE driver when needed.
Signed-off-by: Wei Hu
Signed-off
On Wed, May 25, 2016 at 04:20:56PM +0200, Oliver Neukum wrote:
> On Wed, 2016-05-25 at 17:04 +0300, Heikki Krogerus wrote:
>
> > I'm not against leaving the responsibility of registering the alternate
> > modes to the drivers. I'm a little bit worried about relying then on
> > the drivers to also
Hello Pankaj,
On 05/25/2016 04:33 AM, pankaj.dubey wrote:
> Hi Javier,
>
> On Friday 29 April 2016 12:51 AM, Javier Martinez Canillas wrote:
>> The MFC nodes with the memory regions reserved for memory allocations
>> are missing in the Exynos5420 Peach Pit and Exynos5800 Peach Pi DTS.
>>
>> This
The cfs_rq->avg.last_update_time is initialize to 0 with the main effect
that the 1st sched_entity that will be attached, will keep its
last_update_time set to 0 and will attached once again during the
enqueue.
Initialize cfs_rq->avg.last_update_time to 1 instead.
Signed-off-by: Vincent Guittot
-
This patch registered IB device when loaded, and unregistered
IB device when removed.
Signed-off-by: Wei Hu
Signed-off-by: Nenglong Zhao
Signed-off-by: Lijun Ou
---
drivers/infiniband/hw/hns/hns_roce_main.c | 47 +++
1 file changed, 47 insertions(+)
diff --git a/dr
From: Ganapatrao Kulkarni
The erratum fixes the hang of ITS SYNC command by avoiding inter node
io and collections/cpu mapping on thunderx dual-socket platform.
This fix is only applicable for Cavium's ThunderX dual-socket platform.
This is based on NUMA upstream patches (Linus tree
v4.6-10530-
This patch mainly initialized the RoCE engine. It is absolutely
necessary to run RoCE. It mainly includes that configure DMAE
user, initialize doorbell and raq operations, enable port.
Signed-off-by: Wei Hu
Signed-off-by: Nenglong Zhao
Signed-off-by: Lijun Ou
---
drivers/infiniband/hw/hns/hns_
Both the INTx and MSI/X disable paths do an eventfd_ctx_put() for the
trigger eventfd before calling vfio_virqfd_disable() any potential
mask and unmask eventfds. This opens a use-after-free race where an
inopportune irqfd can reference the freed signalling eventfd. Reorder
to avoid this possibil
On 05/05/16 15:24, Dmitry Osipenko wrote:
> Hello, Jon!
>
> On 05.05.2016 16:17, Jon Hunter wrote:
>>
>> Thanks for the report. I have been unable to reproduce this, but then I
>> don't see my tegra20 entering LP2 during cpuidle. I did force my tegra20
>> into LP2 during suspend which will exerci
On Wed, May 25, 2016 at 02:28:46PM +0300, Heikki Krogerus wrote:
> Hi,
>
> On Tue, May 24, 2016 at 02:51:40PM +0200, Oliver Neukum wrote:
> > On Thu, 2016-05-19 at 15:44 +0300, Heikki Krogerus wrote:
> >
> > Hi,
> >
> > as this discussion seems to go in circles, I am starting anew
> > at the top
On Wed, 2016-05-25 at 23:05 +0800, Lijun Ou wrote:
> This patch added maintainers for RoCE driver.
Please add sections in alphabetic order.
> diff --git a/MAINTAINERS b/MAINTAINERS
[]
> @@ -10121,6 +10121,14 @@ W: http://www.emulex.com
> S: Supported
> F: drivers/infiniband/hw/ocrdma/
>
>From below commits, kexec.c is split to kexec.c, kexec_file.c and
kexec_core.c.
commit a43cac0d9dc2 ("kexec: split kexec_file syscall code to
kexec_file.c")
commit 2965faa5e03d ("kexec: split kexec_load syscall from kexec core
code")
Both kexec_file.c and kexec_core.c are still belong to kexec c
On Tue, May 24, 2016 at 04:12:35PM +0100, Mark Rutland wrote:
> On Tue, May 24, 2016 at 08:19:05PM +0800, Leizhen (ThunderTown) wrote:
> > On 2016/5/24 19:37, Mark Rutland wrote:
> > > On Tue, May 24, 2016 at 07:16:37PM +0800, Zhen Lei wrote:
> > >> When we ran mprotect04(a test case in LTP) infini
On Tuesday, May 24, 2016 12:09:41 PM CEST Rob Herring wrote:
> On Mon, May 23, 2016 at 11:14 PM, wrote:
> > Hello Rob,
> >
> > On 16-05-23 16:18:13, Rob Herring wrote:
> >> On Fri, May 20, 2016 at 03:32:05PM +0530, Sanchayan Maity wrote:
> >> > This adds a SoC driver to be used by Freescale Vybri
On 5/24/2016 10:41 AM, Mark Rutland wrote:
> On Tue, May 24, 2016 at 06:39:20PM +0200, Christer Weinigel wrote:
>> Document how to use devicetree aliases to assign a stable
>> bus number to a spi bus.
>>
>> Signed-off-by: Christer Weinigel
>>
>> ---
>>
>> Trivial documentation change.
>>
>> Not ha
On 05/25/2016 02:22 PM, Linus Walleij wrote:
The STMPE platform data is only populated from the device tree
in all existing users, so push the struct and make the OF case
the norm.
Cc: Patrice Chotard
Signed-off-by: Linus Walleij
---
ChangeLog v1->v2:
- Drop check for (!np) NULL device node:
On 05/25/2016 12:53 AM, Paul E. McKenney wrote:
On Tue, May 24, 2016 at 11:01:21PM -0400, Waiman Long wrote:
On 05/24/2016 10:27 AM, Peter Zijlstra wrote:
Introduce smp_acquire__after_ctrl_dep(), this construct is not
uncommen, but the lack of this barrier is.
Signed-off-by: Peter Zijlstra (In
On Wed, May 25, 2016 at 10:09:46AM +0200, Michal Hocko wrote:
...
> Well, my understanding of the OOM report is that it should tell you two
> things. The first one is to give you an overview of the overal memory
> situation when the system went OOM and the second one is o give you
> information tha
On May 25, 2016, at 1:24 AM, Al Viro wrote:
>
> diff --git a/lib/iov_iter.c b/lib/iov_iter.c
> index 28cb431..0cd5227 100644
> --- a/lib/iov_iter.c
> +++ b/lib/iov_iter.c
> @@ -101,7 +101,7 @@
> #define iterate_and_advance(i, n, v, I, B, K) { \
> if (unlikely(i->count
On Tue, May 24, 2016 at 03:48:44PM -0700, Andy Lutomirski wrote:
> + if (unlikely(!is_user_ds && !pagefault_disabled())) {
> + if (extra < TASK_SIZE_MAX) {
> + /*
> + * Accessing user address under KERNEL_DS. This is a
> +
On 5/25/2016 2:20 AM, Mark Rutland wrote:
> On Tue, May 24, 2016 at 01:41:26PM -0700, Frank Rowand wrote:
>> On 5/24/2016 10:41 AM, Mark Rutland wrote:
>>> On Tue, May 24, 2016 at 06:39:20PM +0200, Christer Weinigel wrote:
Document how to use devicetree aliases to assign a stable
bus numb
Hi Linus,
The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm.git
tags/pwm/for-4.7-rc1
for you to fetch changes
On Tue 24-05-16 22:51:27, Mikulas Patocka wrote:
> Check out-of-memory failure of the kstrdup option. Note that the argument
> "arg" may be NULL (in that case kstrup returns NULL), so out of memory
> condition happened if arg was non-NULL and kstrdup returned NULL.
>
> The patch also changes the c
Atomic allocations can trigger async map extensions which is serviced
by chunk->map_extend_work. pcpu_balance_work which is responsible for
destroying idle chunks wasn't synchronizing properly against
chunk->map_extend_work and may end up freeing the chunk while the work
item is still in flight.
For non-atomic allocations, pcpu_alloc() can try to extend the area
map synchronously after dropping pcpu_lock; however, the extension
wasn't synchronized against chunk destruction and the chunk might get
freed while extension is in progress.
This patch fixes the bug by putting most of non-atomic
On 05/18/2016 03:57 PM, Russell King - ARM Linux wrote:
On Wed, May 18, 2016 at 10:25:03PM +0200, Arnd Bergmann wrote:
The ARM version of ioremap_exec() that gets added in this patch is cached
(like memremap()), but then the asm-generic version is not? This is
even more confusing, it should at l
On Wed, May 25, 2016 at 12:03:47PM +0100, Jon Hunter wrote:
>
> On 25/05/16 11:58, Jon Hunter wrote:
>
> ...
>
> > Looking at this a bit more I am wondering if we should prevent the
> > battery for being polled before the registration has completed ...
> >
> > diff --git a/drivers/power/bq27xxx
Hi all,
Currently I am trying to develop a DRM driver that will use
Xilinx VDMA to transfer video data to a HDMI TX Phy and I am
facing a difficulty regarding the understanding of the DRM DMA
Engine. I looked at several sources and at the DRM core source
but the flow of creating and interfacing wi
On 5/25/2016 7:03 AM, Jon Hunter wrote:
>
> On 25/05/16 11:58, Jon Hunter wrote:
>
> ...
I am aware of the splat, and I was considering the proper place for
working around that.
>
>> Looking at this a bit more I am wondering if we should prevent the
>> battery for being polled before the regis
On Wed, May 25, 2016 at 2:30 AM, Jeff Chua wrote:
>
> Here's dmesg with symbols ...
Ok, so "handler" in generic_getxattr() is NULL, the code decodes to
0: 4d 89 c1 mov%r8,%r9
3: 48 8b 4c 24 08 mov0x8(%rsp),%rcx
8: 4d 89 e0 mov%r12,%r8
b: 48 8
On Wed, May 25, 2016 at 05:30:22PM +0800, Jeff Chua wrote:
> On Wed, May 25, 2016 at 2:37 AM, Al Viro wrote:
> > On Tue, May 24, 2016 at 04:59:02PM +0100, Al Viro wrote:
> >
> >> Umm... Any chance of getting the function names to go with the addresses?
> >> I'll try to reproduce it here, but the
On 5/25/2016 11:46 AM, Thierry Reding wrote:
> On Wed, May 25, 2016 at 12:03:47PM +0100, Jon Hunter wrote:
>>
>> On 25/05/16 11:58, Jon Hunter wrote:
>>
>> ...
>>
>>> Looking at this a bit more I am wondering if we should prevent the
>>> battery for being polled before the registration has complete
On 25/05/16 16:46, Thierry Reding wrote:
...
> How about this, which should be the most minimal to fix it (though it's
> completely untested) and still update the internal cache (it just won't
> signal an supply change, which wouldn't work at this point anyway). The
> patch makes up for the supp
On Wed, May 25, 2016 at 11:20:42AM -0400, Waiman Long wrote:
> On 05/25/2016 12:53 AM, Paul E. McKenney wrote:
> >On Tue, May 24, 2016 at 11:01:21PM -0400, Waiman Long wrote:
> >>On 05/24/2016 10:27 AM, Peter Zijlstra wrote:
> >>>Introduce smp_acquire__after_ctrl_dep(), this construct is not
> >>>u
On Wed, May 25, 2016 at 08:32:51AM -0700, Frank Rowand wrote:
> On 5/25/2016 2:20 AM, Mark Rutland wrote:
> > On Tue, May 24, 2016 at 01:41:26PM -0700, Frank Rowand wrote:
> >> On 5/24/2016 10:41 AM, Mark Rutland wrote:
> >>> On Tue, May 24, 2016 at 06:39:20PM +0200, Christer Weinigel wrote:
>
Hi Purna,
On 17/05/16 06:05, Purna Chandra Mandal wrote:
PIC32 clock driver is now implemented as platform driver instead of
as part of of_clk_init(). It meants all the clock modules are available
quite late in the boot sequence. So request for CPU clock by clk_get_sys()
and clk_get_rate() to fi
On Tuesday, May 24, 2016 3:23:39 PM CEST Linus Torvalds wrote:
> On Tue, May 24, 2016 at 1:11 PM, Arnd Bergmann wrote:
> > The following changes since commit bf16200689118d19de1b8d2a3c314fc21f5dc7bb:
> >
> > Linux 4.6-rc3 (2016-04-10 17:58:30 -0700)
> >
> > are available in the git repository at
On 05/24/2016 06:51 PM, Daniel Vetter wrote:
> On Tue, May 24, 2016 at 6:28 PM, Max Staudt wrote:
>> Hi Daniel,
>>
>> Thanks for the feedback! Comments below:
>>
>>
>> On 05/23/2016 03:44 PM, Daniel Vetter wrote:
>>> Do we _really_ care about fbdev mmap support so much that we want to add
>>> more
On Wed, May 25, 2016 at 08:25:44AM -0700, Frank Rowand wrote:
> On 5/24/2016 10:41 AM, Mark Rutland wrote:
> > On Tue, May 24, 2016 at 06:39:20PM +0200, Christer Weinigel wrote:
> >> +Normally SPI buses are assigned dynamic bus numbers starting at 32766
> >> +and counting downwards. It is possible
This patch adds the xp70 rproc driver to the STi section
of the MAINTAINERS file.
Signed-off-by: Peter Griffin
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 61a323a..de99aec 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1647,6 +1647,7 @@ F
This patch enables the STi ALSA drivers found on STi platforms
as well as the simple-card driver which is a dependency to have
working sound.
Signed-off-by: Peter Griffin
Cc: arnaud.pouliq...@st.com
Cc: broo...@kernel.org
---
arch/arm/configs/multi_v7_defconfig | 3 +++
1 file changed, 3 inserti
Hi Vinod / Maxime / Bjorn,
This patchset adds support for the Flexible Direct Memory Access (FDMA) core
found on STi chipsets from STMicroelectronics. The FDMA is a slim (xp70) core
CPU
with a dedicated firmware. It is a general purpose DMA controller supporting
16 independent channels and data c
This patch adds the DT node for the uniperif reader
IP block found on STiH407 family silicon.
Signed-off-by: Peter Griffin
---
arch/arm/boot/dts/stih407-family.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi
b/arch/arm
This patch adds the DT nodes for the uniperif player
IP blocks found on STiH407 family silicon.
Signed-off-by: Peter Griffin
---
arch/arm/boot/dts/stih407-family.dtsi | 76 +++
1 file changed, 76 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi
b
This patch adds the dt node for the internal audio
codec IP.
Signed-off-by: Peter Griffin
---
arch/arm/boot/dts/stih407-family.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi
b/arch/arm/boot/dts/stih407-family.dtsi
index b423836..60f95b6 1
On Wed, May 25, 2016 at 12:20 AM, George Spelvin
wrote:
>
> Well, they're close, and I can and did *get* them ready.
Ok, thanks. For some odd reason all your emails in this series got
marked as spam. Every single one, including the cover letter (but not
your replies to the replies to this).
Stup
This patch enables the uniperif players 2 & 3 for b2120 boards
and also adds the "simple-audio-card" device node to interconnect
the SoC sound device and the codec.
Signed-off-by: Peter Griffin
---
arch/arm/boot/dts/stihxxx-b2120.dtsi | 40
1 file changed, 40
This patch adds the pinctrl config for the i2s_out pins
used by the uniperif player IP.
Signed-off-by: Peter Griffin
---
arch/arm/boot/dts/stih407-pinctrl.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi
b/arch/arm/boot/dts
This patch adds the pinctrl config for the i2s_in pins
used by the uniperif reader IP.
Signed-off-by: Peter Griffin
---
arch/arm/boot/dts/stih407-pinctrl.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi
b/arch/arm/boot/dts
These nodes are required to get the fdma driver working
on STiH407 based silicon.
Signed-off-by: Peter Griffin
---
arch/arm/boot/dts/stih407-family.dtsi | 52 +++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi
b/arch/arm/boot
This patch adds the pinctrl config for the spidf out
pins used by the sasg codec IP.
Signed-off-by: Peter Griffin
---
arch/arm/boot/dts/stih407-pinctrl.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi
b/arch/arm/boot/dts/stih407-pinctrl.dts
On Tue, May 24, 2016 at 09:54:31AM -0500, Tom Lendacky wrote:
> On 05/12/2016 01:20 PM, Tom Lendacky wrote:
> > On 05/10/2016 08:57 AM, Borislav Petkov wrote:
> >> On Tue, May 10, 2016 at 02:43:58PM +0100, Matt Fleming wrote:
> >>> Is it not possible to maintain some kind of kernel virtual address
This DMA controller is found on all STi chipsets.
Signed-off-by: Peter Griffin
Acked-by: Lee Jones
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index d319d8f..5eee45b 100644
uniperiph-id, version and mode are ST specific bindings and
need the 'st,' prefix. Update the examples, as otherwise copying
them yields a runtime error parsing the DT node.
Signed-off-by: Peter Griffin
Cc: arnaud.pouliq...@st.com
Cc: broo...@kernel.org
---
.../devicetree/bindings/sound/st,sti-a
On 05/25/2016 07:53 AM, Ravikumar Kattekola wrote:
> DRA72x devices have an extra i2c controller instance - i2c6
> Adding device description for the same.
>
> Reference : DRA72x_SR1.0 TRM [ SPRUHP2Q ]
>
> Signed-off-by: Ravikumar Kattekola
> ---
> arch/arm/boot/dts/dra7.dtsi | 11 +++
>
On 5/25/2016 3:11 AM, shakilk1...@gmail.com wrote:
From: shakil khan
Thanks for the patch, this issue had been fixed by Arnd.
Yang
---
include/linux/page_idle.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/linux/page_idle.h b/include/linux/page_
On 25/05/16 16:55, Rhyland Klein wrote:
> On 5/25/2016 11:46 AM, Thierry Reding wrote:
>> On Wed, May 25, 2016 at 12:03:47PM +0100, Jon Hunter wrote:
>>>
>>> On 25/05/16 11:58, Jon Hunter wrote:
>>>
>>> ...
>>>
Looking at this a bit more I am wondering if we should prevent the
battery fo
On 05/25/2016 07:53 AM, Ravikumar Kattekola wrote:
> DRA72x devices have a sixth i2c ocntroller instance.
> Following patches add the required hwmod structure and
> device tree nodes.
>
> Reference doc: DRA72x TRM [ SPRUHP2Q ]
>
> Tested on :
> DRA72x Rev B EVM
>
> Ravikumar Kattekola (2):
> a
On 05/25/2016 07:53 AM, Ravikumar Kattekola wrote:
> dra72x device has i2c6 controller.
> Adding hwmod definition for the same.
>
> Reference DRA72x TRM [ SPRUHP2Q ]
>
> Signed-off-by: Ravikumar Kattekola
> ---
> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 23 +++
> 1 file c
On 25 May 2016 at 03:13, Corentin Chary wrote:
> On Mon, Feb 8, 2016 at 6:05 PM, João Paulo Rechi Vita
> wrote:
>> Some Asus laptops that have an "airplane mode" indicator LED, also have
>> the WMI WLAN user bit set, and the following bits in their DSDT:
>>
>> Scope (_SB)
>> {
>> (...)
>> De
On 5/25/2016 8:59 AM, Mark Rutland wrote:
> On Wed, May 25, 2016 at 08:32:51AM -0700, Frank Rowand wrote:
>> On 5/25/2016 2:20 AM, Mark Rutland wrote:
>>> On Tue, May 24, 2016 at 01:41:26PM -0700, Frank Rowand wrote:
On 5/24/2016 10:41 AM, Mark Rutland wrote:
> On Tue, May 24, 2016 at 06:3
This header file will also be used by the dma xbar driver in the
future.
Signed-off-by: Ludovic Barre
Signed-off-by: Peter Griffin
---
drivers/dma/st_fdma.h | 243 ++
1 file changed, 243 insertions(+)
create mode 100644 drivers/dma/st_fdma.h
dif
On Wed, May 25, 2016 at 1:28 AM, Jani Nikula
wrote:
>
> There may be better ones out there, but Artem's "aiaiai" has some
> helpers [1] for diffing build logs, if you want something simple to
> integrate into existing scripts.
It would be lovely to have some kind of warning detection, but quite
f
XP70 slim core is used as a basis for many IPs in the STi
chipsets such as fdma, display, and demux. To avoid
duplicating the elf loading code in each device driver
an xp70 rproc driver has been created.
This driver is designed to be used by other device drivers
such as fdma, or demux whose IP is
Hi Vinod / Maxime / Bjorn,
This patchset adds support for the Flexible Direct Memory Access (FDMA) core
found on STi chipsets from STMicroelectronics. The FDMA is a slim (xp70) core
CPU
with a dedicated firmware. It is a general purpose DMA controller supporting
16 independent channels and data c
This patch adds support for the Flexible Direct Memory Access (FDMA) core
driver. The FDMA is a slim core CPU with a dedicated firmware.
It is a general purpose DMA controller capable of supporting 16
independent DMA channels. Data moves maybe from memory to memory
or between memory and paced laten
This patch adds the DT binding documentation for the FDMA constroller
found on STi based chipsets from STMicroelectronics.
Signed-off-by: Ludovic Barre
Signed-off-by: Peter Griffin
---
Documentation/devicetree/bindings/dma/st_fdma.txt | 87 +++
1 file changed, 87 insertions(
This patch adds the FDMA driver files to the STi
section of the maintainers file.
Signed-off-by: Peter Griffin
Acked-by: Lee Jones
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index de99aec..627a2e0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -
This is used by other device drivers whose IP is based
around the xp70 slim core (such as fdma) to load and
boot the firmware in the slimcore.
Signed-off-by: Peter Griffin
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defcon
On Wed, May 25, 2016 at 10:51:20AM -0400, Chris Mason wrote:
> On Mon, May 09, 2016 at 12:48:07PM +0200, Peter Zijlstra wrote:
> > Hai,
> >
> > here be a semi coherent patch series for the recent select_idle_siblings()
> > tinkering. Happy benchmarking..
>
> This took a while, mostly because my o
On Monday 25 January 2016 10:42 PM, Mauro Carvalho Chehab wrote:
Em Mon, 25 Jan 2016 22:32:31 +0530
Sudip Mukherjee escreveu:
On Mon, Jan 25, 2016 at 02:29:06PM -0200, Mauro Carvalho Chehab wrote:
Em Fri, 18 Dec 2015 18:35:29 +0530
Sudip Mukherjee escreveu:
Modify lirc_parallel driver to u
From: Thor Thayer
The Arria10 IRQs for each peripheral ECC block funnel into 2 IRQs
[1 for single bit errors (SBERR) and 1 for double bit errors (DBERR)]
which are better handled by the IRQ controller and IRQ domain
framework than the IRQ handler in the current implementation.
The IRQ numbers (h
From: Thor Thayer
To better support child devices, the ECC manager needs to be
implemented as an IRQ controller.
Signed-off-by: Thor Thayer
---
drivers/edac/altera_edac.c | 162 +---
drivers/edac/altera_edac.h |5 +-
2 files changed, 125 insertions(
From: Thor Thayer
Changes to support ECC Manager as SDRAM IRQ parent by
1) updating IRQ property values to correct child IRQs
2) moving node under ECC Manager.
Signed-off-by: Thor Thayer
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 13 +++--
1 file changed, 7 insertions(+), 6 deletio
From: Thor Thayer
Changes to support IRQ controller implementation including adding
new property irq-controller to eccmgr and adding IRQ property
to children.
Signed-off-by: Thor Thayer
---
arch/arm/boot/dts/socfpga_arria10.dtsi |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch
On Wed, May 25, 2016 at 08:57:47AM -0700, Paul E. McKenney wrote:
> For your example, but keeping the compiler in check:
>
> if (READ_ONCE(a))
> WRITE_ONCE(b, 1);
> smp_rmb();
> WRITE_ONCE(c, 2);
>
> On x86, the smp_rmb() is as you say nothing but barrier(). Howev
On 25/05/16 17:10, Jon Hunter wrote:
...
> So power_supply_read_temp() calls ->get_property() and passes the
> power_supply psy struct which is initialised. The problem is that inside
> the bq27xxx driver, this then kicks off the worker thread to update the
> bq27xxx state and when this worker t
On 5/25/2016 9:06 AM, Mark Rutland wrote:
> On Wed, May 25, 2016 at 08:25:44AM -0700, Frank Rowand wrote:
>> On 5/24/2016 10:41 AM, Mark Rutland wrote:
>>> On Tue, May 24, 2016 at 06:39:20PM +0200, Christer Weinigel wrote:
+Normally SPI buses are assigned dynamic bus numbers starting at 32766
Hi Linus,
The following changes since commit 02da2d72174c61988eb4456b53f405e3ebdebce4:
Linux 4.6-rc5 (2016-04-24 16:17:05 -0700)
are available in the git repository at:
git://github.com/awilliam/linux-vfio.git tags/vfio-v4.7-rc1
for you to fetch changes up to f70552809419cd2abc0cc6469a07c9
On Tue, May 24, 2016 at 10:42:31AM -0400, Sinan Kaya wrote:
> On 5/24/2016 7:53 AM, Bjorn Helgaas wrote:
> > On Tue, May 24, 2016 at 06:29:44AM +, Ocean HY1 He wrote:
> >> > In pcie_config_aspm_link(), when convert ASPM state to
> >> > upstream/downstream ASPM register state, the upstream varia
On 5/25/2016 12:29 PM, Jon Hunter wrote:
>
> On 25/05/16 17:10, Jon Hunter wrote:
>
> ...
>
>> So power_supply_read_temp() calls ->get_property() and passes the
>> power_supply psy struct which is initialised. The problem is that inside
>> the bq27xxx driver, this then kicks off the worker threa
On Fri, Oct 2, 2015 at 1:58 PM, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
So I entirely missed this, but this isn't really how to implement
page_flip for an atomic driver. Working on some stuff and will hack up
a likely totally broken patch, but should be enough as guideline.
-Daniel
On 25/05/16 17:29, Jon Hunter wrote:
>
> On 25/05/16 17:10, Jon Hunter wrote:
>
> ...
>
>> So power_supply_read_temp() calls ->get_property() and passes the
>> power_supply psy struct which is initialised. The problem is that inside
>> the bq27xxx driver, this then kicks off the worker thread t
On Mon, Mar 30, 2015 at 4:49 PM, Daniel Vetter wrote:
> On Mon, Mar 30, 2015 at 02:23:47PM +0200, Gerd Hoffmann wrote:
>> > > Signed-off-by: Dave Airlie
>> > > Signed-off-by: Gerd Hoffmann
>> >
>> > Standard request from my side for new drm drivers (especially if they're
>> > this simple): Can y
On Wed, May 25, 2016 at 11:42:04AM +0100, Szabolcs Nagy wrote:
> On 24/05/16 01:04, Yury Norov wrote:
> > This version is based on kernel v4.6.
> > It works with glibc-2.23, and tested with LTP.
> >
> ...
> > ILP32 glibc branch is available here:
> > https://github.com/norov/glibc/tree/ilp32-2.23
From: Thor Thayer
Designate the ECC Manager as an interrupt controller and add child
interrupts.
Signed-off-by: Thor Thayer
---
.../bindings/arm/altera/socfpga-eccmgr.txt | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindi
Hi Caesar,
On Wed, May 25, 2016 at 11:47:45AM +0800, Caesar Wang wrote:
> From: Sascha Hauer
>
> This adds support for hardware-tracked trip points to the device tree
> thermal sensor framework.
>
> The framework supports an arbitrary number of trip points. Whenever
> the current temperature is
Hi Caesar,
On Wed, May 25, 2016 at 11:27:24AM +0800, Caesar Wang wrote:
> On 2016年05月24日 20:57, Javi Merino wrote:
> >On Tue, May 03, 2016 at 05:33:29PM +0800, Caesar Wang wrote:
> >>From: Sascha Hauer
> >>
> >>This adds support for hardware-tracked trip points to the device tree
> >>thermal sens
On 25 May 2016 at 17:40, Daniel Vetter wrote:
> On Mon, Mar 30, 2015 at 4:49 PM, Daniel Vetter wrote:
>> On Mon, Mar 30, 2015 at 02:23:47PM +0200, Gerd Hoffmann wrote:
>>> > > Signed-off-by: Dave Airlie
>>> > > Signed-off-by: Gerd Hoffmann
>>> >
>>> > Standard request from my side for new drm d
Hi Caesar,
On Wed, May 25, 2016 at 11:47:46AM +0800, Caesar Wang wrote:
> From: Sascha Hauer
>
> This patch implemnets .set_trips for device tree thermal zones.
^
implements
> As the hardware-tracked trip points is supported by thermal core patch[0].
>
> patch[0]
> "t
On 25 May 2016 at 17:13, Linus Torvalds wrote:
> On Wed, May 25, 2016 at 1:28 AM, Jani Nikula
> wrote:
>>
>> There may be better ones out there, but Artem's "aiaiai" has some
>> helpers [1] for diffing build logs, if you want something simple to
>> integrate into existing scripts.
>
> It would be
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