From: Jiri Olsa
Make perf.event object parts of the perf module dictionary so we can
address them by name.
The following objects/names are added:
mmap_event
lost_event
comm_event
task_event
throttle_event
task_event
read_event
sample_event
switch_event
We can now use it in py
From: Arnaldo Carvalho de Melo
Sounds like a compiler bug, but to silence it, initialize those
variables to NULL.
Noticed on:
Target: x86_64-alpine-linux-musl
Configured with: /home/buildozer/aports/main/gcc/src/gcc-5.3.0/configure
--prefix=/usr --mandir=/usr/share/man --infodir=/usr/share/info
From: Steven Rostedt
Add a 'CPU' special field to allow the filter in trace-cmd report to
filter on the task's CPU.
By adding a special field 'CPU' (all caps) the user can now filter out
tasks based on which CPU they are on. This is useful when filtering out
(or in) a bunch of threads.
-F 'CP
From: Arnaldo Carvalho de Melo
We should try avoiding that perf.h header, it includes way too much
stuff, making it difficult to use things like setting _GNU_SOURCE only
on a small set of headers.
Cc: Adrian Hunter
Cc: David Ahern
Cc: Davidlohr Bueso
Cc: Hitoshi Mitake
Cc: Jiri Olsa
Cc: Nam
This patch adds support for non-linear data on raw records. It means
that for such data, the newly introduced __output_custom() helper will
be used instead of __output_copy(). __output_custom() will invoke
whatever custom callback is passed in via struct perf_raw_record_frag
to extract the data int
From: Jiri Olsa
We can't consume the event before parsing it. Under heavy load we could
get caught by kernel writer overwriting the event we're trying to parse.
Signed-off-by: Jiri Olsa
Cc: David Ahern
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link:
http://lkml.kernel.org/r/1468148882-10362-5-git
vcc_3v3_reg and vcc_mmc1_reg are fixed regulators and don't need a reg
property. Remove their unit-address.
Solves:
Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node /fixedregulator@1 has a unit name, but no
reg propert
From: Arnaldo Carvalho de Melo
On systems where sysconf(_SC_LEVEL1_DCACHE_LINESIZE) is not available,
such as musl LIBC and Android's bionic libc.
Cc: Adrian Hunter
Cc: Chris Phlipot
Cc: David Ahern
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Wang Nan
Link: http://lkml.kernel.org/n/tip-772obxzby758
From: Arnaldo Carvalho de Melo
Which is just a wrapper for sys_getcpu and is not present in at least
musl libc.
Cc: Adrian Hunter
Cc: David Ahern
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Wang Nan
Link: http://lkml.kernel.org/n/tip-kblef7svmhr0g93kkx78e...@git.kernel.org
Signed-off-by: Arnaldo Car
From: Arnaldo Carvalho de Melo
No need to include stdio.h from quote.h, also forward declare strbuf.
Cc: Adrian Hunter
Cc: David Ahern
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Wang Nan
Link: http://lkml.kernel.org/n/tip-k3kbcxhctpxvz6ckve3kv...@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Me
From: Arnaldo Carvalho de Melo
Don't handle some flags only if they have its defines in headers at
time of building, define what is missing.
Cc: Adrian Hunter
Cc: David Ahern
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Wang Nan
Link: http://lkml.kernel.org/n/tip-wgjxeidwpowrvqgrxr080...@git.kernel.o
From: Arnaldo Carvalho de Melo
Cc: David Ahern
Cc: Davidlohr Bueso
Cc: Hitoshi Mitake
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Wang Nan
Link: http://lkml.kernel.org/n/tip-48qbfv7tqs8n8ey74lbyf...@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo
---
tools/perf/bench/futex-hash.c |
From: Arnaldo Carvalho de Melo
The tools so far have been using the strerror_r() GNU variant, that
returns a string, be it the buffer passed or something else.
But that, besides being tricky in cases where we expect that the
function using strerror_r() returns the error formatted in a provided
b
From: Arnaldo Carvalho de Melo
We use it in bitops/__ffs.h and bitops/atomic.h, that we also got from
the kernel, but were getting it from either newer systems that carry it
in /usr/include, or from the kernel sources, that we decided not to
touch from tools/ code. Fix it.
Cc: Adrian Hunter
Cc:
From: Arnaldo Carvalho de Melo
Those beautifiers need to make sure they include what they reference,
as changes in builtin-trace.c may end up removing needed stuff, like
when undefining _GNU_SOURCE.
Cc: Adrian Hunter
Cc: David Ahern
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Wang Nan
Link: http://l
From: Arnaldo Carvalho de Melo
To allow the build to complete on older systems, where those files are
either not uptodate, lacking some recent additions or not present at
all.
And check if the copy drifts from the kernel.
Cc: Adrian Hunter
Cc: David Ahern
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc:
From: Jiri Olsa
It will be used outside of evlist.c object in folowing patches.
Signed-off-by: Jiri Olsa
Cc: David Ahern
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link:
http://lkml.kernel.org/r/1468148882-10362-2-git-send-email-jo...@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo
---
tools/
On Tue, Jul 12, 2016 at 6:08 PM, Russell King - ARM Linux
wrote:
> On Tue, Jul 12, 2016 at 03:45:56PM -0400, Kees Cook wrote:
>> On Mon, Jul 4, 2016 at 7:40 PM, Emese Revfy wrote:
>> > If a function is called by __init and __exit functions as well then
>> > the plugin moves it to the __exit secti
From: Arnaldo Carvalho de Melo
That doesn't have -I to match lines.
Cc: Adrian Hunter
Cc: David Ahern
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Wang Nan
Link: http://lkml.kernel.org/n/tip-7nz9hnbk7a9p91ou927ye...@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo
---
tools/perf/util/intel-pt
From: Jiri Olsa
Introducing hists__add_entry_ops function to allow using the allocation
callbacks externally.
Signed-off-by: Jiri Olsa
Cc: David Ahern
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link:
http://lkml.kernel.org/r/1467701765-26194-4-git-send-email-jo...@kernel.org
Signed-off-by: Arnaldo
From: Arnaldo Carvalho de Melo
And remove the empty tools/arch/x86/include/asm/unistd_{32,64}.h files
introduced by eae7a755ee81 ("perf tools, x86: Build perf on older
user-space as well").
This way we get closer to mirroring the kernel for cases where __NR_
can't be found for some include path/
From: David Tolnay
Rust demangling is another step after bfd demangling. Add a diagnosis to
identify mangled Rust symbols based on the hash that the Rust mangler appends
as the last path component, as well as other characteristics. Add a demangler
to reconstruct the original symbol.
Committer n
Split the bpf_perf_event_output() helper as a preparation into two
parts. The newly bpf_perf_event_output() will prepare the raw record
itself and test for unknown flags from BPF trace context, where the
__bpf_perf_event_output() does the core work and will be reused later
as well.
Signed-off-by:
From: Jiri Olsa
To be able to find out event configuration info during sample parsing.
Signed-off-by: Jiri Olsa
Cc: David Ahern
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link:
http://lkml.kernel.org/r/1468148882-10362-8-git-send-email-jo...@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo
---
This set adds improvements to the BPF event output helper to
support non-linear data sampling, here specifically, for skb
context. For details please see individual patches. The set
is based against net-next tree.
Thanks a lot!
Daniel Borkmann (3):
perf, events: add non-linear data support for
From: Arnaldo Carvalho de Melo
'perf report --stdio' will colorize entries with most hits and possibly
some other aspects of its output, but those colors gets suppressed if we
redirect the output to a non-tty, allow keeping the colors by adding a
new option, --stdio-color, now this use case will
vcc_mmc1_reg is a fixed regulators and doesn't need a reg property. Remove
its unit-address.
Solves:
Warning (unit_address_vs_reg): Node /fixedregulator@2 has a unit name, but no
reg property
Signed-off-by: Alexandre Belloni
---
Cc: Marek Vasut
arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts | 2
From: Arnaldo Carvalho de Melo
These were only defined if _GNU_SOURCE was set in older glibc versions,
check that and provide the defines in such cases.
Cc: Adrian Hunter
Cc: David Ahern
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Wang Nan
Link: http://lkml.kernel.org/n/tip-b8esouhpg4tk6vi4n3d7i...@
This work improves bpf_skb_event_output() helper in two ways, i) it
avoids that users need to unnecessary extract sampled skb data to
stack first via bpf_skb_load_bytes() and then copy once again into
the ring buffer slot, and ii) it avoids that only portions can be
sampled with bpf_skb_load_bytes(
Before, the stack protector flag was sanity checked before .config had
been reprocessed. This meant the build couldn't be aborted early, and
only a warning could be emitted followed later by the compiler blowing
up with an unknown flag. This has caused a lot of confusion over time,
so this splits t
Given that nvdimm_flush() has higher overhead than wmb_pmem() (pointer
chasing through nd_region), and that we otherwise assume a platform has
ADR capability when flush hints are not present, move nvdimm_flush() to
REQ_FLUSH context.
Note that we still arrange for nvdimm_flush() to be called even
Hi,
[auto build test ERROR on arm/for-next]
[also build test ERROR on v4.7-rc7 next-20160712]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Nicolas-Pitre/binfmt_flat-assorted-cleanups/20160713
In preparation for generically mapping flush hint addresses for both the
BLK and PMEM use case, provide a generic / reference counted mapping
api. Given the fact that a dimm may belong to multiple regions (PMEM
and BLK), the flush hint addresses need to be held valid as long as any
region associat
nvdimm_flush() is a replacement for the x86 'pcommit' instruction. It is
an optional write flushing mechanism that an nvdimm bus can provide for
the pmem driver to consume. In the case of the NFIT nvdimm-bus-provider
nvdimm_flush() is implemented as a series of flush-hint-address [1]
writes to ea
Quoting jiada_w...@mentor.com (2016-07-10 22:33:28)
> From: Jiada Wang
>
> Previously CLK_SET_RATE_GATE flag is only checked in clk_set_rate()
> which only ensures the clock being called by clk_set_rate() won't
> change rate when it has been prepared if CLK_SET_RATE_GATE flag is set.
> But a clk_
On Fri, Jul 8, 2016 at 5:48 PM, Kees Cook wrote:
> A double-bug exists in the bss calculation code, where an overflow can
> happen in the "last_bss - elf_bss" calculation, but vm_brk internally
> aligns the argument, underflowing it, wrapping back around safe. We
> shouldn't depend on these bugs s
MMU now knows about execute only mappings, so
advertise the feature to L1 hypervisors
Signed-off-by: Bandan Das
---
arch/x86/kvm/vmx.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index f73b5dc..2c49355f 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch
To support execute only mappings on behalf of L1
hypervisors, we teach set_spte() to honor L1's valid XWR
bits. This is only if host supports EPT execute only. Reuse
ACC_USER_MASK to signify if the L1 hypervisor has the R bit
set. Add a new variable "shadow_present_mask" that is
set for non EPT cas
On Tue, Jul 12, 2016 at 12:50 PM, Levy, Amir (Jer)
wrote:
> On Wed, Jun 29 2016, 11:35 AM, Levy, Amir (Jer) wrote:
>> This is version 2 of Thunderbolt(TM) driver for non-Apple hardware.
>>
>> Changes since v1:
>> - Separation to 2 modules.
>> - Moved ICM specific registers definition to ICM head
On Tue, Jul 12, 2016 at 10:58:05PM +0200, Petr Tesarik wrote:
> I'm not an expert on DTB, so I can't provide an example of code
> execution, but you have already mentioned the /chosen/linux,stdout-path
> property. If an attacker redirects the bootloader to an insecure
> console, they may get access
From: Vikas Shivappa
This patch adds different APIs to manage the L3 cache capacity bitmask.
The capacity bit mask(CBM) needs to have only contiguous bits set. The
current implementation has a global CBM for each class of service id.
There are APIs added to update the CBM via MSR write to IA32_L3
From: Vikas Shivappa
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling. For
Cache Allocation, MSR write would let the task fill in the cache
'subset' represented by the task's capacity bit mask.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. Durin
We have two versions of the above function.
To prevent confusion and bugs in the future, remove
the non-FNAME version entirely and replace all calls
with the actual check.
Signed-off-by: Bandan Das
---
arch/x86/kvm/mmu.c | 2 +-
arch/x86/kvm/mmu.h | 5 -
arch/x86/kvm/paging_t
On Tue, Jul 12, 2016 at 11:13 PM, Lukas Wunner wrote:
> On Tue, Jul 12, 2016 at 09:38:51PM +0200, Xavier Gnata wrote:
>> Add support to INTEL_FALCON_RIDGE_2C controller and corresponding quirk to
>> support suspend/resume.
>> Tested against 4.7 master on a MacBook Air 11" 2015
>
> Nice, thanks for
From: Fenghua Yu
L3 cache allocation allows per task control over which areas of the last
level cache are available for allocation. It is the first resource that
can be controlled as part of Intel Resource Director Technology (RDT).
This patch series creates a framework that will make it easy to
On Tue, Jul 12, 2016 at 7:14 PM, Michael Turquette
wrote:
> It should show up now on the mirror.
Yes, it is there now. Thanks!
This is safe because this function is called
on host controlled page table and non-present/non-MMIO
sptes never use bits 1..31. For the EPT case, this
ensures that cases where only the execute bit is set
is marked valid.
Signed-off-by: Bandan Das
---
arch/x86/kvm/mmu.c | 2 +-
1 file changed, 1
For the nested EPT case, we assume that the read bit (u) is
always set since we used to unconditionally set it in set_spte().
Modify it to only be set when host ept execute only support
isn't present.
Signed-off-by: Bandan Das
---
arch/x86/kvm/mmu.c | 7 ---
1 file changed, 4 insertions(+),
On Tue, Jul 12, 2016 at 02:31:05PM -0700, Moritz Fischer wrote:
> On Tue, Jul 12, 2016 at 12:07 PM, Alan Tull
> wrote:
> > + priv->clk = devm_clk_get(dev, NULL);
> > + if (IS_ERR(priv->clk)) {
> > + dev_err(dev, "no clock specified\n");
> > + return PTR_ERR
v1 of this series posted at https://lkml.org/lkml/2016/6/28/7
Changes since v1:
- 1/5 : modify is_shadow_present_pte to check against 0x
Reasoning provided in commit message.
- 2/5 : Removed 2/5 from v1 since kvm doesn't use execute only.
3/5 from v1 is now 2/5. Introduce shadow_pr
On Tue, Jul 12, 2016 at 7:57 AM, Peter Zijlstra wrote:
> On Sat, Jul 09, 2016 at 08:25:54PM -0700, Dan Williams wrote:
>> The pcommit instruction is being deprecated in favor of either ADR
>> (asynchronous DRAM refresh: flush-on-power-fail) at the platform level, or
>> posted-write-queue flush add
From: Fenghua Yu
When a task is forked, it inherites its parent rdtgroup. The task
can be moved to other rdtgroup during its run time.
When the task exits, it's deleted from it's current rdtgroup's task
list.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
arch/x86/include/asm/intel_rdt
From: Fenghua Yu
"tasks" file in rdtgroup contains task pids. User can move a task pid
to one directory. A task can only stay in one directory at the same
time.
Each rdtgroup contains a rg_list. When a pid is written to this
rdtgroup's tasks, the task's rg_list is added in the rdtgroup's
linked
From: Fenghua Yu
There is one "schemas" file in each rdtgroup directory. User can input
schemas in the file to control how to allocate resources.
The input schemas first needs to pass validation. If there is no syntax
issue, kernel digests the input schemas and find CLOSID for each
domain for ea
From: Fenghua Yu
Build the user interface file intel_rdt_rdtgroup.c.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
arch/x86/kernel/cpu/Makefile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 39b8
From: Fenghua Yu
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
include/uapi/linux/magic.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/uapi/linux/magic.h b/include/uapi/linux/magic.h
index 546b388..655036a 100644
--- a/include/uapi/linux/magic.h
+++ b/include/uapi/linux
From: Vikas Shivappa
Add support to manage CLOSid(CLass Of Service id) and capacity
bitmask(cbm) for code data prioritization(CDP).
Closid management includes changes to allocating, freeing closid and
closid_get and closid_put and changes to closid availability map during
CDP set up. CDP has a s
From: Vikas Shivappa
Updates hot cpu notification handling for code data prioritization(cdp).
The capacity bitmask(cbm) is global for both data and instruction and we
need to update the new online package with all the cbms by writing to
the IA32_L3_QOS_n MSRs.
Signed-off-by: Vikas Shivappa
Sign
From: Fenghua Yu
We use ci_cpu_cacheinfo in CAT. Export this function for CAT to reuse.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
drivers/base/cacheinfo.c | 2 +-
include/linux/cacheinfo.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/base/cacheinfo
From: Fenghua Yu
The header mainly provides functions to call from the user interface
file intel_rdt_rdtgroup.c.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
arch/x86/include/asm/intel_rdt.h | 87 +---
1 file changed, 81 insertions(+), 6 deletions(-
From: Fenghua Yu
This is header file for user interface file intel_rdt_rdtgroup.c.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
arch/x86/include/asm/intel_rdt_rdtgroup.h | 226 ++
1 file changed, 226 insertions(+)
create mode 100644 arch/x86/include/asm/in
From: Vikas Shivappa
On Intel SKUs that support Code Data Prioritization(CDP), intel_rdt
operates in 2 modes - legacy cache allocation mode/default or CDP mode.
When CDP is enabled, the number of available CLOSids is halved. Hence the
enabling is done when less than half the number of CLOSids av
From: Fenghua Yu
We introduce a new rscctrl file system mounted under /sys/fs/rscctrl.
User uses this file system to control resource allocation.
Hiearchy of the file system is as follows:
/sys/fs/rscctrl/info/info
//
//
From: Fenghua Yu
Add an ABI document entry for /sys/devices/system/cpu/cpu*/cache/index*/id.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
Acked-by: Borislav Petkov
---
Documentation/ABI/testing/sysfs-devices-system-cpu | 17 +
1 file changed, 17 insertions(+)
diff --git
From: Vikas Shivappa
CONFIG_INTEL_RDT is defined. The option provides support for resource
allocation which is a sub-feature of Intel Resource Director Technology
(RDT).
Signed-off-by: Vikas Shivappa
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
arch/x86/Kconfig | 12 +
From: Fenghua Yu
Define two new cpuid leaves for CAT and CDP. The leaves are used in
x86_capability to avoid hard coded index.
Clean comments for RDT, CAT_L3, and CDP_L3 cpufeatures.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
arch/x86/include/asm/cpufeature.h | 2 ++
arch/x86/inc
From: Fenghua Yu
We create six new files for Intel RDT resource allocation:
arch/x86/kernel/cpu/intel_rdt.c
arch/x86/kernel/cpu/intel_rdt_rdtgroup.c
arch/x86/include/asm/intel_rdt.h
arch/x86/include/asm/intel_rdt_rdtgroup.h
Documentation/x86/intel_rdt.txt
Documentation/x86/intel_rdt_ui.txt
Add m
From: Vikas Shivappa
This patch adds enumeration support for Code Data Prioritization(CDP)
feature found in future Intel Xeon processors. It includes CPUID
enumeration routines for CDP.
CDP is an extension to Cache Allocation and lets threads allocate subset
of L3 cache for code and data separat
On Tue, Jul 12, 2016 at 03:45:56PM -0400, Kees Cook wrote:
> On Mon, Jul 4, 2016 at 7:40 PM, Emese Revfy wrote:
> > If a function is called by __init and __exit functions as well then
> > the plugin moves it to the __exit section. This causes false positive
> > section mismatch errors/warnings tha
From: Fenghua Yu
During boot time, the "info" directory is set up under rscctrl root.
it contains one "info" file and one resource specific directory
if the resource is enabled.
If L3 is enabled, "l3" sub-directory is created under the "info"
directory. There are three l3 specific info files und
From: Fenghua Yu
The documentation describes user interface of how to allocate resource
in Intel RDT.
Please note that the documentation covers generic user interface. Current
patch set code only implemente CAT L3. CAT L2 code will be sent later.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luc
From: Fenghua Yu
Each cache is described by cacheinfo and is unique in the same index
across the platform. But there is no id for a cache. We introduce cache
ID to identify a cache.
Intel Cache Allocation Technology (CAT) allows some control on the
allocation policy within each cache that it con
From: Vikas Shivappa
This patch includes CPUID enumeration routines for Cache allocation and
new values to track resources to the cpuinfo_x86 structure.
Cache allocation provides a way for the Software (OS/VMM) to restrict
cache allocation to a defined 'subset' of cache which may be overlapping
From: Fenghua Yu
Enable cache id in x86. Cache id comes from APIC ID and CPUID4.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
Acked-by: Borislav Petkov
---
arch/x86/kernel/cpu/intel_cacheinfo.c | 20
1 file changed, 20 insertions(+)
diff --git a/arch/x86/kernel/cpu/
From: Fenghua Yu
rg_list is linked list to connect to other tasks in a rdtgroup.
The point of rdtgroup allows the task to access its own rdtgroup directly.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
include/linux/sched.h | 4
1 file changed, 4 insertions(+)
diff --git a/inclu
From: Fenghua Yu
Four basic file system commands are implement for rscctrl.
mount, umount, mkdir, and rmdir.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
arch/x86/kernel/cpu/intel_rdt_rdtgroup.c | 237 +++
1 file changed, 237 insertions(+)
diff --git a/arc
From: Fenghua Yu
QoS mask MSRs array is per cache. We need to allocate CLOSID per cache
instead global CLOSID.
A few different resources can share same QoS mask MSRs array. For
example, one L2 cache can share QoS MSRs with its next level
L3 cache. A domain number represents the L2 cache, the L3
From: Vikas Shivappa
Adds some data-structures and APIs to support Class of service
management(closid). There is a new clos_cbm table which keeps a 1:1
mapping between closid and capacity bit mask (cbm)
and a count of usage of closid. Each task would be associated with a
Closid at a time and this
From: Vikas Shivappa
This patch adds hot plug cpu support for Intel Cache allocation. Support
includes updating the cache bitmask MSRs IA32_L3_QOS_n when a new CPU
package comes online or goes offline. The IA32_L3_QOS_n MSRs are one per
Class of service on each CPU package. The new package's MSRs
From: Fenghua Yu
Normally each task is associated with one rdtgroup and we use the schema
for that rdtgroup whenever the task is running. The user can designate
some cpus to always use the same schema, regardless of which task is
running. To do that the user write a cpumask bit string to the "cpu
From: Vikas Shivappa
Adds a description of Cache allocation technology, overview of kernel
framework implementation. The framework has APIs to manage class of
service, capacity bitmask(CBM), scheduling support and other
architecture specific implementation. The APIs are used to build the
rscctrl
From: Vikas Shivappa
This patch is specific to Intel haswell (hsw) server SKUs. Cache
Allocation on hsw server needs to be enumerated separately as HSW does
not have support for CPUID enumeration for Cache Allocation. This patch
does a probe by writing a CLOSid (Class of service id) into high 32
On Tue, Jul 12, 2016 at 9:16 AM, Eric W. Biederman
wrote:
> Not logging capabilities outside of the initial user namespace is
> certainly the conservative place to start, and what selinux does.
FYI, we added some basic userns capability smarts to SELinux in Linux 4.7.
commit 8e4ff6f228e4722cac
On Mon, Jul 11, 2016 at 7:14 AM, Topi Miettinen wrote:
> There are many basic ways to control processes, including capabilities,
> cgroups and resource limits. However, there are far fewer ways to find
> out useful values for the limits, except blind trial and error.
>
> Currently, there is no way
On Tue, 12 Jul 2016 16:22:07 -0500
ebied...@xmission.com (Eric W. Biederman) wrote:
> Petr Tesarik writes:
>
> > On Tue, 12 Jul 2016 13:25:11 -0300
> > Thiago Jung Bauermann wrote:
>[...]
> >> I also don't understand what you mean by code execution. How does passing
> >> a
> >> device tree bl
ebied...@xmission.com (Eric W. Biederman) writes:
> Petr Tesarik writes:
>
>> On Tue, 12 Jul 2016 13:25:11 -0300
>> Thiago Jung Bauermann wrote:
>>
>>> Hi Eric,
>>>
>>> I'm trying to understand your concerns leading to your nack. I hope you
>>> don't mind expanding your thoughts on them a bit.
This copying of arguments and environment is common to both NOMMU
binary formats we support. Let's make the elf_fdpic version available
to the flat format as well.
While at it, improve the code a bit not to copy below the actual
data area.
Signed-off-by: Nicolas Pitre
---
fs/binfmt_elf_fdpic.c
Let's take the simple and obvious approach by decompressing the binary
into a kernel buffer and then copying it to user space. Those who are
looking for more performance on a MMU system are unlikely to choose this
executable format anyway.
Signed-off-by: Nicolas Pitre
---
fs/binfmt_flat.c | 44
In addition to better code clarity, this brings proper usage of
user memory accessors everywhere the stack is touched. This is essential
for making this work on MMU systems.
Signed-off-by: Nicolas Pitre
---
fs/binfmt_flat.c | 117 ++-
1 file ch
Instant cash Loan with same day payout on all kinds of Loan are available at
Quick Financial Home were loan is offered at 2% per annul. Email:
quickloa...@foxmail.com
This is needed on systems with a MMU.
Signed-off-by: Nicolas Pitre
---
fs/binfmt_flat.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c
index c85f8f1239..e981e66bb5 100644
--- a/fs/binfmt_flat.c
+++ b/fs/binfmt_flat.c
@@ -803,10 +803,1
On Tue, Jun 28, 2016 at 2:19 PM, Colin King wrote:
> From: Colin Ian King
>
> trivial fix to spelling mistake in warning message
>
> Signed-off-by: Colin Ian King
> ---
> drivers/thunderbolt/eeprom.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/thunderbolt/ee
Not much else to do at this point.
Signed-off-by: Nicolas Pitre
---
fs/Kconfig.binfmt | 3 ++-
fs/binfmt_flat.c | 16 +---
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/fs/Kconfig.binfmt b/fs/Kconfig.binfmt
index 72c03354c1..1faba6a755 100644
--- a/fs/Kconfig.binf
This series provides the necessary changes to allow "flat" executable
binaries meant for no-MMU systems to actually run on systems with a MMU.
*Why?*
Because developing and testing natively on a large system with lots of
RAM makes it so much more convenient to use all the existing profiling
tools
Remove excessive casts, do some code grouping, etc.
No functional changes.
Signed-off-by: Nicolas Pitre
---
fs/binfmt_flat.c | 118 ++-
1 file changed, 56 insertions(+), 62 deletions(-)
diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c
index ca
On Sat, Jul 9, 2016 at 7:23 AM, Greg KH wrote:
> On Thu, Jul 07, 2016 at 07:39:12PM +0200, Andreas Noever wrote:
>> On Tue, Jun 14, 2016 at 10:22 PM, Bjorn Helgaas wrote:
>> > On Tue, Jun 14, 2016 at 09:14:27PM +0200, Andreas Noever wrote:
>> >> On Tue, Jun 14, 2016 at 6:37 PM, Bjorn Helgaas wro
This is needed on systems with a MMU. This also gets rid of the
strangest C code I've seen lateli i.e. an integer indexed with a
pointer value within square brackets. That really looked backwards.
Signed-off-by: Nicolas Pitre
---
fs/binfmt_flat.c | 19 +--
1 file changed, 13 ins
Relocs are fixed up in place in user space memory. The appropriate
accessors are required for this code to work with an active MMU.
Only those architectures with trivial architecture-specific handlers are
covered by this patch. Incidentally, those NOMMU architectures that can
also have a MMU are
This gets rid of the rather ugly, open coded and suboptimal copy code.
Signed-off-by: Nicolas Pitre
---
fs/binfmt_flat.c | 22 ++
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c
index 085059d879..64feb873f0 100644
--- a/fs/b
Signed-off-by: Nicolas Pitre
---
fs/binfmt_flat.c | 28 ++--
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c
index fc0ee3ed5d..c85f8f1239 100644
--- a/fs/binfmt_flat.c
+++ b/fs/binfmt_flat.c
@@ -394,38 +394,41 @@ static v
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