On Thu, 2016-06-30 at 15:47 +0200, Andreas Gruenbacher wrote:
> ACLs are considered equivalent to file modes if they only consist of
> owner@, group@, and everyone@ entries, the owner@ permissions do not
> depend on whether the owner is a member in the owning group, and no
> inheritance flags are s
On Thu, 2016-06-30 at 15:47 +0200, Andreas Gruenbacher wrote:
> Doing a chmod() sets the file mode, which includes the file permission
> bits. When a file has a richacl, the permissions that the richacl
> grants need to be limited to what the new file permission bits allow.
>
> This is done by se
> -Original Message-
> From: Lu Baolu [mailto:baolu...@linux.intel.com]
> Sent: Tuesday, July 12, 2016 10:24 AM
> To: Lipengcheng; gre...@linuxfoundation.org; st...@rowland.harvard.edu;
> chasemetzge...@gmail.com; mathias.ny...@linux.intel.com;
> oneu...@suse.com; jun...@freescale.com
>
On 12/07/16 12:27, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Tuesday, July 12, 2016 12:16:19 PM Colin King wrote:
>> From: Colin Ian King
>>
>> According to the HPT366 data sheet, PCI config space dword 0x40-0x43
>> bits 11:8 specify the primary drive cmd_high_time, however,
>> currently j
On 08/07/16 12:45, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Optimize these functions so that they need only one call
> into the address alloctor. This also saves a couple of
> io-tlb flushes in the unmap_sg path.
>
> Signed-off-by: Joerg Roedel
> ---
> drivers/iommu/amd_iommu.c | 77
> +++
From: Wei Yongjun
Use for_each_compatible_node() macro instead of open coding it.
Generated by Coccinelle.
Signed-off-by: Wei Yongjun
---
drivers/misc/cxl/base.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/misc/cxl/base.c b/drivers/misc/cxl/base.c
index e6
Hello Michal...
On 2016-07-12 11:50, Michal Hocko wrote:
This smells like file pages are stuck in the writeback somewhere and
the
anon memory is not reclaimable because you do not have any swap device.
Not having a swap device shouldn't be a problem -- and in this case, it
would cause even m
Hi,
On Tuesday, July 12, 2016 12:16:19 PM Colin King wrote:
> From: Colin Ian King
>
> According to the HPT366 data sheet, PCI config space dword 0x40-0x43
> bits 11:8 specify the primary drive cmd_high_time, however,
> currently just 3 bits of the 4 are being used because the mask
> is 0x700 a
From: Wei Yongjun
This node pointer is returned by of_get_child_by_name() with
refcount incremented in this function. of_node_put() is missing
when exitting this function while invalid device type. Fix it
by move of_get_child_by_name() code after device type check.
Found by Coccinelle.
Signed-o
Initial support for interleaved transfer with sDMA.
The implementation only supports DMA_MEM_TO_MEM and frame_size must be 1.
sDMA needs to be configured for double indexing when ICG is needed.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/omap-dma.c | 96
On 07/12/2016 01:16 PM, Pawel Moll wrote:
> On Mon, 2016-07-11 at 12:28 +, Anna-Maria Gleixner wrote:
>> @@ -1270,9 +1262,10 @@ static int arm_ccn_pmu_init(struct arm_c
>> * ... and change the selection when it goes offline.
>> Priority is
>> * picked to have a chance to migrate eve
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данните ви да актуализирате вашия имейл акаунт за 2016: да потвърдите
вашата електронна поща и получени нови писма.
Благодаря
Системен администратор. © 2016 вс
From: Wei Yongjun
resources alloc in this function should be release in the error
handling, otherwise it will cause resource leak.
Signed-off-by: Wei Yongjun
---
drivers/clocksource/cadence_ttc_timer.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/
On Tue, Jul 12, 2016 at 09:06:04PM +1000, Balbir Singh wrote:
> > diff --git a/Documentation/cgroup-v1/memory.txt
> > b/Documentation/cgroup-v1/memory.txt
> > index b14abf217239..946e69103cdd 100644
> > --- a/Documentation/cgroup-v1/memory.txt
> > +++ b/Documentation/cgroup-v1/memory.txt
> > @@ -2
On 7/12/2016 2:10 PM, Colin Ian King wrote:
From: Colin Ian King
According to the HPT366 data sheet, PCI config space dword 0x40-0x43
bits 11:8 specify the primary drive cmd_high_time, however,
currently just 3 bits of the 4 are being used because the mask
is 0x07 and not 0x0f. Fix the mask,
SFI specification v0.8.2 defines type of devices which are connected to
SD bus. In particularly WiFi dongle is a such.
Add a callback to enumerate the devices connected to SD bus.
Signed-off-by: Andy Shevchenko
---
arch/x86/include/asm/intel-mid.h | 15 +++
arch/x86/platform/intel-
From: Colin Ian King
According to the HPT366 data sheet, PCI config space dword 0x40-0x43
bits 11:8 specify the primary drive cmd_high_time, however,
currently just 3 bits of the 4 are being used because the mask
is 0x700 and not 0x0f00. Fix the mask, allowing for the 40MHz clock
to be detected.
On Mon, 2016-07-11 at 12:28 +, Anna-Maria Gleixner wrote:
> @@ -1270,9 +1262,10 @@ static int arm_ccn_pmu_init(struct arm_c
>* ... and change the selection when it goes offline.
> Priority is
>* picked to have a chance to migrate events before perf is
> notified.
>*/
> -
On Mon, 11 Jul, at 09:58:52AM, Dietmar Eggemann wrote:
> This difference in the initial se->avg.load_avg value [0 or 1024] has an
> influence in wake_affine() [weight = p->se.avg.load_avg;] for the wakeup
> handling of the hackbench tasks in the 'send/receive data' phase.
The way I was running ha
On 12/07/16 12:09, Sergei Shtylyov wrote:
> On 7/12/2016 2:04 PM, Sergei Shtylyov wrote:
>
>>> From: Colin Ian King
>>>
>>> According to the HPT366 data sheet, PCI config space dword 0x40-0x43
>>> bits 11:8 specify the primary drive cmd_high_time, however,
>>> currently just 3 bits of the 4 are b
Thomas Gleixner writes:
> On Mon, 11 Jul 2016, Nicolai Stange wrote:
>> > + raw = ((u64)interval >> 32) * raw_mult; /* Upper half of interval */
>> > + if (raw >> 32)
>> > + return KTIME_MAX;
>> > + raw <<= 32;
>> > + tmp = ((u64)interval & U32_MAX) * raw_mult; /* Lower half of inter
On 7/12/2016 2:04 PM, Sergei Shtylyov wrote:
From: Colin Ian King
According to the HPT366 data sheet, PCI config space dword 0x40-0x43
bits 11:8 specify the primary drive cmd_high_time, however,
currently just 3 bits of the 4 are being used because the mask
is 0x07 and not 0x0f. Fix the mask,
Hi Robin,
On Tue, Jul 12, 2016 at 11:55:39AM +0100, Robin Murphy wrote:
> > start = address;
> > for (i = 0; i < pages; ++i) {
> > - ret = dma_ops_domain_map(dma_dom, start, paddr, dir);
> > - if (ret == DMA_ERROR_CODE)
> > + ret = iommu_map_page(&dma_dom->dom
On Fri, Jul 08, 2016 at 04:01:13PM +0100, Suzuki K Poulose wrote:
> From: Steve Capper
>
> It can be useful for JIT software to be aware of MIDR_EL1 and
> REVIDR_EL1 to ascertain the presence of any core errata that could
> affect code generation.
>
> This patch exposes these registers through s
From: Wei Yongjun
PTR_ERR should be applied before its argument is reassigned, otherwise the
return value will be set to 0, not error code.
Signed-off-by: Wei Yongjun
---
drivers/nvme/host/rdma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/nvme/host/rdma.c b/dri
On Fri, Jul 08, 2016 at 10:34:38AM +0100, Mel Gorman wrote:
> Node-based reclaim requires node-based LRUs and locking. This is a
> preparation patch that just moves the lru_lock to the node so later
> patches are easier to review. It is a mechanical change but note this
> patch makes contention w
Everywhere in the kernel the MRFLD is used as abbreviation of Intel Merrifield.
Do the same in intel_mid_pci.c module.
Signed-off-by: Andy Shevchenko
---
arch/x86/pci/intel_mid_pci.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x
On 7/12/2016 1:59 PM, Colin King wrote:
From: Colin Ian King
According to the HPT366 data sheet, PCI config space dword 0x40-0x43
bits 11:8 specify the primary drive cmd_high_time, however,
currently just 3 bits of the 4 are being used because the mask
is 0x07 and not 0x0f. Fix the mask, allo
From: Colin Ian King
According to the HPT366 data sheet, PCI config space dword 0x40-0x43
bits 11:8 specify the primary drive cmd_high_time, however,
currently just 3 bits of the 4 are being used because the mask
is 0x07 and not 0x0f. Fix the mask, allowing for the 40MHz clock
to be detected.
A
On Tue, Jul 12, 2016 at 12:34:02PM +0200, Daniel Vetter wrote:
> On Mon, Jul 11, 2016 at 02:29:37PM +0200, Thierry Reding wrote:
> > On Thu, Jun 16, 2016 at 06:02:53PM +0100, Emil Velikov wrote:
> > > On 16 June 2016 at 04:00, Vinay Simha BN wrote:
> > [...]
> > > > +static int jdi_panel_disable(s
(edit cc: add tglx)
On Mon, 11 Jul 2016, Paul E. McKenney wrote:
> On Mon, Jul 11, 2016 at 12:29:04PM -, Anna-Maria Gleixner wrote:
> > From: Thomas Gleixner
> >
> > Straight forward conversion to the state machine. Though the question arises
> > whether this needs really all these state tr
Hi Joerg,
On 08/07/16 12:44, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Use the iommu-api map/unmap functions instead. This will be
> required anyway when IOVA code is used for address
> allocation.
>
> Signed-off-by: Joerg Roedel
> ---
> drivers/iommu/amd_iommu.c | 107
> ++---
Hey Vincent,
On Tue, Jul 12, 2016 at 05:03:08PM +0800, Wan Zongshun wrote:
> Currently, those patches can not work at my eCarrizo board.
> When I merged your patches, boot failed, and no any info print to me.
> I set iommu=pt, it also does not work; set iommu=soft, boot ok.
>
> When I removed tho
On Thu, Jun 23, 2016 at 12:29:48PM -0300, Gustavo Padovan wrote:
> From: Gustavo Padovan
>
> get_fences() should return a copy of all fences in the fence as some
> fence subclass (such as fence_array) can store more than one fence at
> time.
>
> Signed-off-by: Gustavo Padovan
> ---
> drivers/d
On Fri, Jun 24, 2016 at 10:19:00AM -0300, Gustavo Padovan wrote:
> 2016-06-23 Chris Wilson :
>
> > On Thu, Jun 23, 2016 at 12:29:46PM -0300, Gustavo Padovan wrote:
> > > From: Gustavo Padovan
> > >
> > > fence_array requires a function to clean up its state before we
> > > are able to call fence
Hi Mario,
There was a couple of patch to fix this issue :
https://patchwork.freedesktop.org/series/5467/
https://patchwork.freedesktop.org/series/5466/
I tested this late last week on drm-intel-nightly, it seems a series of
revert fixed most of the issues.
Cheers,
-
Lionel
On 12/07/16 11:3
On Wed, Jun 29 2016, 11:35 AM, Levy, Amir (Jer) wrote:
> This is version 2 of Thunderbolt(TM) driver for non-Apple hardware.
>
> Changes since v1:
> - Separation to 2 modules.
> - Moved ICM specific registers definition to ICM header file.
> - Added new Thunderbolt device IDs.
> - Renamed the
Hi Paul,
On dim., juil. 10 2016, Paul Gortmaker wrote:
> On Thu, Jul 7, 2016 at 6:37 PM, Gregory CLEMENT
> wrote:
>> This clock is the parent of all the Armada 3700 clocks. It is a fixed
>> rate clock which depends on the gpio configuration read when resetting
>> the SoC.
>>
>> Signed-off-by:
Hi Michael,
On ven., juil. 08 2016, Michael Turquette wrote:
> Quoting Gregory CLEMENT (2016-07-07 15:37:47)
>> This clock is the parent of all the Armada 3700 clocks. It is a fixed
>> rate clock which depends on the gpio configuration read when resetting
>> the SoC.
>>
>> Signed-off-by: Greg
On Mon, Jul 11, 2016 at 02:29:37PM +0200, Thierry Reding wrote:
> On Thu, Jun 16, 2016 at 06:02:53PM +0100, Emil Velikov wrote:
> > On 16 June 2016 at 04:00, Vinay Simha BN wrote:
> [...]
> > > +static int jdi_panel_disable(struct drm_panel *panel)
> > > +{
> > > + struct jdi_panel *jdi = to
Updating legacy gamma tables, e.g., via RandR doesn't work at all
as of Linux 4.7-rc6.
Reason seems to be that the required call to
drm_atomic_helper_commit_planes_on_crtc is skipped in
intel_atomic_commit after userspace set new gamma tables,
because neither crtc->state->planes_changed nor
update
> -Original Message-
> From: linuxarm-boun...@huawei.com [mailto:linuxarm-boun...@huawei.com]
> On Behalf Of Gabriele Paoloni
> Sent: 12 July 2016 18:22
> To: Arnd Bergmann; liudongdong (C)
> Cc: lorenzo.pieral...@arm.com; Chenxin (Charles); raf...@kernel.org;
> t...@semihalf.com; pratyus
On Tue, 12 Jul 2016 12:26:29 +0200,
Colin King wrote:
>
> From: Colin Ian King
>
> snd_ak4114_create checks if the error return err is less than zero
> or not. This is a redundant check, err can only be < 0 to get to
> the __fail label, in which case just return err and remove the
> redundant c
From: Colin Ian King
snd_ak4114_create checks if the error return err is less than zero
or not. This is a redundant check, err can only be < 0 to get to
the __fail label, in which case just return err and remove the
redundant check (since we never return -EIO).
Signed-off-by: Colin Ian King
--
On Tue, 12 Jul 2016 12:22:40 +0200,
Colin King wrote:
>
> From: Colin Ian King
>
> snd_ak4117_create checks if the error return err is less than zero
> or not. This is a redundant check, err can only be < 0 to get to
> the __fail label, in which case just return err and remove the
> redundant c
On 12/07/2016 11:38, Liu Shuo wrote:
> The failure of create debugfs of VM will return directly without release
> the anon file. It will leak memory and file descriptors, even through
> be not serious.
>
> Signed-off-by: Liu Shuo
> ---
> virt/kvm/kvm_main.c | 2 ++
> 1 file changed, 2 insertio
From: Colin Ian King
snd_ak4117_create checks if the error return err is less than zero
or not. This is a redundant check, err can only be < 0 to get to
the __fail label, in which case just return err and remove the
redundant check (since we never return -EIO).
Signed-off-by: Colin Ian King
--
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: 12 July 2016 16:35
> To: liudongdong (C)
> Cc: helg...@kernel.org; raf...@kernel.org; lorenzo.pieral...@arm.com;
> t...@semihalf.com; Wangzhou (B); pratyush.an...@gmail.com; linux-
> p...@vger.kernel.org; linux-a...@v
On Mon, Jun 27, 2016 at 01:33:24PM +0200, Andrea Merello wrote:
> On Fri, Jun 10, 2016 at 4:27 PM, Daniel Vetter wrote:
> > On Thu, Jun 09, 2016 at 03:32:55PM +0200, Andrea Merello wrote:
> >> This driver supports the VGA/LCD core available from OpenCores:
> >> http://opencores.org/project,vga_lcd
On Mon, Jul 04, 2016 at 11:27:38AM +0200, Andrea Merello wrote:
> On Fri, Jun 10, 2016 at 4:27 PM, Daniel Vetter wrote:
> > On Thu, Jun 09, 2016 at 03:32:55PM +0200, Andrea Merello wrote:
> >> This driver supports the VGA/LCD core available from OpenCores:
> >> http://opencores.org/project,vga_lcd
On Tue, Jun 21, 2016 at 4:53 PM, Ley Foon Tan wrote:
>
> This 2 patches fix the issue before and after retrain link.
>
> Ley Foon Tan (2):
> PCI: altera: check link status before retrain link
> PCI: altera: Polling for link up status after retrain the link
>
> drivers/pci/host/pcie-altera.c |
There are many AML tables reporting wrong initial lid state, and some of
them never reports lid open state. As a proxy layer acting between, ACPI
button driver is not able to handle all such cases, but need to re-define
the usage model of the ACPI lid. That is:
1. It's initial state is not reliable
On Fri, Jul 8, 2016 at 5:31 PM, Andrey Ryabinin wrote:
>
>
> On 07/08/2016 01:36 PM, Alexander Potapenko wrote:
>> On Tue, Jun 28, 2016 at 6:51 PM, Andrey Ryabinin
>> wrote:
>
*flags |= SLAB_KASAN;
+
/* Add alloc meta. */
cache->kasan_info.alloc_meta_offset =
There are many AML tables reporting wrong initial lid state, and some of
them never reports lid open state. As a proxy layer acting between, ACPI
button driver is not able to handle all such cases, but need to re-define
the usage model of the ACPI lid. That is:
1. It's initial state is not reliable
On Wed, Jun 29, 2016 at 6:31 AM, Daniel Kurtz wrote:
> On Fri, Jun 17, 2016 at 3:14 AM, Emil Velikov
> wrote:
>>> +static ssize_t ps8640_update_fw_store(struct device *dev,
>>> + struct device_attribute *attr,
>>> + const ch
On 12/07/16 02:33, Peng Fan wrote:
> There is no need to call devm_free_irq when driver detach.
> devres_release_all which is called after 'drv->remove' will
> release all managed resources.
>
> Signed-off-by: Peng Fan
> Cc: Will Deacon
> Cc: Robin Murphy
drivers/iommu/arm-smmu.c: In function
On Wed, Jun 29, 2016 at 8:17 PM, Krzysztof Kozlowski
wrote:
> On 06/27/2016 03:58 PM, Krzysztof Kozlowski wrote:
>> The SoC-specific devfreq and event drivers can be build tested on all
>> architectures.
>>
>> Signed-off-by: Krzysztof Kozlowski
>>
>> ---
>>
>> Success of compilation tested on ARM
On Fri, Jul 8, 2016 at 7:00 PM, Andrey Ryabinin wrote:
>
>
> On 07/08/2016 01:36 PM, Alexander Potapenko wrote:
>>
>> diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h
>> index d1faa01..07e4549 100644
>> --- a/include/linux/slub_def.h
>> +++ b/include/linux/slub_def.h
>> @@ -99,6 +9
+ stable
On 8 July 2016 at 17:27, Ville Viinikka wrote:
> Set 'idata->buf' to NULL so that it never gets returned without
> initialization. This fixes a bug where mmc_blk_ioctl_cmd() would
> free both 'idata' and 'idata->buf' but 'idata->buf' was returned
> uninitialized.
>
> Fixes: 1ff8950c0433
On Fri, Jun 24, 2016 at 01:42:06PM +0100, Chris Wilson wrote:
> On Fri, Jun 24, 2016 at 12:48:17PM +0100, Steven Newbury wrote:
> > On Fri, 2016-06-24 at 11:59 +0100, Chris Wilson wrote:
> > > On Thu, Jun 23, 2016 at 02:14:12PM +0100, Steven Newbury wrote:
> > > > On Thu, 2016-06-23 at 15:59 +0300,
Support a special SDT probe format which can omit the '%' prefix
only if the SDT group name starts with "sdt_". So, for example
both of "%sdt_libc:setjump" and "sdt_libc:setjump" are acceptable
for perf probe --add.
E.g. without this:
# perf probe -a sdt_libc:setjmp
Semantic error :Ther
Add a basic test case for SDT event support.
This test scans an SDT event in perftools and
check whether the SDT event is correctly stored
into the buildid cache.
Here is an example:
$ perf test sdt -v
47: Test SDT event probing :
--- start ---
test
On Mon, 2016-07-11 at 12:28 +, Anna-Maria Gleixner wrote:
> From: Sebastian Andrzej Siewior
>
> Install the callbacks via the state machine and let the core invoke
> the callbacks on the already online CPUs.
>
> Signed-off-by: Sebastian Andrzej Siewior
> Cc: Pawel Moll
> Signed-off-by: Ann
This checks whether sys/sdt.h is available or not,
which is required for DTRACE_PROBE().
We can disable this feature by passing NO_SDT=1 when
building.
This flag will be used for SDT test case and further
SDT events in perftools.
Signed-off-by: Masami Hiramatsu
---
tools/perf/Makefile.perf |
Commit 795ae7a0de6b ("mm: scale kswapd watermarks in proportion to
memory") properly added the description of the new knob to
Documentation/sysctl/vm.txt, but forgot to add it to the list of files
in /proc/sys/vm. Let's fix that.
Signed-off-by: Jerome Marchand
---
Documentation/sysctl/vm.txt | 1
Allo glob wildcard for reusing cached/SDT events. E.g.
# perf probe -x /usr/lib64/libc-2.20.so -a %sdt_libc:\*
This example adds probes for all SDT in libc.
Note that the SDTs must have been scanned by perf buildid-cache.
Signed-off-by: Masami Hiramatsu
---
Changes in v12:
- Rename strlist
Add for_each_probe_cache_entry() wrapper macro
for hiding list in probe_cache.
Signed-off-by: Masami Hiramatsu
---
Changes in v10:
- Splitted from "perf probe: Allow wildcard for cached events"
---
tools/perf/util/probe-file.c |8
tools/perf/util/probe-file.h |2 ++
2 files c
From: Masami Hiramatsu
Make "perf probe --cache --list" shows only available cached events
by checking build-id validity.
E.g. without this patch:
$ ./perf probe --cache --add oldevent=cmd_probe
$ make #(to update ./perf)
$ ./perf probe --cache --add newevent=cmd_probe
$ ./perf pr
Search SDT/cached event from all probe caches if user doesn't
pass any binary. With this, we don't have to specify target
binary for SDT and named cached events (which start with %).
E.g. without this, a target binary must be passed with -x.
# perf probe -x /usr/lib64/libc-2.20.so -a %sdt_libc:\
From: Masami Hiramatsu
To improbe usability, support %[PROVIDER:]SDTEVENT format to
add new probes on SDT and cached events.
e.g.
# perf probe -x /lib/libc-2.17.so %lll_lock_wait_private
Added new event:
sdt_libc:lll_lock_wait_private (on %lll_lock_wait_private in
/usr/lib/libc
Support @BUILDID or @FILE suffix for SDT events. This allows
perf to add probes on SDTs/pre-cached events on given FILE
or the file which has given BUILDID (also, this complements
BUILDID.)
For example, both gcc and libstdc++ has same SDTs as below.
If you would like to add a probe on sdt_libstdcxx
Fix to show correct error messages for $vars and $params because
those special variables requires debug information to find the
real variables or function parameters.
E.g. without this fix;
# perf probe -x /lib64/libc-2.23.so getaddrinfo \$params
Failed to write event: Invalid argument
Hi,
Here is the 14th version of the patchset for probe-cache and
initial SDT support.
Here is the previous v13: https://lkml.org/lkml/2016/7/1/133
This version includes patches which not merged yet. This also
adds a bugfix;
- [1/10] Resend the bugfix patch which was sent 4th July.
(h
overwrite_evt_state is introduced to reflect the state of overwritable
ring buffers. It is a state machine with following states:
.(forbid)_.
| V
RUNNING --(1)--> DATA_PENDING --(2)--> EMPTY
^ ^ | ^
Currently, evlist mmap related helpers and APIs accept evlist and idx,
and dereference 'struct perf_mmap' by evlist->mmap[idx]. This is
unnecessary, and force a evlist contain only one mmap array.
Following commits are going to introduce multiple mmap array to evlist.
This patch refators those API
This patch allows following config terms and option:
Globally setting events to overwrite;
# perf record --overwrite ...
Set specific events to be overwrite or no-overwrite.
# perf record --event cycles/overwrite/ ...
# perf record --event cycles/no-overwrite/ ...
Add missing config terms a
Add backward_mmap to evlist. Alloc this array in perf_evlist__mmap_ex()
and free it together with normal mmap.
Signed-off-by: Wang Nan
Cc: Arnaldo Carvalho de Melo
Cc: He Kuang
Cc: Jiri Olsa
Cc: Masami Hiramatsu
Cc: Namhyung Kim
Cc: Zefan Li
Cc: Nilay Vaish
Cc: pi3or...@163.com
---
tools/
When working with overwritable ring buffer there's a inconvenience
problem: if perf dumps data after a long period after it starts, non-sample
events may lost, which makes following 'perf report' unable to identify
proc name and mmap layout. For example:
# perf record -m 4 -e raw_syscalls:* -g --
We are going to use evlist->backward_mmap as a container for backward
ring buffer. Since a evlist can hold normal and backward ring buffers
together, evlist->backward is useless and misleading. Drop this
indicator.
Signed-off-by: Wang Nan
Cc: Arnaldo Carvalho de Melo
Cc: He Kuang
Cc: Jiri Olsa
If write_backward attribute is set, records are written into kernel
ring buffer from end to beginning, but read from beginning to end.
To avoid 'XX out of order events recorded' warning message (timestamps
of records is in reverse order when using write_backward), suppress the
warning message if wr
In perf_evlist__mmap_per_evsel(), select backward_mmap for backward events.
Utilize new perf_mmap APIs.
Remove useless functions.
Signed-off-by: Wang Nan
Cc: Arnaldo Carvalho de Melo
Cc: He Kuang
Cc: Jiri Olsa
Cc: Masami Hiramatsu
Cc: Namhyung Kim
Cc: Zefan Li
Cc: Nilay Vaish
Cc: pi3or...
In perf_evlist__mmap_per_cpu() and perf_evlist__mmap_per_thread(), when
mmap failure, successfully created maps should be cleared.
Current code uses two loops __perf_evlist__munmap() for each function.
This patch extracts common code to perf_evlist__munmap_nofree() and
use previous introduced dec
Insetad of saving a index into fdarray entries private field, save the
corresponding 'struct perf_mmap' pointer, and release them directly
using perf_mmap__put().
Following commits introduce multiple mmap arrays to evlist. Without this
patch, perf_evlist__munmap_filtered() is unable to retrive cor
Add a 'ptr' field to fdarray->priv array.
This feature will be used by following commits, which introduce muiltiple
'struct perf_mmap' array for different types of mapping. Because of this,
during fdarray__filter(), a simple 'idx' is not enough. Add a pointer cookie
allows directly associate a 'st
This patch set enables daemonized perf recording by utilizing
overwritable backward ring buffer. With this feature one can
put perf background, and dump ring buffer records by a SIGUSR2
when he/she find something unusual. For example, following
command record system calls, schedule events and sampl
From: Arnaldo Carvalho de Melo
evsel->overwrite indicator means an event should be put into
overwritable ring buffer. In current implementation, it equals to
evsel->attr.write_backward. To reduce compliexity, remove
evsel->overwrite, use evsel->attr.write_backward instead.
In addition, in __perf
On 05/07/2016 17:28, Florian Fainelli wrote:
> Le 05/07/2016 07:50, Mason wrote:
>
>> On 05/07/2016 15:33, Mason wrote:
>>
>>> I was testing suspend/resume sequences where the suspend operation
>>> fails and returns without having suspended the platform.
Please forget I ever mentioned suspend,
On 6 July 2016 at 18:21, Ulf Hansson wrote:
> On 4 July 2016 at 13:56, Bojan Prtvar wrote:
>> Make operation conditions register (OCR) easily accessible from user space.
>>
>> Signed-off-by: Bojan Prtvar
>
> Thanks, applied for next! Amended the changelog with the explanation
> why this change i
On Tuesday, July 12, 2016 5:06:10 PM CEST Wan Zongshun wrote:
> On 2016年07月11日 16:03, Arnd Bergmann wrote:
> > On Sunday, July 10, 2016 3:27:26 PM CEST Wan Zongshun wrote:
> > I'm still a bit unsure about the set of attributes here.
> >
> > - The "soc_id" is read from the device tree from the field
On Tue 12-07-16 10:27:37, Matthias Dahl wrote:
> Hello,
>
> I posted this issue already on linux-mm, linux-kernel and dm-devel a
> few days ago and after further investigation it seems like that this
> issue is somehow related to the fact that I am using an Intel Rapid
> Storage RAID10, so I am su
On Mon, 11 Jul 2016, Jessica Yu wrote:
> +++ Miroslav Benes [11/07/16 16:03 +0200]:
> > On Mon, 27 Jun 2016, Torsten Duwe wrote:
> >
> > > diff --git a/arch/arm64/include/asm/livepatch.h
> > > b/arch/arm64/include/asm/livepatch.h
> > > new file mode 100644
> > > index 000..6b9a3d1
> > > --- /
The _scsih_pci_mmio_enabled called if scsih_pci_error_detected returns
PCI_ERS_RESULT_CAN_RECOVER, at this point, read/write to the device
still works, no need to reset slot.
Or the mpt3sas_base_map_resources in scsih_pci_slot_reset will fail,
and iounamp ioc->chip, then we will meet issue when re
Read data fails sometimes because of a timeout that PMIC cannot transfer data
to PMIC wrap on time, extend the wainting time to 10ms to reduce the failed
rate.
Signed-off-by: Henry Chen
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/d
On Mon, Jul 11, 2016 at 01:17:09PM -0700, Andrew Morton wrote:
> On Mon, 11 Jul 2016 12:47:36 +0530 akash.g...@intel.com wrote:
>
> > From: Akash Goel
> >
> > The following patch added support to use channels with no associated files.
> > relay: add buffer-only channels; useful for early log
The failure of create debugfs of VM will return directly without release
the anon file. It will leak memory and file descriptors, even through
be not serious.
Signed-off-by: Liu Shuo
---
virt/kvm/kvm_main.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_
Hello,
On (07/11/16 15:35), Viresh Kumar wrote:
[..]
> Sometimes, the platform doesn't come back after suspend. I have tried
> enabling no-console-suspend and the last line it prints is:
>
> Disabling non-boot CPUs
>
> And nothing after that at all. We have to forcefully reboot the phone
On 11/07/16 19:00, Nate Watterson wrote:
> In the current arm-smmu-v3 driver, all smmus that support 2-level
> stream tables are being forced to use them. This is suboptimal for
> smmus that support fewer stream id bits than would fill in a single
> second level table. This patch limits the use of
add Hisilicon BVT I2C controller driver support.
Signed-off-by: Pan Wen
---
change log
v2:
1)Fixed a compile error.
2)Dropped the clock-names property.
.../devicetree/bindings/i2c/i2c-hibvt.txt | 23 +
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makef
Ciao
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From: Colin Ian King
The result of mb86a20s_readreg(state, 0x0a) & 0xf is always in the range
0x00 to 0x0f and can never be negative, so remove the redundant check
of the result being less than zero.
Signed-off-by: Colin Ian King
---
drivers/media/dvb-frontends/mb86a20s.c | 2 --
1 file change
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