Re: ath10k: fix spelling mistake "montior" -> "monitor"

Colin Ian King wrote: > From: Colin Ian King > > Trivial fix to spelling mistake in ath10k_warn message. > > Signed-off-by: Colin Ian King > Reviewed-by: Julian Calaby Thanks, 1 patch

Re: ath10k: fix spelling mistake "montior" -> "monitor"

Colin Ian King wrote: > From: Colin Ian King > > Trivial fix to spelling mistake in ath10k_warn message. > > Signed-off-by: Colin Ian King > Reviewed-by: Julian Calaby Thanks, 1 patch applied to ath-next branch of ath.git: 7f03d3069381 ath10k: fix spelling mistake "montior" -> "monitor"

Re: [PATCH v4 3/3] tracing: Histogram for missed timer offsets

2016-09-02 21:41 GMT+09:00 Binoy Jayan : > On 30 August 2016 at 16:20, Masami Hiramatsu > wrote: >> Hi Binoy, >>> >>> +static inline void trace_latency_hrtimer_mark_ts(struct hrtimer *timer, >>> +struct

Re: [PATCH] trivial treewide: Convert dev_set_uevent_suppress argument to bool

On 09/02/2016 08:41 AM, Joe Perches wrote: On Fri, 2016-09-02 at 13:41 +, Bart Van Assche wrote: On 09/01/16 17:51, Joe Perches wrote: On Fri, 2016-09-02 at 00:47 +, Bart Van Assche wrote: On 09/01/16 13:11, Joe Perches wrote: Assigning an int to a bitfield:1 can lose precision.

Re: ath10k: replace config_enabled() with IS_REACHABLE()

Masahiro Yamada wrote: > Commit 97f2645f358b ("tree-wide: replace config_enabled() with > IS_ENABLED()") mostly did away with config_enabled(). > > This is one of the postponed TODO items as config_enabled() is used > for a tristate option here. Theoretically,

Re: [PATCH v4 3/3] tracing: Histogram for missed timer offsets

2016-09-02 21:41 GMT+09:00 Binoy Jayan : > On 30 August 2016 at 16:20, Masami Hiramatsu > wrote: >> Hi Binoy, >>> >>> +static inline void trace_latency_hrtimer_mark_ts(struct hrtimer *timer, >>> +struct hrtimer_clock_base >>> *new_base, >>> +

Re: [PATCH] trivial treewide: Convert dev_set_uevent_suppress argument to bool

On 09/02/2016 08:41 AM, Joe Perches wrote: On Fri, 2016-09-02 at 13:41 +, Bart Van Assche wrote: On 09/01/16 17:51, Joe Perches wrote: On Fri, 2016-09-02 at 00:47 +, Bart Van Assche wrote: On 09/01/16 13:11, Joe Perches wrote: Assigning an int to a bitfield:1 can lose precision.

Re: ath10k: replace config_enabled() with IS_REACHABLE()

Masahiro Yamada wrote: > Commit 97f2645f358b ("tree-wide: replace config_enabled() with > IS_ENABLED()") mostly did away with config_enabled(). > > This is one of the postponed TODO items as config_enabled() is used > for a tristate option here. Theoretically, config_enabled() is > equivalent

Re: [PATCH 1/4] KVM: x86: always fill in vcpu->arch.hv_clock

On Thu, Sep 01, 2016 at 05:26:12PM +0200, Paolo Bonzini wrote: > We will use it in the next patches for KVM_GET_CLOCK and as a basis for the > contents of the Hyper-V TSC page. Get the values from the Linux > timekeeper even if kvmclock is not enabled. > > Signed-off-by: Paolo Bonzini

Re: [PATCH 1/4] KVM: x86: always fill in vcpu->arch.hv_clock

On Thu, Sep 01, 2016 at 05:26:12PM +0200, Paolo Bonzini wrote: > We will use it in the next patches for KVM_GET_CLOCK and as a basis for the > contents of the Hyper-V TSC page. Get the values from the Linux > timekeeper even if kvmclock is not enabled. > > Signed-off-by: Paolo Bonzini > --- >

[PATCH v2 14/15] Simplify testing of link status and speed testing.

--- drivers/pci/host/pcie-rockchip.c | 36 +++- 1 file changed, 15 insertions(+), 21 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index a2610dd..e33d2f7 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH 1/6] ASoC: arizona: Correct handling of FLL theta in synchroniser mode

Theta/lambda is used to give the fractional portion of the FLL frequency multiplication. When the synchroniser is active the reference path lambda value is hard coded in the hardware to 65536. This patch corrects the handling of theta such that it is scaled to match this denominator, when the

[PATCH v2 14/15] Simplify testing of link status and speed testing.

--- drivers/pci/host/pcie-rockchip.c | 36 +++- 1 file changed, 15 insertions(+), 21 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index a2610dd..e33d2f7 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH 1/6] ASoC: arizona: Correct handling of FLL theta in synchroniser mode

Theta/lambda is used to give the fractional portion of the FLL frequency multiplication. When the synchroniser is active the reference path lambda value is hard coded in the hardware to 65536. This patch corrects the handling of theta such that it is scaled to match this denominator, when the

Re: [PATCH] usb: dwc3: host: inherit dma configuration from parent dev

On Friday, September 2, 2016 10:21:23 AM CEST Alan Stern wrote: > On Fri, 2 Sep 2016, Felipe Balbi wrote: > > > Hi, > > > > Russell King - ARM Linux writes: > > > On Fri, Sep 02, 2016 at 12:43:39PM +0200, Arnd Bergmann wrote: > > >> On Thursday, September 1, 2016 5:14:28

[PATCH v2 10/15] Group related CSR definitions together.

--- drivers/pci/host/pcie-rockchip.c | 148 +++--- 1 file changed, 74 insertions(+), 74 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 6edfce5..fe1b52f 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

Re: [PATCH] genirq: Generic chip: verify irqs_per_chip <= 32

On Tue, 16 Aug 2016, Sebastian Frias wrote: > Most (if not all) code here implicitly assumes that the maximum number of > IRQs per chip will be 32, and thus uses 'u32' or 'unsigned long' for many > tasks (for example "struct irq_data" declares its 'mask' field as 'u32', > and "struct

[PATCH v2 05/15] Use a local "dev" to avoid repetition of "rockchip->dev".

--- drivers/pci/host/pcie-rockchip.c | 98 -- 1 file changed, 51 insertions(+), 47 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 63fb0ebc..ea75f35 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH v2 01/15] Remove unused symbols, unnecessary parens, other minor comments from

Guenter. --- drivers/pci/host/pcie-rockchip.c | 69 -- 1 file changed, 21 insertions(+), 48 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index e77aec3..a7006be 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH 2/6] ASoC: arizona: Allow specification of base for arizona_is_enabled_fll

In preparation for future improvements allow a base to be passed to arizona_is_enabled_fll, this will allow it to be used to check the state of the synchroniser path as well. Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 6 +++--- 1 file

Re: [PATCH 2/2] arm64: Use static keys for CPU features

On Fri, Aug 26, 2016 at 10:22:13AM +0100, Suzuki K. Poulose wrote: > On 25/08/16 18:26, Catalin Marinas wrote: > > static inline int __attribute_const__ > >diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > >index 62272eac1352..919b2d0d68ae 100644 > >---

[PATCH 0/6] Arizona FLL fixes and Clocking Improvements

Hi, The first 3 patches in this series fix some small issues with the FLL configuration in the driver. The second 3 patches add support for requesting the input clocks for the CODEC through the clock framework. This is some what of an intermediate step until all the clocking itself in the CODEC

[PATCH 10/12] MIPS: Malta: Remove custom halt implementation

The arch code will hang the machine with an infinite loop if the board doesn't provide an impelementation of halt - let it, rather than duplicating it. Signed-off-by: Paul Burton --- arch/mips/mti-malta/malta-reset.c | 6 -- 1 file changed, 6 deletions(-) diff

Re: [2/2] ath10k: use complete() instead complete_all()

Daniel Wagner wrote: > From: Daniel Wagner > > There is only one waiter for the completion, therefore there > is no need to use complete_all(). Let's make that clear by > using complete() instead of complete_all(). > > The usage pattern of the

[PATCH v2 01/15] Remove unused symbols, unnecessary parens, other minor comments from

Guenter. --- drivers/pci/host/pcie-rockchip.c | 69 -- 1 file changed, 21 insertions(+), 48 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index e77aec3..a7006be 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH 2/6] ASoC: arizona: Allow specification of base for arizona_is_enabled_fll

In preparation for future improvements allow a base to be passed to arizona_is_enabled_fll, this will allow it to be used to check the state of the synchroniser path as well. Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)

Re: [PATCH 2/2] arm64: Use static keys for CPU features

On Fri, Aug 26, 2016 at 10:22:13AM +0100, Suzuki K. Poulose wrote: > On 25/08/16 18:26, Catalin Marinas wrote: > > static inline int __attribute_const__ > >diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > >index 62272eac1352..919b2d0d68ae 100644 > >---

[PATCH 0/6] Arizona FLL fixes and Clocking Improvements

Hi, The first 3 patches in this series fix some small issues with the FLL configuration in the driver. The second 3 patches add support for requesting the input clocks for the CODEC through the clock framework. This is some what of an intermediate step until all the clocking itself in the CODEC

Re: [PATCH] usb: dwc3: host: inherit dma configuration from parent dev

On Friday, September 2, 2016 10:21:23 AM CEST Alan Stern wrote: > On Fri, 2 Sep 2016, Felipe Balbi wrote: > > > Hi, > > > > Russell King - ARM Linux writes: > > > On Fri, Sep 02, 2016 at 12:43:39PM +0200, Arnd Bergmann wrote: > > >> On Thursday, September 1, 2016 5:14:28 PM CEST Leo Li wrote: >

[PATCH v2 10/15] Group related CSR definitions together.

--- drivers/pci/host/pcie-rockchip.c | 148 +++--- 1 file changed, 74 insertions(+), 74 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 6edfce5..fe1b52f 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

Re: [PATCH] genirq: Generic chip: verify irqs_per_chip <= 32

On Tue, 16 Aug 2016, Sebastian Frias wrote: > Most (if not all) code here implicitly assumes that the maximum number of > IRQs per chip will be 32, and thus uses 'u32' or 'unsigned long' for many > tasks (for example "struct irq_data" declares its 'mask' field as 'u32', > and "struct

[PATCH v2 05/15] Use a local "dev" to avoid repetition of "rockchip->dev".

--- drivers/pci/host/pcie-rockchip.c | 98 -- 1 file changed, 51 insertions(+), 47 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 63fb0ebc..ea75f35 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

Re: [2/2] ath10k: use complete() instead complete_all()

Daniel Wagner wrote: > From: Daniel Wagner > > There is only one waiter for the completion, therefore there > is no need to use complete_all(). Let's make that clear by > using complete() instead of complete_all(). > > The usage pattern of the completion is: > > waiter context

[PATCH 10/12] MIPS: Malta: Remove custom halt implementation

The arch code will hang the machine with an infinite loop if the board doesn't provide an impelementation of halt - let it, rather than duplicating it. Signed-off-by: Paul Burton --- arch/mips/mti-malta/malta-reset.c | 6 -- 1 file changed, 6 deletions(-) diff --git

[PATCH 11/12] power: reset: Add Intel PIIX4 poweroff driver

Add a driver which allows powering off the system via an Intel PIIX4 southbridge, by entering the PIIX4 SOff state. This is useful on the MIPS Malta development board, where it will power down the FPGA based board until its ON/NMI button is pressed, or the QEMU implementation of the MIPS Malta

[PATCH v2 02/15] Rename pcie_read() and pcie_write() to rockchip_pcie_read() and

rockchip_pcie_write(). --- drivers/pci/host/pcie-rockchip.c | 66 +++--- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index a7006be..c9d0799 100644 ---

Re: [PATCH v2] mfd: arizona: Add DT options for max_channels_clocked and PDM speaker config

On Fri, 2016-09-02 at 10:34 -0500, Rob Herring wrote: > On Wed, Aug 31, 2016 at 10:25:43AM +0100, Richard Fitzgerald wrote: > > This patch adds DT settings for the max_channels_clocked, spk_fmt and > > spk_mute pdata. > > > > Signed-off-by: Richard Fitzgerald >

[PATCH v2 11/15] Rename PCIE_CORE_RC_CONF_SCC_SHIFT to match similar definitions.

--- drivers/pci/host/pcie-rockchip.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index fe1b52f..88c16da 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@

[PATCH 08/12] MIPS: Malta: Probe pflash via DT

Add the DT nodes required to probe the CFI compatible parallel monitor flash found on the Malta development board, and remove the platform code that was previously doing it. Delete the now-empty malta-platform.c file. Adjust the Malta defconfigs that enable MTD & the pflash/CFI driver to enable

[PATCH 07/12] MIPS: Malta: Probe RTC via DT

Add the DT node required to probe the RTC, and remove the platform code that was previously doing it. Signed-off-by: Paul Burton --- arch/mips/boot/dts/mti/malta.dts | 15 +++ arch/mips/mti-malta/malta-platform.c | 21 - 2 files

[PATCH v2 08/15] Remove duplicate CSR definition.

PCIE_RC_CONFIG_LCSR was the same as PCIE_RC_CONFIG_LCS. Kept PCIE_RC_CONFIG_LCS. PCIE_CORE_LCSR_RETRAIN_LINK was inexplicably named differently and defined separately. --- drivers/pci/host/pcie-rockchip.c | 27 +-- 1 file changed, 13 insertions(+), 14 deletions(-)

[PATCH 12/12] MIPS: Malta: Use PIIX4 poweroff driver to power down

Remove the platform code used to power down the system, instead relying upon the new PIIX4 poweroff driver. This reduces the amount of platform code required for the Malta board in preparation for allowing it to be part of a more generic kernel. Signed-off-by: Paul Burton

[PATCH 6/6] ASoC: arizona: Add gating for source clocks of the FLLs

Whilst ultimately we would like to move all the clocking over to the clock framework, as an intermediate step to get people going for now enable the source clocks for FLLs as they are powered up. Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c |

[PATCH v2 00/15] PCI: rockchip: Cleanups against v10

These are cleanups against 2098142ae87d, the current pci/host-rockchip head in my tree. Changes from v1: - Rework HIWORD_UPDATE - Remove duplicate CSR definitions - Move CSR block offset from read/write caller to CSR definition - Organize CSRs into logical blocks - Fix some

[PATCH 3/6] ASoC: arizona: Avoid changing SYNC_ENA whilst the FLL_ENA is set

For best performance changing the synchroniser state whilst the FLL is running should be avoided. As this has been done fairly regularly in practice rather than hard preventing this, simply improve the FLL enable sequence and give a warning if the user changes the synchroniser state.

[PATCH v2 13/15] The register at PCIE_CLIENT_BASE presumably has a name of its own. Add a

name for it and similar registers in other blocks. --- drivers/pci/host/pcie-rockchip.c | 31 +-- 1 file changed, 17 insertions(+), 14 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 2a41439..a2610dd 100644 ---

[PATCH 12/12] MIPS: Malta: Use PIIX4 poweroff driver to power down

Remove the platform code used to power down the system, instead relying upon the new PIIX4 poweroff driver. This reduces the amount of platform code required for the Malta board in preparation for allowing it to be part of a more generic kernel. Signed-off-by: Paul Burton ---

[PATCH 6/6] ASoC: arizona: Add gating for source clocks of the FLLs

Whilst ultimately we would like to move all the clocking over to the clock framework, as an intermediate step to get people going for now enable the source clocks for FLLs as they are powered up. Signed-off-by: Charles Keepax --- sound/soc/codecs/arizona.c | 60

[PATCH v2 00/15] PCI: rockchip: Cleanups against v10

These are cleanups against 2098142ae87d, the current pci/host-rockchip head in my tree. Changes from v1: - Rework HIWORD_UPDATE - Remove duplicate CSR definitions - Move CSR block offset from read/write caller to CSR definition - Organize CSRs into logical blocks - Fix some

[PATCH 3/6] ASoC: arizona: Avoid changing SYNC_ENA whilst the FLL_ENA is set

For best performance changing the synchroniser state whilst the FLL is running should be avoided. As this has been done fairly regularly in practice rather than hard preventing this, simply improve the FLL enable sequence and give a warning if the user changes the synchroniser state.

[PATCH v2 13/15] The register at PCIE_CLIENT_BASE presumably has a name of its own. Add a

name for it and similar registers in other blocks. --- drivers/pci/host/pcie-rockchip.c | 31 +-- 1 file changed, 17 insertions(+), 14 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 2a41439..a2610dd 100644 ---

[PATCH v2 02/15] Rename pcie_read() and pcie_write() to rockchip_pcie_read() and

rockchip_pcie_write(). --- drivers/pci/host/pcie-rockchip.c | 66 +++--- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index a7006be..c9d0799 100644 ---

Re: [PATCH v2] mfd: arizona: Add DT options for max_channels_clocked and PDM speaker config

On Fri, 2016-09-02 at 10:34 -0500, Rob Herring wrote: > On Wed, Aug 31, 2016 at 10:25:43AM +0100, Richard Fitzgerald wrote: > > This patch adds DT settings for the max_channels_clocked, spk_fmt and > > spk_mute pdata. > > > > Signed-off-by: Richard Fitzgerald > > --- > >

[PATCH v2 11/15] Rename PCIE_CORE_RC_CONF_SCC_SHIFT to match similar definitions.

--- drivers/pci/host/pcie-rockchip.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index fe1b52f..88c16da 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@

[PATCH 08/12] MIPS: Malta: Probe pflash via DT

Add the DT nodes required to probe the CFI compatible parallel monitor flash found on the Malta development board, and remove the platform code that was previously doing it. Delete the now-empty malta-platform.c file. Adjust the Malta defconfigs that enable MTD & the pflash/CFI driver to enable

[PATCH 07/12] MIPS: Malta: Probe RTC via DT

Add the DT node required to probe the RTC, and remove the platform code that was previously doing it. Signed-off-by: Paul Burton --- arch/mips/boot/dts/mti/malta.dts | 15 +++ arch/mips/mti-malta/malta-platform.c | 21 - 2 files changed, 15 insertions(+), 21

[PATCH 11/12] power: reset: Add Intel PIIX4 poweroff driver

Add a driver which allows powering off the system via an Intel PIIX4 southbridge, by entering the PIIX4 SOff state. This is useful on the MIPS Malta development board, where it will power down the FPGA based board until its ON/NMI button is pressed, or the QEMU implementation of the MIPS Malta

[PATCH v2 08/15] Remove duplicate CSR definition.

PCIE_RC_CONFIG_LCSR was the same as PCIE_RC_CONFIG_LCS. Kept PCIE_RC_CONFIG_LCS. PCIE_CORE_LCSR_RETRAIN_LINK was inexplicably named differently and defined separately. --- drivers/pci/host/pcie-rockchip.c | 27 +-- 1 file changed, 13 insertions(+), 14 deletions(-)

[PATCH v2 06/15] Add comment about why 32-bit read/modify/write isn't safe.

--- drivers/pci/host/pcie-rockchip.c |5 + 1 file changed, 5 insertions(+) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index ea75f35..c0c3ad5 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -282,6 +282,11 @@

[PATCH v2 06/15] Add comment about why 32-bit read/modify/write isn't safe.

--- drivers/pci/host/pcie-rockchip.c |5 + 1 file changed, 5 insertions(+) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index ea75f35..c0c3ad5 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -282,6 +282,11 @@

[PATCH 4/6] mfd: arizona: Add gating of external MCLKn clocks

From: Sylwester Nawrocki This patch adds requesting of the clocks supplied on MCLK1, MCLK2 pins, gating of the 32k clock is added to the arizona_clk32k_enable(), arizona_clk32k_disable() helpers. It's a temporary change until the CODEC's clock controller gets exposed

[PATCH 5/6] ASoC: arizona: Add gating for clock when used for direct MCLK

Whilst ultimately we would like to move all the clocking over to the clock framework, as an intermediate step to get people going for now gating the source clocks for SYSCLK/ASYNCCLK when they are configured to come directly from an MCLK pin. Signed-off-by: Charles Keepax

[PATCH v2 12/15] Rename ROCKCHIP_PCIE_RPIFR1_INTR_MASK and ROCKCHIP_PCIE_RPIFR1_INTR_SHIFT

to match similar definitions. --- drivers/pci/host/pcie-rockchip.c |7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 88c16da..2a41439 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH v2 07/15] Simplify the confusing HIWORD_UPDATE scheme.

--- drivers/pci/host/pcie-rockchip.c | 70 +- 1 file changed, 24 insertions(+), 46 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index c0c3ad5..b204567 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH v2 09/15] Move CSR bases into definition.

Instead of this: #define PCIE_RC_CONFIG_LCS0xd0 read(rockchip, PCIE_RC_CONFIG_BASE + PCIE_RC_CONFIG_LCS); do this: #define PCIE_RC_CONFIG_LCS(PCIE_RC_CONFIG_BASE + 0xd0) read(rockchip, PCIE_RC_CONFIG_LCS); Mostly trivial, but rockchip_pcie_prog_ob_atu() and

[PATCH v2 03/15] Always use "rockchip" as the pointer to per-device struct.

--- drivers/pci/host/pcie-rockchip.c | 488 +++--- 1 file changed, 244 insertions(+), 244 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index c9d0799..3cfb47a 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH 09/12] MIPS: Malta: Use syscon-reboot driver to reboot

Make use of the generic syscon-reboot driver to reboot the Malta board, reducing the amount of platform code it requires. Signed-off-by: Paul Burton --- arch/mips/boot/dts/mti/malta.dts| 12 arch/mips/configs/malta_defconfig | 2 ++

[PATCH 4/6] mfd: arizona: Add gating of external MCLKn clocks

From: Sylwester Nawrocki This patch adds requesting of the clocks supplied on MCLK1, MCLK2 pins, gating of the 32k clock is added to the arizona_clk32k_enable(), arizona_clk32k_disable() helpers. It's a temporary change until the CODEC's clock controller gets exposed through the clk API and is

[PATCH 5/6] ASoC: arizona: Add gating for clock when used for direct MCLK

Whilst ultimately we would like to move all the clocking over to the clock framework, as an intermediate step to get people going for now gating the source clocks for SYSCLK/ASYNCCLK when they are configured to come directly from an MCLK pin. Signed-off-by: Charles Keepax ---

[PATCH v2 12/15] Rename ROCKCHIP_PCIE_RPIFR1_INTR_MASK and ROCKCHIP_PCIE_RPIFR1_INTR_SHIFT

to match similar definitions. --- drivers/pci/host/pcie-rockchip.c |7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 88c16da..2a41439 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH v2 07/15] Simplify the confusing HIWORD_UPDATE scheme.

--- drivers/pci/host/pcie-rockchip.c | 70 +- 1 file changed, 24 insertions(+), 46 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index c0c3ad5..b204567 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH v2 09/15] Move CSR bases into definition.

Instead of this: #define PCIE_RC_CONFIG_LCS0xd0 read(rockchip, PCIE_RC_CONFIG_BASE + PCIE_RC_CONFIG_LCS); do this: #define PCIE_RC_CONFIG_LCS(PCIE_RC_CONFIG_BASE + 0xd0) read(rockchip, PCIE_RC_CONFIG_LCS); Mostly trivial, but rockchip_pcie_prog_ob_atu() and

[PATCH v2 03/15] Always use "rockchip" as the pointer to per-device struct.

--- drivers/pci/host/pcie-rockchip.c | 488 +++--- 1 file changed, 244 insertions(+), 244 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index c9d0799..3cfb47a 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH 09/12] MIPS: Malta: Use syscon-reboot driver to reboot

Make use of the generic syscon-reboot driver to reboot the Malta board, reducing the amount of platform code it requires. Signed-off-by: Paul Burton --- arch/mips/boot/dts/mti/malta.dts| 12 arch/mips/configs/malta_defconfig | 2 ++

[PATCH v2 15/15] Move msleeps to address Guenter's comments.

--- drivers/pci/host/pcie-rockchip.c | 35 +++ 1 file changed, 7 insertions(+), 28 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index e33d2f7..d293a62 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH v2 04/15] Rename struct rockchip_pcie_port to struct rockchip_pcie.

--- drivers/pci/host/pcie-rockchip.c | 46 +++--- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 3cfb47a..63fb0ebc 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH v2 15/15] Move msleeps to address Guenter's comments.

--- drivers/pci/host/pcie-rockchip.c | 35 +++ 1 file changed, 7 insertions(+), 28 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index e33d2f7..d293a62 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH v2 04/15] Rename struct rockchip_pcie_port to struct rockchip_pcie.

--- drivers/pci/host/pcie-rockchip.c | 46 +++--- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 3cfb47a..63fb0ebc 100644 --- a/drivers/pci/host/pcie-rockchip.c +++

[PATCH 01/12] irqchip: i8259: Add domain before mapping parent irq

Mapping the parent IRQ will use a virq number which may conflict with the hardcoded I8259A_IRQ_BASE..I8259A_IRQ_BASE+15 range that the i8259 driver expects to be free. If this occurs then we'll hit errors when adding the i8259 IRQ domain, since one of its virq numbers will already be in use.

[PATCH 00/12] Partial MIPS Malta DT conversion

This series begins converting the MIPS Malta board to use device tree to probe its various devices & peripherals, with the eventual goal of including Malta support in generic kernels. In terms of use the only change should be that kernels will automatically make use of more than 256MB DDR when

[PATCH 06/12] MIPS: Malta: Probe interrupt controllers via DT

Probe the CPU, GIC & i8259 interrupt controllers present in the Malta system using device tree. This enables interrupts to be provided to devices using device tree as they are moved over to being probed using it. Since Malta is very configurable it's unknown whether a GIC will be present at

Re: [PATCH] drm/tegra: Expose color key and plane blending controls to userspace

On Fri, Sep 02, 2016 at 05:32:19PM +0200, Thierry Reding wrote: > On Fri, Sep 02, 2016 at 12:33:42PM +0300, Dmitry Osipenko wrote: > > Chromakey is a simple way of video overlay overlap implementation. This > > patch adds 2 new IOCTL's: first - sets color key and is common across of > > all Tegra

[PATCH 04/12] MIPS: Malta: Allow PCI devices DMA to lower 2GB physical

Set the PCI_BAR0 register in all configurations such that PCI devices can perform DMA to all of the bottom 2GB of the physical address space. This is imperfect if we make use of the legacy Malta memory map, but it is an improvement on the inconsistent values setup before. Signed-off-by: Paul

[PATCH 02/12] irqchip: i8259: Allow platforms to override poll function

The default i8259 polling function (i8259_irq) is nicely generic but is fairly costly. Platforms often provide an alternative means of polling for an i8259 interrupt, and when using the i8259 without device tree have typically just chained its parent interrupt to their own handler function. In

[PATCH 03/12] irqchip: i8259: Remove unused i8259A_irq_pending

The i8259A_irq_pending function is unused. Remove the dead code. Signed-off-by: Paul Burton --- arch/mips/include/asm/i8259.h | 1 - drivers/irqchip/irq-i8259.c | 18 -- 2 files changed, 19 deletions(-) diff --git a/arch/mips/include/asm/i8259.h

[PATCH 05/12] MIPS: Malta: Use all available DDR by default

Malta boards can have more than 256MB DDR available, but we have previously only made use of up to 256MB (ie. the DDR accessible via kseg0) by default, without the user manually specifying mem= kernel parameters. This patch causes all available DDR, as reported by the bootloader via the ememsize

Re: [PATCH] drm/tegra: Expose color key and plane blending controls to userspace

On Fri, Sep 02, 2016 at 05:32:19PM +0200, Thierry Reding wrote: > On Fri, Sep 02, 2016 at 12:33:42PM +0300, Dmitry Osipenko wrote: > > Chromakey is a simple way of video overlay overlap implementation. This > > patch adds 2 new IOCTL's: first - sets color key and is common across of > > all Tegra

[PATCH 04/12] MIPS: Malta: Allow PCI devices DMA to lower 2GB physical

Set the PCI_BAR0 register in all configurations such that PCI devices can perform DMA to all of the bottom 2GB of the physical address space. This is imperfect if we make use of the legacy Malta memory map, but it is an improvement on the inconsistent values setup before. Signed-off-by: Paul

[PATCH 02/12] irqchip: i8259: Allow platforms to override poll function

The default i8259 polling function (i8259_irq) is nicely generic but is fairly costly. Platforms often provide an alternative means of polling for an i8259 interrupt, and when using the i8259 without device tree have typically just chained its parent interrupt to their own handler function. In

[PATCH 01/12] irqchip: i8259: Add domain before mapping parent irq

Mapping the parent IRQ will use a virq number which may conflict with the hardcoded I8259A_IRQ_BASE..I8259A_IRQ_BASE+15 range that the i8259 driver expects to be free. If this occurs then we'll hit errors when adding the i8259 IRQ domain, since one of its virq numbers will already be in use.

[PATCH 00/12] Partial MIPS Malta DT conversion

This series begins converting the MIPS Malta board to use device tree to probe its various devices & peripherals, with the eventual goal of including Malta support in generic kernels. In terms of use the only change should be that kernels will automatically make use of more than 256MB DDR when

[PATCH 06/12] MIPS: Malta: Probe interrupt controllers via DT

Probe the CPU, GIC & i8259 interrupt controllers present in the Malta system using device tree. This enables interrupts to be provided to devices using device tree as they are moved over to being probed using it. Since Malta is very configurable it's unknown whether a GIC will be present at

[PATCH 03/12] irqchip: i8259: Remove unused i8259A_irq_pending

The i8259A_irq_pending function is unused. Remove the dead code. Signed-off-by: Paul Burton --- arch/mips/include/asm/i8259.h | 1 - drivers/irqchip/irq-i8259.c | 18 -- 2 files changed, 19 deletions(-) diff --git a/arch/mips/include/asm/i8259.h

[PATCH 05/12] MIPS: Malta: Use all available DDR by default

Malta boards can have more than 256MB DDR available, but we have previously only made use of up to 256MB (ie. the DDR accessible via kseg0) by default, without the user manually specifying mem= kernel parameters. This patch causes all available DDR, as reported by the bootloader via the ememsize

Re: [PATCH] generic: Add the exception case checking routine for ppi interrupt

On 02/09/16 14:08, Thomas Gleixner wrote: > On Thu, 1 Sep 2016, Marc Zyngier wrote: >> On 01/09/16 09:15, majun (F) wrote: >> Well, this issue goes way beyond the hack you wanted to add to the >> generic code, and it should probably be addressed in the GIC code >> itself, as an implementation

Re: [writeback] 8bc4ad9498: INFO: suspicious RCU usage. ]

On 09/02/2016 09:36 AM, Paul E. McKenney wrote: On Fri, Sep 02, 2016 at 10:56:22AM -0400, Tejun Heo wrote: (cc'ing Paul, hi!) Hello, On Thu, Sep 01, 2016 at 02:13:34PM -0600, Jens Axboe wrote: On 09/01/2016 04:21 AM, kernel test robot wrote: [7.323356] cdrom: Uniform CD-ROM driver

Re: [writeback] 8bc4ad9498: INFO: suspicious RCU usage. ]

On 09/02/2016 09:36 AM, Paul E. McKenney wrote: On Fri, Sep 02, 2016 at 10:56:22AM -0400, Tejun Heo wrote: (cc'ing Paul, hi!) Hello, On Thu, Sep 01, 2016 at 02:13:34PM -0600, Jens Axboe wrote: On 09/01/2016 04:21 AM, kernel test robot wrote: [7.323356] cdrom: Uniform CD-ROM driver

Re: [PATCH] generic: Add the exception case checking routine for ppi interrupt

On 02/09/16 14:08, Thomas Gleixner wrote: > On Thu, 1 Sep 2016, Marc Zyngier wrote: >> On 01/09/16 09:15, majun (F) wrote: >> Well, this issue goes way beyond the hack you wanted to add to the >> generic code, and it should probably be addressed in the GIC code >> itself, as an implementation

Re: [PATCH v5 2/4] ARM: dts: rockchip: update compatible strings for Rockchip efuse

Am Donnerstag, 1. September 2016, 20:16:55 schrieb Finley Xiao: > Signed-off-by: Finley Xiao > Reviewed-by: Heiko Stuebner due to the new compatible values, this would cause a regression (existing functionality breaking) when used without the efuse

Re: [PATCH v5 2/4] ARM: dts: rockchip: update compatible strings for Rockchip efuse

Am Donnerstag, 1. September 2016, 20:16:55 schrieb Finley Xiao: > Signed-off-by: Finley Xiao > Reviewed-by: Heiko Stuebner due to the new compatible values, this would cause a regression (existing functionality breaking) when used without the efuse change, so I've put this patch into a branch

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