[PATCH 2/4] platform/chrome: cros_ec_lightbar - Control of suspend/resume lightbar sequence

From: Eric Caruso Don't let EC control suspend/resume sequence. If the EC controls the lightbar and sets the sequence when it notices the chipset transitioning between states, we can't make exceptions for cases where we don't want to activate the lightbar. Instead, let's

[PATCH v2 0/4] Altera Cyclone Passive Serial SPI FPGA Manager

This series adds an FPGA manager for Altera cyclone FPGAs that can program them using an spi port and a couple of gpios, using Alteras passive serial protocol. Changes from v1: - Changed the name from cyclone-spi-fpga-mgr to cyclone-ps-spi-fpga-mgr This name change was requested by Alan Tull,

[PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable

The status pin may not show ready in the time described in the Altetera manual. check the value several times before giving up For the hardware I am working on, the status pin takes 250 us, 5 times as long as described by Altera. Signed-off-by: Joshua Clayton ---

[PATCH v2 1/5] lib: add bitrev8x4()

Add a function to reverse bytes within a 32 bit word. This function is more efficient than using the 8 bit version when iterating over an array Signed-off-by: Joshua Clayton --- arch/arm/include/asm/bitrev.h | 5 + include/linux/bitrev.h| 26

[tip:perf/core] perf bench futex: Sanitize numeric parameters

Commit-ID: 60758d6668b3e2fa8e5fd143d24d0425203d007e Gitweb: http://git.kernel.org/tip/60758d6668b3e2fa8e5fd143d24d0425203d007e Author: Davidlohr Bueso AuthorDate: Mon, 24 Oct 2016 13:56:53 -0700 Committer: Arnaldo Carvalho de Melo CommitDate: Tue, 25

Re: [PATCH v2 3/3] reset: Add the TI SCI reset driver

On 27 October 2016 at 15:49, Andrew F. Davis wrote: > Some TI Keystone family of SoCs contain a system controller (like the > Power Management Micro Controller (PMMC) on K2G SoCs) that manage the > low-level device control (like clocks, resets etc) for the various > hardware modules

[PATCH] Revert "usb: dwc2: gadget: fix TX FIFO size and address initialization"

This reverts commit aa381a7259c3f53727bcaa8c5f9359e940a0e3fd. Reverting this patch, as it incorrectly assumes TX FIFO size is fixed and cannot change FIFO size; it removes all related dt binding code and have no chance to set FIFO size at init phase. As result, Hi6220 cannot set correct FIFO

Re: [PATCH] m68k: Fix ndelay() macro

Hi Boris, On Fri, Oct 28, 2016 at 5:12 PM, Boris Brezillon wrote: > The current ndelay() macro definition has an extra semi-colon at the > end of the line thus leading to a compilation error when ndelay is used > in a conditional block with curly braces like

Re: [PATCH] x86/AMD: Apply erratum 688 on machines without a BIOS fix

On Mon, Oct 24, 2016 at 07:14:50PM +0200, Borislav Petkov wrote: > > Yes, using Ubuntu 16.04 will just crash everything! For example I had > > crashes with the software updater program. Moreover firefox would become > > unresponsive even with one tab. > > Ok, lemme install 16.04 on that box and

Re: [PATCH v2 02/16] scsi: don't use fc_bsg_job::request and fc_bsg_job::reply directly

> On 10/28/2016 01:31 PM, Hannes Reinecke wrote: > > On 10/28/2016 11:53 AM, Steffen Maier wrote: > >> On 10/13/2016 06:24 PM, Johannes Thumshirn wrote: > >>> On Thu, Oct 13, 2016 at 05:15:25PM +0200, Steffen Maier wrote: ... > fc_bsg_request_handler() > req->errors =

[PATCH] staging: dgnc: Fix multi-line comment alignment

This fixes a checkpatch warning. Also, change the line above so it is aligned to the others in the same block. Signed-off-by: Fernando Apesteguia --- drivers/staging/dgnc/digi.h | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git

[PATCH 4/4] platform/chrome: cros_ec_lightbar - Avoid I2C xfer to EC during suspend

From: Jeffery Yu A Mutex lock in cros_ec_cmd_xfer which may be held by frozen Userspace thread during system suspending. So should not call this routine in suspend thread. Signed-off-by: Jeffery Yu Signed-off-by: Guenter Roeck

Re: [PATCH 2/4] pinctrl: single: Use generic parser and #pinctrl-cells for pinctrl-single,pins

* Tony Lindgren [161026 07:17]: > * Tony Lindgren [161025 09:51]: > > We can now use generic parser. To support the legacy binding without > > #pinctrl-cells, add pcs_quirk_missing_pinctrl_cells() and warn about > > missing #pinctrl-cells. > ... > > > +/** >

[tip:perf/core] perf bench mem: Ignore export.h related changes to mem{cpy,set}.S

Commit-ID: e0c4758278e2452ad28149f620b81ce43b2df7b6 Gitweb: http://git.kernel.org/tip/e0c4758278e2452ad28149f620b81ce43b2df7b6 Author: Arnaldo Carvalho de Melo AuthorDate: Tue, 25 Oct 2016 16:39:21 -0300 Committer: Arnaldo Carvalho de Melo CommitDate:

[PATCH] m68k: Fix ndelay() macro

The current ndelay() macro definition has an extra semi-colon at the end of the line thus leading to a compilation error when ndelay is used in a conditional block with curly braces like this one: if (cond) ndelay(t); else ... which, after the

Re: [PATCH] staging: vc04_services: tie up loose ends with dma_map_sg conversion

On Fri, 2016-10-28 at 11:31 -0400, Greg KH wrote: > On Fri, Oct 28, 2016 at 08:16:51AM -0700, Michael Zoran wrote: > > The conversion to dma_map_sg left a few loose ends.  This change > > ties up those loose ends. > > > > 1. Settings the DMA mask is mandatory on 64 bit even though it > > is

Re: [PATCH 00/14] introduce the BFQ-v0 I/O scheduler as an extra scheduler

On 10/28/2016 03:32 AM, Linus Walleij wrote: The patch to enable MQ looks like this: https://git.kernel.org/cgit/linux/kernel/git/linusw/linux-stericsson.git/commit/?h=mmc-mq=8f79b527e2e854071d8da019451da68d4753f71d BTW, another viable "hack" for the depth issue would be to expose more than

Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support

On Fri, Oct 28, 2016 at 05:36:46PM +0200, Jan Glauber wrote: > On Fri, Oct 28, 2016 at 04:17:49PM +0100, Will Deacon wrote: > > On Thu, Oct 20, 2016 at 01:23:51PM +0200, Jan Glauber wrote: > > > On Thu, Oct 20, 2016 at 12:37:07PM +0200, Peter Zijlstra wrote: > > > > On Thu, Oct 20, 2016 at

Re: [PATCH v6 09/16] drivers: acpi: iort: add support for ARM SMMU platform devices creation

On Tue, Oct 18, 2016 at 05:04:07PM +0100, Lorenzo Pieralisi wrote: > In ARM ACPI systems, IOMMU components are specified through static > IORT table entries. In order to create platform devices for the > corresponding ARM SMMU components, IORT kernel code should be made > able to parse IORT table

[GIT PULL] arm64: fixes for -rc3

Hi Linus, Please pull these three arm64 fixes for -rc3. They're all pretty straightforward: a couple of NUMA issues from the Huawei folks and a thinko in __page_to_voff that seems to be benign, but is certainly better off fixed. Thanks, Will --->8 The following changes since commit

[PATCH v3 0/3] dmaengine: DW DMAC: split pdata to hardware properties

This series is to address a proposal by Andy in these threads: http://www.spinics.net/lists/dmaengine/msg11506.html http://www.spinics.net/lists/dmaengine/msg11541.html Split platform data to actual hardware properties, and platform quirks. Now we able to use quirks and hardware properties

Re: [PATCH v6 2/2] x86/apic: x2apic write eoi msr notrace

On Thu, Oct 27, 2016 at 12:38:42PM +0800, Wanpeng Li wrote: ... > This patch converts x2apic write eoi msr to notrace to avoid the debug > codes splash and reverts irq_enter/irq_exit dance to avoid to make a very > frequent interrupt slower because of debug code. > > Suggested-by: Peter

Re: [PATCH v6 1/2] x86/msr: Add write msr notrace

On Thu, Oct 27, 2016 at 12:38:41PM +0800, Wanpeng Li wrote: > From: Wanpeng Li > > Add write msr notrace, it will be used by later patch. > > Suggested-by: Peter Zijlstra > Suggested-by: Paolo Bonzini > Cc: Ingo Molnar

Re: [RESEND/PATCH v6 1/3] clk: qcom: Add A53 PLL support

Hi Stephen, thanks for reviewing! On 10/28/2016 04:49 AM, Stephen Boyd wrote: On 10/19, Georgi Djakov wrote: Add support for the PLL, which generates the higher range of CPU frequencies on MSM8916 platforms. Signed-off-by: Georgi Djakov Please Cc dt reviewers.

Re: [PATCH 1/4] pinctrl: Introduce generic #pinctrl-cells and pinctrl_parse_index_with_args

* Tony Lindgren [161027 07:59]: > * Linus Walleij [161027 00:57]: > > On Tue, Oct 25, 2016 at 6:45 PM, Tony Lindgren wrote: > > > +/* > > > + * For pinctrl binding, typically #pinctrl-cells is for the pin > > > controller > > > + *

Re: [RESEND/PATCH v6 3/3] clk: qcom: Add A53 clock driver

On 10/28/2016 04:54 AM, Stephen Boyd wrote: On 10/19, Georgi Djakov wrote: Add a driver for the A53 Clock Controller. It is a hardware block that implements a combined mux and half integer divider functionality. It can choose between a fixed-rate clock or the dedicated A53 PLL. The source and

Compliment

Greetings to you! I am Carsten Andrew. I have a business proposal but due to language difference i haven't been able to communicate with the concern. I am looking for a mediator who speaks at least a little bit of English as well as Hindi from India. Please if you are interested kindly contact

[PATCHv2] clk: xgene: Don't call __pa on ioremaped address

ioremaped addresses are not linearly mapped so the physical address can not be figured out via __pa. More generally, there is no guarantee that backing value of an ioremapped address is a physical address at all. The value here is only used for debugging so just drop the call to __pa on the

[PATCHSET RFC] sched, jbd2: mark sleeps on journal->j_checkpoint_mutex as iowait

Hello, When there's heavy metadata operation traffic on ext4, the journal gets filled soon and majority of filesystem users end up blocking on journal->j_checkpoint_mutex with a stacktrace similar to the following. [] __jbd2_log_wait_for_space+0xb8/0x1d0 [] add_transaction_credits+0x286/0x2a0

[PATCH 2/4] sched: separate out io_schedule_prepare() and io_schedule_finish()

Now that IO schedule accounting is done inside __schedule(), io_schedule() can be split into three steps - prep, schedule, and finish - where the schedule part doesn't need any special annotation. This allows marking a sleep as iowait by simply wrapping an existing blocking function with

[PATCH 1/4] sched: move IO scheduling accounting from io_schedule_timeout() to __schedule()

For an interface to support blocking for IOs, it must call io_schedule() instead of schedule(). This makes it tedious to add IO blocking to existing interfaces as the switching between schedule() and io_schedule() is often buried deep. As we already have a way to mark the task as IO scheduling,

[PATCH 0/4] platform/chrome: cros_ec_lightbar - Add new features

Dear all, The following patches taken from the ChromeOS 4.4 tree adds more features to the cros_ec_lightbar driver. The patches were forward ported to current mainline and were tested on a Chromebook Pixel 2015. Note that the patches depends on [1] to apply cleanly, these cros-ec-sensors patches

[PATCH 4/4] jbd2: use mutex_lock_io() for journal->j_checkpoint_mutex

When an ext4 fs is bogged down by a lot of metadata IOs (in the reported case, it was deletion of millions of files, but any massive amount of journal writes would do), after the journal is filled up, tasks which try to access the filesystem and aren't currently performing the journal writes end

[PATCH 3/4] mutex: add mutex_lock_io()

We sometimes end up propagating IO blocking through mutexes; however, because there currently is no way of annotating mutex sleeps as iowait, there are cases where iowait and /proc/stat:procs_blocked report misleading numbers obscuring the actual state of the system. This patch adds

Re: [PATCHv2] clk: xgene: Don't call __pa on ioremaped address

Hi, >> >>> ioremaped addresses are not linearly mapped so the physical >>> address can not be figured out via __pa. More generally, there >>> is no guarantee that backing value of an ioremapped address >>> is a physical address at all. The value here is only used >>> for debugging so just drop

Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support

On Fri, Oct 28, 2016 at 04:17:49PM +0100, Will Deacon wrote: > On Thu, Oct 20, 2016 at 01:23:51PM +0200, Jan Glauber wrote: > > On Thu, Oct 20, 2016 at 12:37:07PM +0200, Peter Zijlstra wrote: > > > On Thu, Oct 20, 2016 at 11:30:36AM +0200, Jan Glauber wrote: > > > > Note: > > > > I'm using

Re: tpm_tis regression in 4.9?

On Fri, Oct 28, 2016 at 05:37:45PM +0300, Jarkko Sakkinen wrote: > > I think this patch from Jarkko's next is the fix: > > > > http://git.infradead.org/users/jjs/linux-tpmdd.git/commit/65da72b7ddcdd8990e4783d09c7e86d90ccb4121 > > > > Jarkko? Can you hurry that along to go in for -rc? > > Do

pinctrl: mediatek: build failure if CONFIG_IRQ_DOMAIN is not set

Hi, 0) A rather spartan build, on x86_64, which did include drivers/pinctrl/mediatek/pinctrl-mtk-common.o failed like this: drivers/pinctrl/mediatek/pinctrl-mtk-common.c: In function ‘mtk_gpio_to_irq’: drivers/pinctrl/mediatek/pinctrl-mtk-common.c:838:8: error: implicit declaration of function

Re: [RFC][PATCH] arm64: Add support for CONFIG_DEBUG_VIRTUAL

On 10/28/2016 07:49 AM, Mark Rutland wrote: Hi Laura, On Thu, Oct 27, 2016 at 05:18:12PM -0700, Laura Abbott wrote: x86 has an option CONFIG_DEBUG_VIRTUAL to do additional checks on virt_to_phys calls. The goal is to catch users who are calling virt_to_phys on non-linear addresses immediately.

[tip:perf/core] perf bench futex: Avoid worker cacheline bouncing

Commit-ID: e2e1680fda1573ebfdd6bba5d58f978044746993 Gitweb: http://git.kernel.org/tip/e2e1680fda1573ebfdd6bba5d58f978044746993 Author: Davidlohr Bueso AuthorDate: Mon, 24 Oct 2016 13:56:52 -0700 Committer: Arnaldo Carvalho de Melo CommitDate: Tue, 25

[PATCH 0/3] ASoC: lpass-platform: Fixes and Cleanup.

Hi Mark, This patchset fixes broken lpass-platform driver in v4.9-rc1, and also fixes problem while using lpass as kernel module. There is also a cleanup patch in this series just to tidy up the code in the same area where there is regression. Tested this patchset with msm8916 codec patchset in

[PATCH 1/3] ASoC: lpass-platform: use dma_ch instead of rdma_ch/wrdma_ch

This patch cleans up usage of wrdma_ch and rdma_ch variables into a common variable dma_ch, As there is no real use of tracking the dma channel in two different variables based on stream direction. Signed-off-by: Srinivas Kandagatla ---

[PATCH 2/3] ASoC: lpass-platform: Fix broken pcm data usage

This patch fixes lpass-platform driver which was broken in v4.9-rc1. lpass_pcm_data data structure holds information specific to stream. Holding a single private pointer to it in global lpass_data will not work, because it would be overwritten by for each pcm instance. This code was breaking

[PATCH 3/3] ASoC: lpass-cpu: add module licence and description

This patch adds module licence to lpass-cpu driver, without this patch lpass-cpu module would taint with below error: snd_soc_lpass_cpu: module license 'unspecified' taints kernel. Disabling lock debugging due to kernel taint snd_soc_lpass_cpu: Unknown symbol regmap_write (err 0)

[PATCH] [rfc, netfilter-next] netfilter: nf_tables: fib warnings

The newly added nft fib code produces two warnings: net/ipv4/netfilter/nft_fib_ipv4.c: In function 'nft_fib4_eval': net/ipv4/netfilter/nft_fib_ipv4.c:80:6: error: unused variable 'i' [-Werror=unused-variable] net/ipv4/netfilter/nft_fib_ipv4.c: In function ‘nft_fib4_eval’:

Re: [PATCH] staging: vc04_services: tie up loose ends with dma_map_sg conversion

On Fri, Oct 28, 2016 at 08:36:34AM -0700, Michael Zoran wrote: > On Fri, 2016-10-28 at 11:31 -0400, Greg KH wrote: > > On Fri, Oct 28, 2016 at 08:16:51AM -0700, Michael Zoran wrote: > > > The conversion to dma_map_sg left a few loose ends.  This change > > > ties up those loose ends. > > > > > >

Re: [PATCH v2] net: cpsw: fix obtaining mac address for am3517

* Jeroen Hofstee [161028 08:33]: > Commit b6745f6e4e63 ("drivers: net: cpsw: davinci_emac: move reading mac > id to common file") did not only move the code for an am3517, it also > added the slave parameter, resulting in an invalid (all zero) mac address > being

[PATCHv4 1/3] libfs: allow simple_fill_super() to add symlinks

simple_fill_super() will add symlinks if an entry has mode & S_IFLNK. The target is provided in the new "link" field. Signed-off-by: David Vrabel --- v4: - Use switch for file type. v2: - simplified. --- fs/libfs.c | 27 ---

[PATCHv4 2/3] xenfs: replace xenbus and privcmd with symlinks

/proc/xen/xenbus does not work correctly. A read blocked waiting for a xenstore message holds the mutex needed for atomic file position updates. This blocks any writes on the same file handle, which can deadlock if the write is needed to unblock the read. /proc/xen/xenbus is supposed to be

Re: [PATCH v2] irqchip/bcm2836: Prevent spurious interrupts

Thomas Gleixner writes: > On Thu, 27 Oct 2016, Eric Anholt wrote: > >> From: Phil Elwell >> >> The old arch-specific IRQ macros included a dsb to ensure the >> write to clear the mailbox interrupt completed before returning >> from the interrupt. The

[PATCHv4 3/3] xenfs: Use proc_create_mount_point() to create /proc/xen

From: Seth Forshee Mounting proc in user namespace containers fails if the xenbus filesystem is mounted on /proc/xen because this directory fails the "permanently empty" test. proc_create_mount_point() exists specifically to create such mountpoints in proc but is

[PATCH v4 0/3] libfs,xenfs: replace /proc/xen/xenbus with a symlink

Using /proc/xen/xenbus can cause deadlocks on the atomic file position mutex since this file should behave like a character device and not a regular file. This is easiest to achive by making it a symlink to the existing /dev/xen/xenbus device. This requires extending simple_fill_super() to add

[PATCH 0/2] kthread: make struct kthread kmalloc'ed

Sorry for delay, I was distracted... On 10/26, Thomas Gleixner wrote: > > On Wed, 26 Oct 2016, Oleg Nesterov wrote: > > On 10/26, Thomas Gleixner wrote: > > > > > > On Wed, 26 Oct 2016, Oleg Nesterov wrote: > > > > +static inline void set_kthread_struct(void *kthread) > > > > +{ > > > > +

Re: [PATCH v2 5/6] sparc64: Enable sun4v dma ops to use IOMMU v2 APIs

On 10/27/2016 05:41 PM, Joe Perches wrote: On Thu, 2016-10-27 at 17:23 -0700, Tushar Dave wrote: Add Hypervisor IOMMU v2 APIs pci_iotsb_map(), pci_iotsb_demap() and enable sun4v dma ops to use IOMMU v2 API for all PCIe devices with 64bit DMA mask. trivia: diff --git

Re: [PATCH v3 0/3] dmaengine: DW DMAC: split pdata to hardware properties

On Fri, 2016-10-28 at 18:59 +0300, Eugeniy Paltsev wrote: > This series is to address a proposal by Andy in these threads: > http://www.spinics.net/lists/dmaengine/msg11506.html > http://www.spinics.net/lists/dmaengine/msg11541.html > Split platform data to actual hardware properties, and platform

[PATCH] staging: dgnc: Fix lines longer than 80 chars.

Done by either unindenting some comments or converting them to multi line comments. This fixes some checkpatch warnings. Signed-off-by: Fernando Apesteguia --- drivers/staging/dgnc/dgnc_neo.h | 32 ++-- 1 file changed, 22

Re: [RFC 0/8] Define coherent device memory node

On Fri, Oct 28, 2016 at 10:59:52AM +0530, Aneesh Kumar K.V wrote: > Jerome Glisse writes: > > > On Wed, Oct 26, 2016 at 04:39:19PM +0530, Aneesh Kumar K.V wrote: > >> Jerome Glisse writes: > >> > >> > On Tue, Oct 25, 2016 at 09:56:35AM +0530, Aneesh

Re: [RESEND/PATCH v6 2/3] clk: qcom: Add regmap mux-div clocks support

On 10/28/2016 04:59 AM, Stephen Boyd wrote: On 10/19, Georgi Djakov wrote: diff --git a/drivers/clk/qcom/clk-regmap-mux-div.c b/drivers/clk/qcom/clk-regmap-mux-div.c new file mode 100644 index ..ec87f496606a --- /dev/null +++ b/drivers/clk/qcom/clk-regmap-mux-div.c @@ -0,0 +1,254

Re: [PATCH 1/2] of, numa: Add function to disable of_node_to_nid().

On 10/28/2016 03:19 AM, Will Deacon wrote: On Tue, Oct 25, 2016 at 02:31:00PM -0700, David Daney wrote: From: David Daney On arm64 NUMA kernels we can pass "numa=off" on the command line to disable NUMA. A side effect of this is that kmalloc_node() calls to non-zero

[PATCH v2 2/2] serial: 8250_dw: Add support for IrDA SIR mode

Add a set_ldisc function to enable/disable IrDA SIR mode according to the new line discipline, if IrDA SIR mode is supported by the hardware configuration. Signed-off-by: Ed Blake --- drivers/tty/serial/8250/8250_dw.c | 24 1 file changed, 24

Applied "regmap: include from include/linux/regmap.h" to the regmap tree

The patch regmap: include from include/linux/regmap.h has been applied to the regmap tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent

[PATCH v2 0/2] serial: Add IrDA support to 8250_dw driver

This patch set adds IrDA support to the 8250_dw driver. The first patch exposes the set_ldisc() function in the 8250 driver so it can be overridden, and the second patch adds a set_ldisc() function to the 8250_dw driver which enables / disables IrDA SIR mode if supported. v2: The 8250_dw

[PATCH v3 6/6] sparc64: Enable 64-bit DMA

ATU 64bit addressing allows PCIe devices with 64bit DMA capabilities to use ATU for 64bit DMA. Signed-off-by: Tushar Dave Reviewed-by: chris hyser Acked-by: Sowmini Varadhan --- arch/sparc/Kconfig| 4

[PATCH] staging: vc04_services: setup DMA and coherent mask

Setting the DMA mask is optional on 32 bit but is mandatory on 64 bit. Set the DMA mask and coherent to force all DMA to be in the 32 bit address space. This is considered a "good practice" and most drivers already do this. Signed-off-by: Michael Zoran ---

Re: [PATCH 00/14] introduce the BFQ-v0 I/O scheduler as an extra scheduler

On Fri, Oct 28, 2016 at 08:17:01AM -0600, Jens Axboe wrote: > On 10/28/2016 12:36 AM, Ulf Hansson wrote: > > You have been pushing Paolo in different directions throughout the > > years with his work in BFQ, wasting lots of his time/effort. > I have not. Various entities have advised Paolo

[PATCH v3 3/6] sparc64: Initialize iommu_map_table and iommu_pool

Like legacy IOMMU, use common iommu_map_table and iommu_pool for ATU. This change initializes iommu_map_table and iommu_pool for ATU. Signed-off-by: Tushar Dave Reviewed-by: chris hyser Reviewed-by: Sowmini Varadhan

Re: [RFC][PATCH] arm64: Add support for CONFIG_DEBUG_VIRTUAL

On 10/28/2016 12:52 AM, Ard Biesheuvel wrote: Hi Laura, On 28 October 2016 at 01:18, Laura Abbott wrote: x86 has an option CONFIG_DEBUG_VIRTUAL to do additional checks on virt_to_phys calls. The goal is to catch users who are calling virt_to_phys on non-linear addresses

Re: [PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable

Hi Joshua, looks good to me; however, I think since you're adding initial support, I'd squash this together with [3/5]. On Fri, Oct 28, 2016 at 09:56:42AM -0700, Joshua Clayton wrote: > The status pin may not show ready in the time described in the > Altetera manual. check the value several

[PATCH] staging: vc04_services: tie up loose ends with dma_map_sg conversion

The conversion to dma_map_sg left a few loose ends. This change ties up those loose ends. 1. Settings the DMA mask is mandatory on 64 bit even though it is optional on 32 bit. Set the mask so that DMA space is always in the lower 32 bit range of data on both platforms. 2. The scatterlist was

Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support

On Thu, Oct 20, 2016 at 01:23:51PM +0200, Jan Glauber wrote: > On Thu, Oct 20, 2016 at 12:37:07PM +0200, Peter Zijlstra wrote: > > On Thu, Oct 20, 2016 at 11:30:36AM +0200, Jan Glauber wrote: > > > Note: > > > I'm using perf_sw_context in difference to perf_invalid_context > > > (see WARN_ON in

Re: [net-next PATCH RFC 07/26] arch/c6x: Add option to skip sync on DMA map and unmap

On Mon, 2016-10-24 at 08:05 -0400, Alexander Duyck wrote: > This change allows us to pass DMA_ATTR_SKIP_CPU_SYNC which allows us to > avoid invoking cache line invalidation if the driver will just handle it > later via a sync_for_cpu or sync_for_device call. > > Cc: Mark Salter

Re: [PATCH v6 0/3] LSM: security module information improvements

On 10/28/2016 2:28 AM, James Morris wrote: > On Thu, 27 Oct 2016, Casey Schaufler wrote: > >> The 3/3 patch is forward looking, I'll admit. Userspace >> can start getting ready for the combined format in >> advance of multiple major modules. When complete module >> stacking patches are available I

Re: [PATCH] staging: vc04_services: tie up loose ends with dma_map_sg conversion

On Fri, Oct 28, 2016 at 08:16:51AM -0700, Michael Zoran wrote: > The conversion to dma_map_sg left a few loose ends. This change > ties up those loose ends. > > 1. Settings the DMA mask is mandatory on 64 bit even though it > is optional on 32 bit. Set the mask so that DMA space is always > in

Re: [PATCH v12 RESEND 0/4] generic TEE subsystem

On 10/28/2016 05:19 AM, Jens Wiklander wrote: > Hi, > > This patch set introduces a generic TEE subsystem. The TEE subsystem will > contain drivers for various TEE implementations. A TEE (Trusted Execution > Environment) is a trusted OS running in some secure environment, for > example, TrustZone

Re: [PATCH 00/14] introduce the BFQ-v0 I/O scheduler as an extra scheduler

Hi, On Friday, October 28, 2016 09:30:07 AM Jens Axboe wrote: > On 10/28/2016 03:32 AM, Linus Walleij wrote: > > The patch to enable MQ looks like this: > > https://git.kernel.org/cgit/linux/kernel/git/linusw/linux-stericsson.git/commit/?h=mmc-mq=8f79b527e2e854071d8da019451da68d4753f71d > >

Re: [RFC 0/8] Define coherent device memory node

On Fri, Oct 28, 2016 at 11:17:31AM +0530, Anshuman Khandual wrote: > On 10/27/2016 08:35 PM, Jerome Glisse wrote: > > On Thu, Oct 27, 2016 at 12:33:05PM +0530, Anshuman Khandual wrote: > >> On 10/27/2016 10:08 AM, Anshuman Khandual wrote: > >>> On 10/26/2016 09:32 PM, Jerome Glisse wrote: >

Re: [PATCH v4 0/3] libfs,xenfs: replace /proc/xen/xenbus with a symlink

On Fri, Oct 28, 2016 at 04:52:36PM +0100, David Vrabel wrote: > Using /proc/xen/xenbus can cause deadlocks on the atomic file position > mutex since this file should behave like a character device and not a > regular file. This is easiest to achive by making it a symlink to the > existing

Re: [PATCH v18 0/4] Introduce usb charger framework to deal with the usb gadget power negotation

On Fri, Oct 28, 2016 at 08:51:41PM +0800, Baolin Wang wrote: > On 28 October 2016 at 06:00, NeilBrown wrote: > > 1/ I think we agreed that it doesn't make sense for there to be > > two chargers registered in a system. > Yes, until now... > > However usb_charger_register()

Re: [kernel-hardening] rowhammer protection [was Re: Getting interrupt every million cache misses]

Hi! > On Fri, Oct 28, 2016 at 01:21:36PM +0200, Pavel Machek wrote: > > > Has this been tested on a system vulnerable to rowhammer, and if so, was > > > it reliable in mitigating the issue? > > > > > > Which particular attack codebase was it tested against? > > > > I have rowhammer-test here, >

[PATCH v2 1/2] x86/AMD: Fix cpu_llc_id for AMD Fam17h systems

The current Fam17h cpu_llc_id derivation has an underflow bug when extracting the socket_id value. The socket_id value starts from 0, so subtracting 1 will result in an underflow. This breaks scheduling topology later on since the cpu_llc_id will be incorrect. The apicid decoding is fixed for

Re: [net-next PATCH 02/27] swiotlb-xen: Enforce return of DMA_ERROR_CODE in mapping function

On Tue, Oct 25, 2016 at 11:36:58AM -0400, Alexander Duyck wrote: > The mapping function should always return DMA_ERROR_CODE when a mapping has > failed as this is what the DMA API expects when a DMA error has occurred. > The current function for mapping a page in Xen was returning either >

[PATCH 0/2] mmc: sdhci: Fix sdhci caps register bits with corrections provided by dt

For various reasons the sdhci caps register can be incorrect. This patch set introduces a general way to correct the bits when they are read to accurately reflect the capabilties of the controller/board combo. The first patch creates sdhci-caps and sdhci-caps-mask dt properties that combined

Re: xrandr fails after resume from hibernation in kernels 4.7.4 and 4.8.0

On Fri, Oct 07, 2016 at 10:38:17AM -0300, Gaston Gonzalez wrote: > On Wed, Oct 05, 2016 at 07:23:23AM +0200, Greg KH wrote: > > On Tue, Oct 04, 2016 at 08:43:03PM -0300, Gaston Gonzalez wrote: > > > Hi, > > > > > > After hibernation I get the following error when I tried to connect to > > >

[PATCH 2/2] Revert "kthread: Pin the stack via try_get_task_stack()/put_task_stack() in to_live_kthread() function"

This reverts commit 23196f2e5f5d810578a772785807dcdc2b9fdce9. After the previous change struct kthread can't go away, no need to pin the stack. TODO: kill to_live_kthread(). Signed-off-by: Oleg Nesterov --- kernel/kthread.c | 8 ++-- 1 file changed, 2 insertions(+), 6

Re: [RFC v1 06/14] bus1: util - queue utility library

On Fri, Oct 28, 2016 at 04:33:50PM +0200, Tom Gundersen wrote: > Ah, I see, we are talking past each other. Ah I see where my reasoning went wobbly, not sure how to fully express that yet. I think your solution is stronger than strictly required though, but I'm not sure there's a better one.

[PATCH v2 1/2] serial: 8250: Expose set_ldisc function

Expose set_ldisc() function so that it can be overridden with a platform specific implementation. Signed-off-by: Ed Blake --- drivers/tty/serial/8250/8250_core.c | 3 +++ drivers/tty/serial/8250/8250_port.c | 12 ++-- include/linux/serial_8250.h | 4

[PATCH v3 1/6] sparc64: Add FORCE_MAX_ZONEORDER and default to 13

From: Dave Kleikamp This change allows ATU (new IOMMU) in SPARC systems to request large (32M) contiguous memory during boot for creating IOTSB backing store. Signed-off-by: Dave Kleikamp Signed-off-by: Tushar Dave

Re: [GIT PULL] Re: [PATCH 08/15] perf tools: Introduce timestamp_in_usec()

sue, > > > So, here is how it ended up, it fixes the problem you pointed out and > > renames the function to follow the scnprintf() convention, as used > > elsewhere in tools/perf (tools/perf/util/annotate.h has several > > examples). > > Ingo, I've just signed a perf-core-f

Re: [PATCH] mac80211: Ignore VHT IE from peer with wrong rx_mcs_map

On Fri, 2016-10-28 at 16:38 +0200, Filip Matusiak wrote: > This is a workaround for VHT-enabled STAs which break the spec > and have the VHT-MCS Rx map filled in with value 3 for all eight > spacial streams. > > As per spec, in section 22.1.1 Introduction to the VHT PHY > A VHT STA shall support

Re: [PATCH v2 3/4] input: Deprecate real timestamps beyond year 2106

On Friday, October 28, 2016 8:19:46 AM CEST Deepa Dinamani wrote: > On Fri, Oct 28, 2016 at 5:43 AM, Arnd Bergmann wrote: > > On Monday, October 17, 2016 8:27:32 PM CEST Deepa Dinamani wrote: > >> @@ -55,24 +60,24 @@ struct ff_effect_compat { > >> > >> static inline size_t

Re: [Intel-gfx] xrandr fails after resume from hibernation in kernels 4.7.4 and 4.8.0

On Fri, Oct 28, 2016 at 11:53:40AM -0400, Greg KH wrote: > On Fri, Oct 07, 2016 at 10:38:17AM -0300, Gaston Gonzalez wrote: > > On Wed, Oct 05, 2016 at 07:23:23AM +0200, Greg KH wrote: > > > On Tue, Oct 04, 2016 at 08:43:03PM -0300, Gaston Gonzalez wrote: > > > > Hi, > > > > > > > > After

Re: [PATCH] ubifs: Fix regression in ubifs_readdir()

Jörg, On 28.10.2016 18:19, Jörg Krause wrote: > Hi, > > On Fri, 2016-10-28 at 11:53 +0200, Richard Weinberger wrote: >> Commit c83ed4c9dbb35 ("ubifs: Abort readdir upon error") broke >> overlayfs support because the fix exposed an internal error >> code to VFS. >> >> Reported-by: Peter Rosin

Re: [PATCHv2] clk: xgene: Don't call __pa on ioremaped address

Hi Laura, > ioremaped addresses are not linearly mapped so the physical > address can not be figured out via __pa. More generally, there > is no guarantee that backing value of an ioremapped address > is a physical address at all. The value here is only used > for debugging so just drop the call

Re: [net-next PATCH 00/27] Add support for DMA writable pages being writable by the network stack

From: Alexander Duyck Date: Fri, 28 Oct 2016 08:48:01 -0700 > So the feedback for this set has been mostly just a few "Acked-by"s, > and it looks like the series was marked as "Not Applicable" in > patchwork. I was wondering what the correct merge strategy for this >

[PATCH v3 5/6] sparc64: Enable sun4v dma ops to use IOMMU v2 APIs

Add Hypervisor IOMMU v2 APIs pci_iotsb_map(), pci_iotsb_demap() and enable sun4v dma ops to use IOMMU v2 API for all PCIe devices with 64bit DMA mask. Signed-off-by: Tushar Dave Reviewed-by: chris hyser Acked-by: Sowmini Varadhan

[PATCH v3 2/6] sparc64: Add ATU (new IOMMU) support

ATU (Address Translation Unit) is a new IOMMU in SPARC supported with Hypervisor IOMMU v2 APIs. Current SPARC IOMMU supports only 32bit address ranges and one TSB per PCIe root complex that has a 2GB per root complex DVMA space limit. The limit has become a scalability bottleneck nowadays that a

[PATCH v3 0/6] sparc: Enable sun4v hypervisor PCI IOMMU v2 APIs and ATU

ATU (Address Translation Unit) is a new IOMMU in SPARC supported with sun4v hypervisor PCI IOMMU v2 APIs. Current SPARC IOMMU supports only 32bit address ranges and one TSB per PCIe root complex that has a 2GB per root complex DVMA space limit. The limit has become a scalability bottleneck

[PATCH v3 4/6] sparc64: Bind PCIe devices to use IOMMU v2 service

In order to use Hypervisor (HV) IOMMU v2 API for map/demap, each PCIe device has to be bound to IOTSB using HV API pci_iotsb_bind(). Signed-off-by: Tushar Dave Reviewed-by: chris hyser Acked-by: Sowmini Varadhan ---

Re: [PATCH v2 0/2] serial: Add IrDA support to 8250_dw driver

I like this idea. OMAP UART (8250_omap) also can be switched to IrDA mode, but I don't know anyone who use it. 2016-10-28 20:04 GMT+03:00 Ed Blake : > This patch set adds IrDA support to the 8250_dw driver. The first patch > exposes > the set_ldisc() function in the 8250

[tip:perf/core] perf list: Support matching by topic

Commit-ID: 67bdc35fb48c97502dd4b9eeac561e4bcc18684b Gitweb: http://git.kernel.org/tip/67bdc35fb48c97502dd4b9eeac561e4bcc18684b Author: Andi Kleen AuthorDate: Wed, 19 Oct 2016 11:45:23 -0700 Committer: Arnaldo Carvalho de Melo CommitDate: Fri, 28

<    1   2   3   4   5   6   7   8   9   10   >