Re: [PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

On Tue, Nov 08, 2016 at 08:01:39AM -0800, Andy Lutomirski wrote: > > diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c > > index 0888a87..32b7301 100644 > > --- a/arch/x86/kernel/process.c > > +++ b/arch/x86/kernel/process.c > > @@ -233,6 +233,16 @@ void __switch_to_xtra(struct

Re: [PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

On Tue, Nov 08, 2016 at 08:01:39AM -0800, Andy Lutomirski wrote: > > diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c > > index 0888a87..32b7301 100644 > > --- a/arch/x86/kernel/process.c > > +++ b/arch/x86/kernel/process.c > > @@ -233,6 +233,16 @@ void __switch_to_xtra(struct

Re: [PATCH 0/4] x86: enable User-Mode Instruction Prevention

On Tue, 8 Nov 2016, Andy Lutomirski wrote: > On Tue, Nov 8, 2016 at 5:16 AM, Peter Zijlstra wrote: > > On Mon, Nov 07, 2016 at 10:12:09PM -0800, Ricardo Neri wrote: > >> There is a caveat, however. Certain applications running in virtual-8086 > >> mode, such as DOSEMU[1] and

Re: [PATCH 0/4] x86: enable User-Mode Instruction Prevention

On Tue, 8 Nov 2016, Andy Lutomirski wrote: > On Tue, Nov 8, 2016 at 5:16 AM, Peter Zijlstra wrote: > > On Mon, Nov 07, 2016 at 10:12:09PM -0800, Ricardo Neri wrote: > >> There is a caveat, however. Certain applications running in virtual-8086 > >> mode, such as DOSEMU[1] and Wine[2], want to

Re: [PATCH] drbd: Fix kernel_sendmsg() usage

On Tue, Nov 08 2016, Richard Weinberger wrote: > On 08.11.2016 14:43, Lars Ellenberg wrote: > > From 3a5859e696178e31a25e65de58c461046fc52beb Mon Sep 17 00:00:00 2001 > > From: Richard Weinberger > > Date: Tue, 8 Nov 2016 11:43:09 +0100 > > Subject: [PATCH] drbd: Fix

Re: [PATCH] arm64: dts: marvell: add unique identifiers for Armada A8k SPI controllers

Hi Thomas, 2016-11-08 17:48 GMT+01:00 Thomas Petazzoni : > Hello, > > On Tue, 8 Nov 2016 17:31:32 +0100, Marcin Wojtas wrote: >> Enabling SPI controllers, which are attached to different busses >> inside an SoC, may result in overlapping enumeration and cause

Re: [PATCH] drbd: Fix kernel_sendmsg() usage

On Tue, Nov 08 2016, Richard Weinberger wrote: > On 08.11.2016 14:43, Lars Ellenberg wrote: > > From 3a5859e696178e31a25e65de58c461046fc52beb Mon Sep 17 00:00:00 2001 > > From: Richard Weinberger > > Date: Tue, 8 Nov 2016 11:43:09 +0100 > > Subject: [PATCH] drbd: Fix kernel_sendmsg() usage -

Re: [PATCH] arm64: dts: marvell: add unique identifiers for Armada A8k SPI controllers

Hi Thomas, 2016-11-08 17:48 GMT+01:00 Thomas Petazzoni : > Hello, > > On Tue, 8 Nov 2016 17:31:32 +0100, Marcin Wojtas wrote: >> Enabling SPI controllers, which are attached to different busses >> inside an SoC, may result in overlapping enumeration and cause >> sysfs registration failure.

Re: [PATCH] sched/rt: RT_RUNTIME_GREED sched feature

On Tue, Nov 08, 2016 at 09:07:40AM -0500, Steven Rostedt wrote: > On Tue, 8 Nov 2016 12:59:58 +0100 > Peter Zijlstra wrote: > > > No, none of this stands a chance of being accepted. > > > > This is making bad code worse. > > Peter, > > Instead of a flat out rejection,

Re: [PATCH] usbnet: prevent device rpm suspend in usbnet_probe function

Alan Stern writes: > On Tue, 8 Nov 2016, Kai-Heng Feng wrote: > >> Hi, >> >> On Mon, Nov 7, 2016 at 7:02 PM, Oliver Neukum wrote: >> > On Fri, 2016-11-04 at 17:57 +0800, Kai-Heng Feng wrote: >> >> Sometimes cdc_mbim failed to probe if runtime pm is

Re: [PATCH] drm: mali-dp: Add support for setting plane's rotation property from userspace.

On Tue, Nov 08, 2016 at 05:16:41PM +0100, Daniel Vetter wrote: > On Tue, Nov 08, 2016 at 01:43:25PM +, Liviu Dudau wrote: > > In order to support DRM_IOCTL_MODE_OBJ_SETPROPERTY for the rotation property > > we need to have a ->set_property hook defined for the planes. Set the > > plane's

Re: [PATCH] sched/rt: RT_RUNTIME_GREED sched feature

On Tue, Nov 08, 2016 at 09:07:40AM -0500, Steven Rostedt wrote: > On Tue, 8 Nov 2016 12:59:58 +0100 > Peter Zijlstra wrote: > > > No, none of this stands a chance of being accepted. > > > > This is making bad code worse. > > Peter, > > Instead of a flat out rejection, can you please provide

Re: [PATCH] usbnet: prevent device rpm suspend in usbnet_probe function

Alan Stern writes: > On Tue, 8 Nov 2016, Kai-Heng Feng wrote: > >> Hi, >> >> On Mon, Nov 7, 2016 at 7:02 PM, Oliver Neukum wrote: >> > On Fri, 2016-11-04 at 17:57 +0800, Kai-Heng Feng wrote: >> >> Sometimes cdc_mbim failed to probe if runtime pm is enabled: >> >> [9.305626] cdc_mbim: probe

Re: [PATCH] drm: mali-dp: Add support for setting plane's rotation property from userspace.

On Tue, Nov 08, 2016 at 05:16:41PM +0100, Daniel Vetter wrote: > On Tue, Nov 08, 2016 at 01:43:25PM +, Liviu Dudau wrote: > > In order to support DRM_IOCTL_MODE_OBJ_SETPROPERTY for the rotation property > > we need to have a ->set_property hook defined for the planes. Set the > > plane's

Re: [PATCH v2 0/2] arm64: fix the bugs found in the hugetlb test

On Tue, Nov 08, 2016 at 02:09:09PM +, Catalin Marinas wrote: > On Tue, Nov 08, 2016 at 01:44:37PM +0800, Huang Shijie wrote: > > (3) The test result in the Softiron and Juno-r1 boards: > > > >This detail test result shows below (both the "make func" & "make > > stress"): > > > > 4KB

Re: [PATCH v2 0/2] arm64: fix the bugs found in the hugetlb test

On Tue, Nov 08, 2016 at 02:09:09PM +, Catalin Marinas wrote: > On Tue, Nov 08, 2016 at 01:44:37PM +0800, Huang Shijie wrote: > > (3) The test result in the Softiron and Juno-r1 boards: > > > >This detail test result shows below (both the "make func" & "make > > stress"): > > > > 4KB

Re: [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced

On Tue, Nov 08, 2016 at 04:33:44PM +, John Garry wrote: > On 08/11/2016 16:12, Will Deacon wrote: > >On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote: > >>+static inline void arm64_set_extops(struct extio_ops *ops) > >>+{ > >>+ if (ops) > >>+

Re: [PATCH] arm64: dts: marvell: add unique identifiers for Armada A8k SPI controllers

Hello, On Tue, 8 Nov 2016 17:31:32 +0100, Marcin Wojtas wrote: > Enabling SPI controllers, which are attached to different busses > inside an SoC, may result in overlapping enumeration and cause > sysfs registration failure. Example log after enabling two > controllers on Armada 8040 SoC with

Re: [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced

On Tue, Nov 08, 2016 at 04:33:44PM +, John Garry wrote: > On 08/11/2016 16:12, Will Deacon wrote: > >On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote: > >>+static inline void arm64_set_extops(struct extio_ops *ops) > >>+{ > >>+ if (ops) > >>+

Re: [PATCH] arm64: dts: marvell: add unique identifiers for Armada A8k SPI controllers

Hello, On Tue, 8 Nov 2016 17:31:32 +0100, Marcin Wojtas wrote: > Enabling SPI controllers, which are attached to different busses > inside an SoC, may result in overlapping enumeration and cause > sysfs registration failure. Example log after enabling two > controllers on Armada 8040 SoC with

Re: [PATCH] gpio: tegra186: Add support for T186 GPIO

On 11/08/2016 08:55 AM, Thierry Reding wrote: On Mon, Nov 07, 2016 at 05:42:33PM -0800, Olof Johansson wrote: On Mon, Nov 7, 2016 at 5:21 AM, Thierry Reding wrote: On Mon, Nov 07, 2016 at 08:53:37AM +0100, Linus Walleij wrote: On Wed, Nov 2, 2016 at 11:48 AM, Suresh

Re: [PATCH] gpio: tegra186: Add support for T186 GPIO

On 11/08/2016 08:55 AM, Thierry Reding wrote: On Mon, Nov 07, 2016 at 05:42:33PM -0800, Olof Johansson wrote: On Mon, Nov 7, 2016 at 5:21 AM, Thierry Reding wrote: On Mon, Nov 07, 2016 at 08:53:37AM +0100, Linus Walleij wrote: On Wed, Nov 2, 2016 at 11:48 AM, Suresh Mangipudi wrote: Add

Re: [PATCH v3 0/4] make POSIX timers optional with some Kconfig help

On Mon, 7 Nov 2016, Nicolas Pitre wrote: > Many embedded systems don't need the full POSIX timer support. > Configuring them out provides a nice kernel image size reduction. > > When POSIX timers are configured out, the PTP clock subsystem should be > left out as well. However a bunch of

Re: [PATCH v3 0/4] make POSIX timers optional with some Kconfig help

On Mon, 7 Nov 2016, Nicolas Pitre wrote: > Many embedded systems don't need the full POSIX timer support. > Configuring them out provides a nice kernel image size reduction. > > When POSIX timers are configured out, the PTP clock subsystem should be > left out as well. However a bunch of

[PATCH v2] spi: atmel: use managed resource for gpio chip select

Use the managed gpio CS pin request so that we avoid having trouble in the cleanup code. In fact, if module was configured with DT, cleanup code released invalid pin. Since resource wasn't freed, module cannot be reinserted. This require to extract the gpio request call from the "setup" function

[PATCH v2] spi: atmel: use managed resource for gpio chip select

Use the managed gpio CS pin request so that we avoid having trouble in the cleanup code. In fact, if module was configured with DT, cleanup code released invalid pin. Since resource wasn't freed, module cannot be reinserted. This require to extract the gpio request call from the "setup" function

Re: [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced

On 08/11/2016 16:12, Will Deacon wrote: On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote: For arm64, there is no I/O space as other architectural platforms, such as X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs, such as Hip06, when accessing some legacy

Re: [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced

On 08/11/2016 16:12, Will Deacon wrote: On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote: For arm64, there is no I/O space as other architectural platforms, such as X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs, such as Hip06, when accessing some legacy

Re: [PATCH v11 09/22] vfio iommu type1: Add task structure to vfio_dma

On Tue, 8 Nov 2016 19:43:25 +0530 Kirti Wankhede wrote: > On 11/8/2016 2:33 AM, Alex Williamson wrote: > > On Sat, 5 Nov 2016 02:40:43 +0530 > > Kirti Wankhede wrote: > > > > ... > > >> static int vfio_dma_do_map(struct vfio_iommu *iommu, > >>

Re: [PATCH v11 09/22] vfio iommu type1: Add task structure to vfio_dma

On Tue, 8 Nov 2016 19:43:25 +0530 Kirti Wankhede wrote: > On 11/8/2016 2:33 AM, Alex Williamson wrote: > > On Sat, 5 Nov 2016 02:40:43 +0530 > > Kirti Wankhede wrote: > > > > ... > > >> static int vfio_dma_do_map(struct vfio_iommu *iommu, > >> struct

Re: [PATCH] MAINTAINERS: Claim atomic*_t maintainership

On Tue, Nov 08, 2016 at 03:06:03PM +0100, Peter Zijlstra wrote: > > Since Will and me have rewritten and heavily extended the atomic*_t > infrastructure over the past few years, claim ownership of it. > > We would also like to add Boqun as he helped out with PowerPC and has shown > good

Re: [PATCH] MAINTAINERS: Claim atomic*_t maintainership

On Tue, Nov 08, 2016 at 03:06:03PM +0100, Peter Zijlstra wrote: > > Since Will and me have rewritten and heavily extended the atomic*_t > infrastructure over the past few years, claim ownership of it. > > We would also like to add Boqun as he helped out with PowerPC and has shown > good

[PATCH 1/2] dt-bindings: sound: document axentia,tse850-pcm5142 bindings

The TSE-850 is an FM Transmitter Station Equipment, designed to generate baseband signals for FM, mainly the DARC subcarrier, but other signals are also possible. Signed-off-by: Peter Rosin --- .../bindings/sound/axentia,tse850-pcm5142.txt | 88 ++

[PATCH 1/2] dt-bindings: sound: document axentia,tse850-pcm5142 bindings

The TSE-850 is an FM Transmitter Station Equipment, designed to generate baseband signals for FM, mainly the DARC subcarrier, but other signals are also possible. Signed-off-by: Peter Rosin --- .../bindings/sound/axentia,tse850-pcm5142.txt | 88 ++ MAINTAINERS

Re: [Nouveau] [PATCH] drm/nouveau: fix LEDS_CLASS=m configuration

On 8 November 2016 at 16:21, Karol Herbst wrote: > 2016-11-08 17:12 GMT+01:00 Arnd Bergmann : >> On Tuesday, November 8, 2016 5:07:01 PM CET Lukas Wunner wrote: >>> On Tue, Nov 08, 2016 at 04:52:49PM +0100, Arnd Bergmann wrote: >>> > The underlying problem is

Re: [Nouveau] [PATCH] drm/nouveau: fix LEDS_CLASS=m configuration

On 8 November 2016 at 16:21, Karol Herbst wrote: > 2016-11-08 17:12 GMT+01:00 Arnd Bergmann : >> On Tuesday, November 8, 2016 5:07:01 PM CET Lukas Wunner wrote: >>> On Tue, Nov 08, 2016 at 04:52:49PM +0100, Arnd Bergmann wrote: >>> > The underlying problem is that we already have a number of

Re: [Intel-gfx] [PATCH] drm/i915: avoid harmless empty-body warning

On Tue, Nov 08, 2016 at 02:49:05PM +, Chris Wilson wrote: > On Tue, Nov 08, 2016 at 02:58:17PM +0100, Arnd Bergmann wrote: > > The newly added assert_kernel_context_is_current introduces a warning > > when built with W=1: > > > > drivers/gpu/drm/i915/i915_gem.c: In function > >

Re: [Intel-gfx] [PATCH] drm/i915: avoid harmless empty-body warning

On Tue, Nov 08, 2016 at 02:49:05PM +, Chris Wilson wrote: > On Tue, Nov 08, 2016 at 02:58:17PM +0100, Arnd Bergmann wrote: > > The newly added assert_kernel_context_is_current introduces a warning > > when built with W=1: > > > > drivers/gpu/drm/i915/i915_gem.c: In function > >

Re: [Intel-wired-lan] [PATCH] igb: use igb_adapter->io_addr instead of e1000_hw->hw_addr

On Nov 8 15:06, Cao jin wrote: > When running as guest, under certain condition, it will oops as following. > writel() in igb_configure_tx_ring() results in oops, because hw->hw_addr > is NULL. While other register access won't oops kernel because they use > wr32/rd32 which have a defense against

Re: [Intel-wired-lan] [PATCH] igb: use igb_adapter->io_addr instead of e1000_hw->hw_addr

On Nov 8 15:06, Cao jin wrote: > When running as guest, under certain condition, it will oops as following. > writel() in igb_configure_tx_ring() results in oops, because hw->hw_addr > is NULL. While other register access won't oops kernel because they use > wr32/rd32 which have a defense against

Re: [PATCH v11 05/22] vfio iommu: Added pin and unpin callback functions to vfio_iommu_driver_ops

On Tue, 8 Nov 2016 19:25:35 +0530 Kirti Wankhede wrote: > On 11/8/2016 1:06 AM, Alex Williamson wrote: > > On Sat, 5 Nov 2016 02:40:39 +0530 > > Kirti Wankhede wrote: > > > ... > >> +int vfio_pin_pages(struct device *dev, unsigned long *user_pfn, >

Re: [PATCH v11 05/22] vfio iommu: Added pin and unpin callback functions to vfio_iommu_driver_ops

On Tue, 8 Nov 2016 19:25:35 +0530 Kirti Wankhede wrote: > On 11/8/2016 1:06 AM, Alex Williamson wrote: > > On Sat, 5 Nov 2016 02:40:39 +0530 > > Kirti Wankhede wrote: > > > ... > >> +int vfio_pin_pages(struct device *dev, unsigned long *user_pfn, > >> + int npage, int prot,

Re: [PATCH] libfc: fix seconds_since_last_reset miscalculation

On 11/08/16 00:45, Johannes Thumshirn wrote: > Commit 540eb1eef 'scsi: libfc: fix seconds_since_last_reset calculation' > removed the use of 'struct timespec' from fc_get_host_stats(). This broke the > output of 'fcoeadm -s' after kernel 4.8-rc1 as lport->boot_time - jiffies > could become

Re: [PATCH] libfc: fix seconds_since_last_reset miscalculation

On 11/08/16 00:45, Johannes Thumshirn wrote: > Commit 540eb1eef 'scsi: libfc: fix seconds_since_last_reset calculation' > removed the use of 'struct timespec' from fc_get_host_stats(). This broke the > output of 'fcoeadm -s' after kernel 4.8-rc1 as lport->boot_time - jiffies > could become

Re: [PATCH v3 00/10] Add DT support for ohci-da8xx

Hi, On Mon, Nov 7, 2016 at 9:39 PM, Axel Haslam wrote: > The purpose of this patch series is to add DT support for the davinci > ohci driver. > To make it easier to review. I will split the arch/arm and driver patches into separate series. Regards Axel > To be able to

Re: [PATCH v3 00/10] Add DT support for ohci-da8xx

Hi, On Mon, Nov 7, 2016 at 9:39 PM, Axel Haslam wrote: > The purpose of this patch series is to add DT support for the davinci > ohci driver. > To make it easier to review. I will split the arch/arm and driver patches into separate series. Regards Axel > To be able to use device tree to

Re: [PATCH V2 3/4] regulator: pv88080: Update Regulator driver for MFD support

On Tue, Nov 08, 2016 at 05:59:41AM +, Eric Hyeung Dong Jeong wrote: > Thank you for the comments. > There was an internal request to release driver based on Kernel 3.18 for GPIO > and MFD support. > After that, the code has been kept. I will send a patch again after changes. Please don't

Re: [PATCH V2 3/4] regulator: pv88080: Update Regulator driver for MFD support

On Tue, Nov 08, 2016 at 05:59:41AM +, Eric Hyeung Dong Jeong wrote: > Thank you for the comments. > There was an internal request to release driver based on Kernel 3.18 for GPIO > and MFD support. > After that, the code has been kept. I will send a patch again after changes. Please don't

Re: [PATCH 3/7] genirq/affinity: Handle pre/post vectors in irq_create_affinity_masks()

On Tue, Nov 08, 2016 at 05:27:52PM +0100, Thomas Gleixner wrote: > On Tue, 8 Nov 2016, Christoph Hellwig wrote: > > > On Tue, Nov 08, 2016 at 03:59:16PM +0100, Hannes Reinecke wrote: > > > > > > Which you don't in this patch: > > > > True. We will always in the end, but the split isn't right,

Re: [PATCH 3/7] genirq/affinity: Handle pre/post vectors in irq_create_affinity_masks()

On Tue, Nov 08, 2016 at 05:27:52PM +0100, Thomas Gleixner wrote: > On Tue, 8 Nov 2016, Christoph Hellwig wrote: > > > On Tue, Nov 08, 2016 at 03:59:16PM +0100, Hannes Reinecke wrote: > > > > > > Which you don't in this patch: > > > > True. We will always in the end, but the split isn't right,

Re: [char-misc-next 2/2] mei: send OS type to the FW

On Tue, Nov 08, 2016 at 06:26:09PM +0200, Tomas Winkler wrote: > From: Alexander Usyskin > > Tell the FW that we are running a sane OS and TPM2_ChangeEPS() > is supported. This workaround was added to support other broken OS > and we need to follow here. The command

Re: [char-misc-next 2/2] mei: send OS type to the FW

On Tue, Nov 08, 2016 at 06:26:09PM +0200, Tomas Winkler wrote: > From: Alexander Usyskin > > Tell the FW that we are running a sane OS and TPM2_ChangeEPS() > is supported. This workaround was added to support other broken OS > and we need to follow here. The command is sent just once at the boot

[PATCH 1/2] mfd: pm8921: add support to pm8821

This patch adds support to PM8821 PMIC and interrupt support. PM8821 is companion device that supplements primary PMIC PM8921 IC. Signed-off-by: Srinivas Kandagatla --- Tested this patch for MPP and IRQ functionality on IFC6410 and SD600 EVAL board with mpps

[PATCH 1/2] mfd: pm8921: add support to pm8821

This patch adds support to PM8821 PMIC and interrupt support. PM8821 is companion device that supplements primary PMIC PM8921 IC. Signed-off-by: Srinivas Kandagatla --- Tested this patch for MPP and IRQ functionality on IFC6410 and SD600 EVAL board with mpps PM8821 and PM8921.

Re: [PATCH 3/7] genirq/affinity: Handle pre/post vectors in irq_create_affinity_masks()

On Tue, 8 Nov 2016, Christoph Hellwig wrote: > On Tue, Nov 08, 2016 at 03:59:16PM +0100, Hannes Reinecke wrote: > > > > Which you don't in this patch: > > True. We will always in the end, but the split isn't right, we'll > need to pass the non-NULL argument starting in this patch. No, in the

Re: [PATCH 3/7] genirq/affinity: Handle pre/post vectors in irq_create_affinity_masks()

On Tue, 8 Nov 2016, Christoph Hellwig wrote: > On Tue, Nov 08, 2016 at 03:59:16PM +0100, Hannes Reinecke wrote: > > > > Which you don't in this patch: > > True. We will always in the end, but the split isn't right, we'll > need to pass the non-NULL argument starting in this patch. No, in the

[PATCH] arm64: dts: marvell: add unique identifiers for Armada A8k SPI controllers

Enabling SPI controllers, which are attached to different busses inside an SoC, may result in overlapping enumeration and cause sysfs registration failure. Example log after enabling two controllers on Armada 8040 SoC with same identifiers: [3.740415] sysfs: cannot create duplicate filename

[PATCH] arm64: dts: marvell: add unique identifiers for Armada A8k SPI controllers

Enabling SPI controllers, which are attached to different busses inside an SoC, may result in overlapping enumeration and cause sysfs registration failure. Example log after enabling two controllers on Armada 8040 SoC with same identifiers: [3.740415] sysfs: cannot create duplicate filename

[PATCH 2/2] ARM: dts: apq8064: add support to pm8821

Signed-off-by: Srinivas Kandagatla --- arch/arm/boot/dts/qcom-apq8064.dtsi | 28 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 1dbe697..fde006c 100644

[PATCH 2/2] ARM: dts: apq8064: add support to pm8821

Signed-off-by: Srinivas Kandagatla --- arch/arm/boot/dts/qcom-apq8064.dtsi | 28 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 1dbe697..fde006c 100644 ---

Re: [PATCH 4/6] clk: stm32f4: Add I2S clock

On 11/07/2016 03:14 PM, Daniel Thompson wrote: On 07/11/16 13:05, gabriel.fernan...@st.com wrote: From: Gabriel Fernandez This patch introduces I2S clock for stm32f4 soc. The I2S clock could be derived from an external clock or from pll-i2s Signed-off-by: Gabriel

Re: [PATCH 4/6] clk: stm32f4: Add I2S clock

On 11/07/2016 03:14 PM, Daniel Thompson wrote: On 07/11/16 13:05, gabriel.fernan...@st.com wrote: From: Gabriel Fernandez This patch introduces I2S clock for stm32f4 soc. The I2S clock could be derived from an external clock or from pll-i2s Signed-off-by: Gabriel Fernandez ---

Re: [PATCH v11 11/22] vfio iommu: Add blocking notifier to notify DMA_UNMAP

On 11/8/2016 5:15 AM, Alex Williamson wrote: > On Sat, 5 Nov 2016 02:40:45 +0530 > Kirti Wankhede wrote: > ... >> >> +int vfio_register_notifier(struct device *dev, struct notifier_block *nb) > > Is the expectation here that this is a generic notifier for all >

Re: [PATCH v11 11/22] vfio iommu: Add blocking notifier to notify DMA_UNMAP

On 11/8/2016 5:15 AM, Alex Williamson wrote: > On Sat, 5 Nov 2016 02:40:45 +0530 > Kirti Wankhede wrote: > ... >> >> +int vfio_register_notifier(struct device *dev, struct notifier_block *nb) > > Is the expectation here that this is a generic notifier for all > vfio->mdev signaling? That

Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06

On Tuesday, November 8, 2016 11:47:09 AM CET zhichang.yuan wrote: > + /* > +* The first PCIBIOS_MIN_IO is reserved specifically for indirectIO. > +* It will separate indirectIO range from pci host bridge to > +* avoid the possible PIO conflict. > +* Set the

Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06

On Tuesday, November 8, 2016 11:47:09 AM CET zhichang.yuan wrote: > + /* > +* The first PCIBIOS_MIN_IO is reserved specifically for indirectIO. > +* It will separate indirectIO range from pci host bridge to > +* avoid the possible PIO conflict. > +* Set the

[tip:ras/core] x86/MCE: Do not look at panic_on_oops in the severity grading

Commit-ID: f5e886ef9b45a3dbfd42b054a13c755894ea8402 Gitweb: http://git.kernel.org/tip/f5e886ef9b45a3dbfd42b054a13c755894ea8402 Author: Yinghai Lu AuthorDate: Fri, 16 Sep 2016 13:23:25 -0700 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov

[tip:ras/core] x86/MCE: Do not look at panic_on_oops in the severity grading

Commit-ID: f5e886ef9b45a3dbfd42b054a13c755894ea8402 Gitweb: http://git.kernel.org/tip/f5e886ef9b45a3dbfd42b054a13c755894ea8402 Author: Yinghai Lu AuthorDate: Fri, 16 Sep 2016 13:23:25 -0700 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016 17:10:12 +0100 x86/MCE: Do not look at

Re: [RFC PATCH] perf/x86/intel/rapl: avoid access unallocate memory

On Tue, 8 Nov 2016, Charles (Chas) Williams wrote: > On 11/08/2016 09:31 AM, Thomas Gleixner wrote: > > On Tue, 8 Nov 2016, Charles (Chas) Williams wrote: > > > [0.016335] topology_update_package_map: apicid 0 pkg 0 cpu 0 > > > [0.016398] smpboot: APIC(0) Converting physical 0 to

Re: [RFC PATCH] perf/x86/intel/rapl: avoid access unallocate memory

On Tue, 8 Nov 2016, Charles (Chas) Williams wrote: > On 11/08/2016 09:31 AM, Thomas Gleixner wrote: > > On Tue, 8 Nov 2016, Charles (Chas) Williams wrote: > > > [0.016335] topology_update_package_map: apicid 0 pkg 0 cpu 0 > > > [0.016398] smpboot: APIC(0) Converting physical 0 to

RE: [PATCH] perf/x86: Fix overlap counter scheduling bug

> > > > > > diff --git a/arch/x86/events/intel/uncore_snbep.c > > b/arch/x86/events/intel/uncore_snbep.c > > index 272427700d48..71bc348736bd 100644 > > --- a/arch/x86/events/intel/uncore_snbep.c > > +++ b/arch/x86/events/intel/uncore_snbep.c > > @@ -669,7 +669,7 @@ static struct

RE: [PATCH] perf/x86: Fix overlap counter scheduling bug

> > > > > > diff --git a/arch/x86/events/intel/uncore_snbep.c > > b/arch/x86/events/intel/uncore_snbep.c > > index 272427700d48..71bc348736bd 100644 > > --- a/arch/x86/events/intel/uncore_snbep.c > > +++ b/arch/x86/events/intel/uncore_snbep.c > > @@ -669,7 +669,7 @@ static struct

[tip:ras/core] x86/RAS: Hide SMCA bank names

Commit-ID: c09a8c40e0a0b4994925ac8eba91b85d76f440a3 Gitweb: http://git.kernel.org/tip/c09a8c40e0a0b4994925ac8eba91b85d76f440a3 Author: Borislav Petkov AuthorDate: Thu, 3 Nov 2016 21:12:33 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016

Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA

On Tuesday, November 8, 2016 11:49:53 AM CET Mark Rutland wrote: > On Tue, Nov 08, 2016 at 11:47:08AM +0800, zhichang.yuan wrote: > > +Hisilicon Hip06 low-pin-count device > > + Usually LPC controller is part of PCI host bridge, so the legacy ISA > > ports > > + locate on LPC bus can be

[tip:ras/core] x86/RAS: Rename smca_bank_names to smca_names

Commit-ID: a9a1c0ee04aa771e5523ae33e458c702261ab547 Gitweb: http://git.kernel.org/tip/a9a1c0ee04aa771e5523ae33e458c702261ab547 Author: Borislav Petkov AuthorDate: Wed, 2 Nov 2016 13:24:47 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016

Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA

On Tuesday, November 8, 2016 11:49:53 AM CET Mark Rutland wrote: > On Tue, Nov 08, 2016 at 11:47:08AM +0800, zhichang.yuan wrote: > > +Hisilicon Hip06 low-pin-count device > > + Usually LPC controller is part of PCI host bridge, so the legacy ISA > > ports > > + locate on LPC bus can be

[tip:ras/core] x86/RAS: Rename smca_bank_names to smca_names

Commit-ID: a9a1c0ee04aa771e5523ae33e458c702261ab547 Gitweb: http://git.kernel.org/tip/a9a1c0ee04aa771e5523ae33e458c702261ab547 Author: Borislav Petkov AuthorDate: Wed, 2 Nov 2016 13:24:47 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016 17:10:14 +0100 x86/RAS: Rename

[tip:ras/core] x86/RAS: Hide SMCA bank names

Commit-ID: c09a8c40e0a0b4994925ac8eba91b85d76f440a3 Gitweb: http://git.kernel.org/tip/c09a8c40e0a0b4994925ac8eba91b85d76f440a3 Author: Borislav Petkov AuthorDate: Thu, 3 Nov 2016 21:12:33 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016 17:10:15 +0100 x86/RAS: Hide SMCA

Re: [Nouveau] [PATCH] drm/nouveau: fix LEDS_CLASS=m configuration

2016-11-08 17:12 GMT+01:00 Arnd Bergmann : > On Tuesday, November 8, 2016 5:07:01 PM CET Lukas Wunner wrote: >> On Tue, Nov 08, 2016 at 04:52:49PM +0100, Arnd Bergmann wrote: >> > The underlying problem is that we already have a number of other >> > symbols that either have "depends

Re: [RFC][ATCH 1/3] ptrace: Remove maxargs from task_current_syscall()

On Tue, Nov 8, 2016 at 8:16 AM, Linus Torvalds wrote: > So I definitely approve of the change, but I wonder if we should go > one step further: > > On Mon, Nov 7, 2016 at 1:26 PM, Steven Rostedt wrote: >> >> extern int

[tip:ras/core] x86/RAS: Simplify SMCA HWID descriptor struct

Commit-ID: 1ce9cd7f9f0b71af7c496b816734bc2dc699363a Gitweb: http://git.kernel.org/tip/1ce9cd7f9f0b71af7c496b816734bc2dc699363a Author: Borislav Petkov AuthorDate: Wed, 2 Nov 2016 12:48:01 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016

Re: [Nouveau] [PATCH] drm/nouveau: fix LEDS_CLASS=m configuration

2016-11-08 17:12 GMT+01:00 Arnd Bergmann : > On Tuesday, November 8, 2016 5:07:01 PM CET Lukas Wunner wrote: >> On Tue, Nov 08, 2016 at 04:52:49PM +0100, Arnd Bergmann wrote: >> > The underlying problem is that we already have a number of other >> > symbols that either have "depends on LEDS_CLASS"

Re: [RFC][ATCH 1/3] ptrace: Remove maxargs from task_current_syscall()

On Tue, Nov 8, 2016 at 8:16 AM, Linus Torvalds wrote: > So I definitely approve of the change, but I wonder if we should go > one step further: > > On Mon, Nov 7, 2016 at 1:26 PM, Steven Rostedt wrote: >> >> extern int task_current_syscall(struct task_struct *target, long *callno, >> -

[tip:ras/core] x86/RAS: Simplify SMCA HWID descriptor struct

Commit-ID: 1ce9cd7f9f0b71af7c496b816734bc2dc699363a Gitweb: http://git.kernel.org/tip/1ce9cd7f9f0b71af7c496b816734bc2dc699363a Author: Borislav Petkov AuthorDate: Wed, 2 Nov 2016 12:48:01 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016 17:10:14 +0100 x86/RAS: Simplify

[tip:ras/core] x86/MCE: Dump MCE to dmesg if no consumers

Commit-ID: cd9c57cad3fe89ea949b9266cddc947c0838f7af Gitweb: http://git.kernel.org/tip/cd9c57cad3fe89ea949b9266cddc947c0838f7af Author: Borislav Petkov AuthorDate: Tue, 1 Nov 2016 12:52:27 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016

[tip:ras/core] x86/MCE: Dump MCE to dmesg if no consumers

Commit-ID: cd9c57cad3fe89ea949b9266cddc947c0838f7af Gitweb: http://git.kernel.org/tip/cd9c57cad3fe89ea949b9266cddc947c0838f7af Author: Borislav Petkov AuthorDate: Tue, 1 Nov 2016 12:52:27 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016 17:10:13 +0100 x86/MCE: Dump MCE to

Re: [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced

On Tuesday, November 8, 2016 12:03:23 PM CET Mark Rutland wrote: > On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote: > > For arm64, there is no I/O space as other architectural platforms, such as > > X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs, > > such

Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards

On 11/08/2016 09:52 AM, Radosław Pietrzyk wrote: 2016-11-08 9:35 GMT+01:00 Gabriel Fernandez : Hi Radosław Many thanks for reviewing. On 11/07/2016 03:57 PM, Radosław Pietrzyk wrote: +static struct clk_hw *clk_register_pll_div(const char *name, + const

[tip:ras/core] x86/RAS: Simplify SMCA bank descriptor struct

Commit-ID: 79349f529ab1a629b9e43e81b4a5b2c22d1e9a65 Gitweb: http://git.kernel.org/tip/79349f529ab1a629b9e43e81b4a5b2c22d1e9a65 Author: Borislav Petkov AuthorDate: Tue, 1 Nov 2016 17:33:00 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016

Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards

On 11/08/2016 09:52 AM, Radosław Pietrzyk wrote: 2016-11-08 9:35 GMT+01:00 Gabriel Fernandez : Hi Radosław Many thanks for reviewing. On 11/07/2016 03:57 PM, Radosław Pietrzyk wrote: +static struct clk_hw *clk_register_pll_div(const char *name, + const char *parent_name,

[tip:ras/core] x86/RAS: Simplify SMCA bank descriptor struct

Commit-ID: 79349f529ab1a629b9e43e81b4a5b2c22d1e9a65 Gitweb: http://git.kernel.org/tip/79349f529ab1a629b9e43e81b4a5b2c22d1e9a65 Author: Borislav Petkov AuthorDate: Tue, 1 Nov 2016 17:33:00 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016 17:10:14 +0100 x86/RAS: Simplify

Re: [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced

On Tuesday, November 8, 2016 12:03:23 PM CET Mark Rutland wrote: > On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote: > > For arm64, there is no I/O space as other architectural platforms, such as > > X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs, > > such

[tip:ras/core] x86/RAS: Add TSC timestamp to the injected MCE

Commit-ID: 8c203dbb78ca7a9aed4e2570c866b0f43c752e41 Gitweb: http://git.kernel.org/tip/8c203dbb78ca7a9aed4e2570c866b0f43c752e41 Author: Borislav Petkov AuthorDate: Tue, 1 Nov 2016 13:04:41 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016

[tip:ras/core] x86/RAS: Add TSC timestamp to the injected MCE

Commit-ID: 8c203dbb78ca7a9aed4e2570c866b0f43c752e41 Gitweb: http://git.kernel.org/tip/8c203dbb78ca7a9aed4e2570c866b0f43c752e41 Author: Borislav Petkov AuthorDate: Tue, 1 Nov 2016 13:04:41 +0100 Committer: Thomas Gleixner CommitDate: Tue, 8 Nov 2016 17:10:13 +0100 x86/RAS: Add TSC

Re: [PATCH v11 10/22] vfio iommu type1: Add support for mediated devices

On Tue, 08 Nov 2016 10:20:14 +0800 Jike Song wrote: > On 11/08/2016 07:16 AM, Alex Williamson wrote: > > On Sat, 5 Nov 2016 02:40:44 +0530 > > Kirti Wankhede wrote: > > > >> VFIO IOMMU drivers are designed for the devices which are IOMMU capable. >

Re: [PATCH v11 10/22] vfio iommu type1: Add support for mediated devices

On Tue, 08 Nov 2016 10:20:14 +0800 Jike Song wrote: > On 11/08/2016 07:16 AM, Alex Williamson wrote: > > On Sat, 5 Nov 2016 02:40:44 +0530 > > Kirti Wankhede wrote: > > > >> VFIO IOMMU drivers are designed for the devices which are IOMMU capable. > >> Mediated device only uses IOMMU APIs,

Re: linux-next: manual merge of the scsi tree with the block tree

On Tue, 2016-11-08 at 16:48 +1100, Stephen Rothwell wrote: > Hi James, > > Today's linux-next merge of the scsi tree got a conflict in: > > drivers/scsi/ufs/ufshcd.c > > between commit: > > e806402130c9 ("block: split out request-only flags into a new > namespace") > > from the block tree

Re: linux-next: manual merge of the scsi tree with the block tree

On Tue, 2016-11-08 at 16:48 +1100, Stephen Rothwell wrote: > Hi James, > > Today's linux-next merge of the scsi tree got a conflict in: > > drivers/scsi/ufs/ufshcd.c > > between commit: > > e806402130c9 ("block: split out request-only flags into a new > namespace") > > from the block tree

Re: [PATCH] drm: mali-dp: Add support for setting plane's rotation property from userspace.

On Tue, Nov 08, 2016 at 01:43:25PM +, Liviu Dudau wrote: > In order to support DRM_IOCTL_MODE_OBJ_SETPROPERTY for the rotation property > we need to have a ->set_property hook defined for the planes. Set the > plane's ->set_property hook to drm_atomic_helper_plane_set_property() > >

Re: [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced

On Tuesday, November 8, 2016 5:09:59 PM CET Arnd Bergmann wrote: > > I don't see a better alternative. I earlier suggested having these > out of line so we don't grow the object code too much when it is > enabled. > On second look, I see that they are all done out of line, I would just move

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