On Fri, Dec 02, 2016 at 11:26:02AM +0100, Lucas Stach wrote:
> Am Donnerstag, den 01.12.2016, 15:11 +0100 schrieb Michal Hocko:
> > Let's also CC Marek
> >
> > On Thu 01-12-16 08:43:40, Vlastimil Babka wrote:
> > > On 12/01/2016 08:21 AM, Michal Hocko wrote:
> > > > Forgot to CC Joonsoo. The
On Fri, Dec 02, 2016 at 11:26:02AM +0100, Lucas Stach wrote:
> Am Donnerstag, den 01.12.2016, 15:11 +0100 schrieb Michal Hocko:
> > Let's also CC Marek
> >
> > On Thu 01-12-16 08:43:40, Vlastimil Babka wrote:
> > > On 12/01/2016 08:21 AM, Michal Hocko wrote:
> > > > Forgot to CC Joonsoo. The
Hi!
I've got the following error report while running the syzkaller fuzzer.
The length passed to memdup_user() directly without limitations.
On commit 2caceb3294a78c389b462e7e236a4e744a53a474 (Dec 1).
WARNING: CPU: 3 PID: 14477 at mm/page_alloc.c:3511
__alloc_pages_nodemask+0x159c/0x1e20
Hi!
I've got the following error report while running the syzkaller fuzzer.
The length passed to memdup_user() directly without limitations.
On commit 2caceb3294a78c389b462e7e236a4e744a53a474 (Dec 1).
WARNING: CPU: 3 PID: 14477 at mm/page_alloc.c:3511
__alloc_pages_nodemask+0x159c/0x1e20
Em Fri, Dec 02, 2016 at 10:15:39AM +0100, Jiri Olsa escreveu:
> On Thu, Dec 01, 2016 at 04:53:23PM -0200, Arnaldo Carvalho de Melo wrote:
> > Em Thu, Dec 01, 2016 at 09:48:40AM -0800, Peter Foley escreveu:
> > > On Thu, Dec 1, 2016 at 5:00 AM, Jiri Olsa wrote:
> > > > ok, so v3
Em Fri, Dec 02, 2016 at 10:15:39AM +0100, Jiri Olsa escreveu:
> On Thu, Dec 01, 2016 at 04:53:23PM -0200, Arnaldo Carvalho de Melo wrote:
> > Em Thu, Dec 01, 2016 at 09:48:40AM -0800, Peter Foley escreveu:
> > > On Thu, Dec 1, 2016 at 5:00 AM, Jiri Olsa wrote:
> > > > ok, so v3 actually ;-)
> >
On Fri, Dec 02, 2016 at 05:45:18PM +0300, Andrey Ryabinin wrote:
>
>
> On 12/02/2016 05:42 PM, Josh Poimboeuf wrote:
>
>
> > diff --git a/mm/kasan/kasan.c b/mm/kasan/kasan.c
> > index 0e9505f..e9d8ba0 100644
> > --- a/mm/kasan/kasan.c
> > +++ b/mm/kasan/kasan.c
> > @@ -80,7 +80,14 @@ void
On Fri, Dec 02, 2016 at 05:45:18PM +0300, Andrey Ryabinin wrote:
>
>
> On 12/02/2016 05:42 PM, Josh Poimboeuf wrote:
>
>
> > diff --git a/mm/kasan/kasan.c b/mm/kasan/kasan.c
> > index 0e9505f..e9d8ba0 100644
> > --- a/mm/kasan/kasan.c
> > +++ b/mm/kasan/kasan.c
> > @@ -80,7 +80,14 @@ void
Greg KH wrote:
> > If root is able to modify the behaviour of verified code after it was
> > verified, then the value of that verification is reduced. Ensuring that
> > the code remains trustworthy is vital in a number of security use cases.
>
> Ok, but why are you
Greg KH wrote:
> > If root is able to modify the behaviour of verified code after it was
> > verified, then the value of that verification is reduced. Ensuring that
> > the code remains trustworthy is vital in a number of security use cases.
>
> Ok, but why are you now deciding to somehow try
According to the documentation, the PHYs supported by this driver
can also support pause frames. Announce this to be so.
Tested with a TI83822I.
Acked-by: Andrew F. Davis
Signed-off-by: Jesper Nilsson
---
drivers/net/phy/dp83848.c | 4 +++-
1 file changed,
On Fri, Dec 2, 2016 at 9:44 AM, Michal Hocko wrote:
> On Fri 02-12-16 15:38:48, Michal Hocko wrote:
>> On Fri 02-12-16 09:24:35, Dan Streetman wrote:
>> > On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
>> > > On Wed 30-11-16 13:15:16, Yu Zhao wrote:
>>
Currently the driver sets all the device transactions privileges
to UNPRIVILEGED, but there are cases where the iommu masters wants
to isolate privileged supervisor and unprivileged user.
So don't override the privileged setting to unprivileged, instead
set it to default as incoming and let it be
From: Mitchel Humpherys
The PL330 performs privileged instruction fetches. This can result in
SMMU permission faults on SMMUs that implement the ARMv8 VMSA, which
specifies that mappings that are writeable at one execution level shall
not be executable at any
According to the documentation, the PHYs supported by this driver
can also support pause frames. Announce this to be so.
Tested with a TI83822I.
Acked-by: Andrew F. Davis
Signed-off-by: Jesper Nilsson
---
drivers/net/phy/dp83848.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
On Fri, Dec 2, 2016 at 9:44 AM, Michal Hocko wrote:
> On Fri 02-12-16 15:38:48, Michal Hocko wrote:
>> On Fri 02-12-16 09:24:35, Dan Streetman wrote:
>> > On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
>> > > On Wed 30-11-16 13:15:16, Yu Zhao wrote:
>> > >> __unregister_cpu_notifier() only
Currently the driver sets all the device transactions privileges
to UNPRIVILEGED, but there are cases where the iommu masters wants
to isolate privileged supervisor and unprivileged user.
So don't override the privileged setting to unprivileged, instead
set it to default as incoming and let it be
From: Mitchel Humpherys
The PL330 performs privileged instruction fetches. This can result in
SMMU permission faults on SMMUs that implement the ARMv8 VMSA, which
specifies that mappings that are writeable at one execution level shall
not be executable at any higher-privileged level. Fix this
From: Mitchel Humpherys
This patch adds the DMA_ATTR_PRIVILEGED attribute to the DMA-mapping
subsystem.
Some advanced peripherals such as remote processors and GPUs perform
accesses to DMA buffers in both privileged "supervisor" and unprivileged
"user" modes. This
From: Mitchel Humpherys
This patch adds the DMA_ATTR_PRIVILEGED attribute to the DMA-mapping
subsystem.
Some advanced peripherals such as remote processors and GPUs perform
accesses to DMA buffers in both privileged "supervisor" and unprivileged
"user" modes. This attribute is used to indicate
From: Mitchel Humpherys
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Mitchel
From: Mitchel Humpherys
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Reviewed-by: Robin Murphy
This series is a resend of the V5 that Mitch sent sometime back [2]
All the patches are the same and i have just rebased. Not sure why this
finally did not make it last time. The last patch in the previous
series does not apply now [3], so just redid that. Also Copied the tags
that he had from
From: Mitchel Humpherys
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Mitchel Humpherys
---
[V6] No change
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
From: Mitchel Humpherys
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will
This series is a resend of the V5 that Mitch sent sometime back [2]
All the patches are the same and i have just rebased. Not sure why this
finally did not make it last time. The last patch in the previous
series does not apply now [3], so just redid that. Also Copied the tags
that he had from
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Jeremy Gebben
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Jeremy Gebben
---
[V6] No change
drivers/iommu/io-pgtable-arm.c | 5 -
1 file changed, 4 insertions(+), 1
On Friday, December 2, 2016 1:59:15 PM CET Geert Uytterhoeven wrote:
> On Fri, Dec 2, 2016 at 1:40 PM, Arnd Bergmann wrote:
> > With binutils-2.16 and before, a weak missing symbol was kept during the
>
> 2.26?
>
> > final link, and a missing CRC for an export would lead to that
On Friday, December 2, 2016 1:59:15 PM CET Geert Uytterhoeven wrote:
> On Fri, Dec 2, 2016 at 1:40 PM, Arnd Bergmann wrote:
> > With binutils-2.16 and before, a weak missing symbol was kept during the
>
> 2.26?
>
> > final link, and a missing CRC for an export would lead to that CRC
> > being
Hi cuilifei,
[auto build test WARNING on fuse/for-next]
[also build test WARNING on v4.9-rc7 next-20161202]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/cuilifei/fuse-freezing-abort-when-use
Hi cuilifei,
[auto build test WARNING on fuse/for-next]
[also build test WARNING on v4.9-rc7 next-20161202]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/cuilifei/fuse-freezing-abort-when-use
On Fri, Dec 02, 2016 at 08:35:23AM -0600, Andrew F. Davis wrote:
> On 12/02/2016 08:22 AM, Jesper Nilsson wrote:
> > According to the documentation, the PHYs supported by this driver
> > can also support pause frames. Announce this to be so.
> > Tested with a TI83822I.
> >
>
> Looks like all
On Fri, Dec 02, 2016 at 08:35:23AM -0600, Andrew F. Davis wrote:
> On 12/02/2016 08:22 AM, Jesper Nilsson wrote:
> > According to the documentation, the PHYs supported by this driver
> > can also support pause frames. Announce this to be so.
> > Tested with a TI83822I.
> >
>
> Looks like all
linux/page-flags.h has a flag for describing special pages:
> PG_reserved is set for special pages, which can never be swapped out.
> Some of them might not even exist (eg empty_bad_page)...
memblock nomap pages fall in the 'might not even exist' category,
set this bit on all the struct pages in
linux/page-flags.h has a flag for describing special pages:
> PG_reserved is set for special pages, which can never be swapped out.
> Some of them might not even exist (eg empty_bad_page)...
memblock nomap pages fall in the 'might not even exist' category,
set this bit on all the struct pages in
pfn_valid() needs to be changed so that all struct pages in a numa
node have the same node-id. Currently 'nomap' pages are skipped, and
retain their pre-numa node-ids, which leads to a later BUG_ON().
Once this change happens, hibernate's code code will try and
save/restore the nomap pages.
Add
pfn_valid() needs to be changed so that all struct pages in a numa
node have the same node-id. Currently 'nomap' pages are skipped, and
retain their pre-numa node-ids, which leads to a later BUG_ON().
Once this change happens, hibernate's code code will try and
save/restore the nomap pages.
Add
Patch "arm64: mm: Fix memmap to be initialized for the entire section"
changes pfn_valid() in a way that breaks hibernate. These patches fix
hibernate, and provided struct page's are allocated for nomap pages,
can be applied before [0].
Hibernate core code belives 'valid' to mean "I can access
Patch "arm64: mm: Fix memmap to be initialized for the entire section"
changes pfn_valid() in a way that breaks hibernate. These patches fix
hibernate, and provided struct page's are allocated for nomap pages,
can be applied before [0].
Hibernate core code belives 'valid' to mean "I can access
In function ioat_dma_self_test(), when the calls to dma_mapping_error()
fails, the value of return variable err is 0 (indicates no error). As a
result, the return value may be inconsistent with the execution status.
This patch fixes the bug by assigning -ENOMEM to err on the error path.
In function ioat_dma_self_test(), when the calls to dma_mapping_error()
fails, the value of return variable err is 0 (indicates no error). As a
result, the return value may be inconsistent with the execution status.
This patch fixes the bug by assigning -ENOMEM to err on the error path.
Hi Robert,
On 02/12/16 07:11, Robert Richter wrote:
> On 01.12.16 17:26:55, James Morse wrote:
>> On 01/12/16 16:45, Will Deacon wrote:
>>> Thanks for sending out the new patch. Whilst I'm still a bit worried about
>>> changing pfn_valid like this, I guess we'll just have to fix up any callers
Hi Robert,
On 02/12/16 07:11, Robert Richter wrote:
> On 01.12.16 17:26:55, James Morse wrote:
>> On 01/12/16 16:45, Will Deacon wrote:
>>> Thanks for sending out the new patch. Whilst I'm still a bit worried about
>>> changing pfn_valid like this, I guess we'll just have to fix up any callers
Some more bits and pieces inside.
---
Best Regards, Laurentiu
On 12/02/2016 12:41 AM, Stuart Yoder wrote:
> From: Roy Pledge
>
> Add global definitions for DPAA2 frame descriptors and scatter
> gather entries.
>
> Signed-off-by: Roy Pledge
>
Some more bits and pieces inside.
---
Best Regards, Laurentiu
On 12/02/2016 12:41 AM, Stuart Yoder wrote:
> From: Roy Pledge
>
> Add global definitions for DPAA2 frame descriptors and scatter
> gather entries.
>
> Signed-off-by: Roy Pledge
> Signed-off-by: Stuart Yoder
> ---
>
> Notes:
>
Resuming from a suspend operation is showing a KASAN false positive
warning:
BUG: KASAN: stack-out-of-bounds in unwind_get_return_address+0x11d/0x130 at
addr 8803867d7878
Read of size 8 by task pm-suspend/7774
page:ea000e19f5c0 count:0 mapcount:0 mapping: (null) index:0x0
On Fri 02-12-16 15:38:48, Michal Hocko wrote:
> On Fri 02-12-16 09:24:35, Dan Streetman wrote:
> > On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
> > > On Wed 30-11-16 13:15:16, Yu Zhao wrote:
> > >> __unregister_cpu_notifier() only removes registered notifier from its
> >
Hi cuilifei,
[auto build test ERROR on fuse/for-next]
[also build test ERROR on v4.9-rc7 next-20161202]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/cuilifei/fuse-freezing-abort-when-use
Resuming from a suspend operation is showing a KASAN false positive
warning:
BUG: KASAN: stack-out-of-bounds in unwind_get_return_address+0x11d/0x130 at
addr 8803867d7878
Read of size 8 by task pm-suspend/7774
page:ea000e19f5c0 count:0 mapcount:0 mapping: (null) index:0x0
On Fri 02-12-16 15:38:48, Michal Hocko wrote:
> On Fri 02-12-16 09:24:35, Dan Streetman wrote:
> > On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
> > > On Wed 30-11-16 13:15:16, Yu Zhao wrote:
> > >> __unregister_cpu_notifier() only removes registered notifier from its
> > >> linked list
Hi cuilifei,
[auto build test ERROR on fuse/for-next]
[also build test ERROR on v4.9-rc7 next-20161202]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/cuilifei/fuse-freezing-abort-when-use
On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
> On Wed 30-11-16 13:15:16, Yu Zhao wrote:
>> __unregister_cpu_notifier() only removes registered notifier from its
>> linked list when CPU hotplug is configured. If we free registered CPU
>> notifier when HOTPLUG_CPU=n, we
On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
> On Wed 30-11-16 13:15:16, Yu Zhao wrote:
>> __unregister_cpu_notifier() only removes registered notifier from its
>> linked list when CPU hotplug is configured. If we free registered CPU
>> notifier when HOTPLUG_CPU=n, we corrupt the linked
On 2.12.2016 15:07, Sasikumar Chandrasekaran wrote:
> Sasikumar Chandrasekaran (11):
> megaraid_sas: Add new pci device Ids for SAS3.5 Generic Megaraid
> Controllers
> megaraid_sas: 128 MSIX Support
> megaraid_sas: EEDP Escape Mode Support for SAS3.5 Generic Megaraid
> Controllers
>
On 2.12.2016 15:07, Sasikumar Chandrasekaran wrote:
> Sasikumar Chandrasekaran (11):
> megaraid_sas: Add new pci device Ids for SAS3.5 Generic Megaraid
> Controllers
> megaraid_sas: 128 MSIX Support
> megaraid_sas: EEDP Escape Mode Support for SAS3.5 Generic Megaraid
> Controllers
>
On Fri 02-12-16 09:24:35, Dan Streetman wrote:
> On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
> > On Wed 30-11-16 13:15:16, Yu Zhao wrote:
> >> __unregister_cpu_notifier() only removes registered notifier from its
> >> linked list when CPU hotplug is configured. If we
On Fri 02-12-16 09:24:35, Dan Streetman wrote:
> On Fri, Dec 2, 2016 at 8:46 AM, Michal Hocko wrote:
> > On Wed 30-11-16 13:15:16, Yu Zhao wrote:
> >> __unregister_cpu_notifier() only removes registered notifier from its
> >> linked list when CPU hotplug is configured. If we free registered CPU
>
On 01.12.2016 17:12, Michal Marek wrote:
> On 2016-12-01 04:39, Nicholas Piggin wrote:
>> On Thu, 01 Dec 2016 02:35:54 +
>> Ben Hutchings wrote:
>>> As I understand it, genksyms incorporates the definitions of a
>>> function's parameter and return types - not just their
On 01.12.2016 17:12, Michal Marek wrote:
> On 2016-12-01 04:39, Nicholas Piggin wrote:
>> On Thu, 01 Dec 2016 02:35:54 +
>> Ben Hutchings wrote:
>>> As I understand it, genksyms incorporates the definitions of a
>>> function's parameter and return types - not just their names - and all
>>>
Hi!
I've got the following error report while booting the kernel with
various usb configs enabled.
On commit 2caceb3294a78c389b462e7e236a4e744a53a474 (Dec 1).
gadgetfs: USB Gadget filesystem, version 24 Aug 2004
usbip_core: USB/IP Core v1.0.0
vhci_hcd vhci_hcd: USB/IP Virtual Host Controller
Hi!
I've got the following error report while booting the kernel with
various usb configs enabled.
On commit 2caceb3294a78c389b462e7e236a4e744a53a474 (Dec 1).
gadgetfs: USB Gadget filesystem, version 24 Aug 2004
usbip_core: USB/IP Core v1.0.0
vhci_hcd vhci_hcd: USB/IP Virtual Host Controller
On 12/02/2016 08:22 AM, Jesper Nilsson wrote:
> According to the documentation, the PHYs supported by this driver
> can also support pause frames. Announce this to be so.
> Tested with a TI83822I.
>
Looks like all PHYs supported by this driver do, so:
Acked-by: Andrew F. Davis
>
On 12/02/2016 08:22 AM, Jesper Nilsson wrote:
> According to the documentation, the PHYs supported by this driver
> can also support pause frames. Announce this to be so.
> Tested with a TI83822I.
>
Looks like all PHYs supported by this driver do, so:
Acked-by: Andrew F. Davis
>
Hi,
On 02-12-16 15:22, Icenowy Zheng wrote:
01.12.2016, 17:36, "Maxime Ripard" :
On Mon, Nov 28, 2016 at 12:29:07AM +, André Przywara wrote:
> Something more interesting happened.
>
> Xunlong made a add-on board for Orange Pi Zero, which exposes the
Hi,
On 02-12-16 15:22, Icenowy Zheng wrote:
01.12.2016, 17:36, "Maxime Ripard" :
On Mon, Nov 28, 2016 at 12:29:07AM +, André Przywara wrote:
> Something more interesting happened.
>
> Xunlong made a add-on board for Orange Pi Zero, which exposes the
> two USB Controllers exported at
This patch adds support for the min, max and alarm attributes of the
voltage and temperature channels. Additionally, the temp2_fault attribute
is supported which indicates a fault of the external temperature diode.
Signed-off-by: Michael Walle
---
v2:
- use BIT()
- new
This patch adds support for the min, max and alarm attributes of the
voltage and temperature channels. Additionally, the temp2_fault attribute
is supported which indicates a fault of the external temperature diode.
Signed-off-by: Michael Walle
---
v2:
- use BIT()
- new function
On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
> This hardware block could at used at same time for PWM generation
> and IIO timer for other IPs like DAC, ADC or other timers.
> PWM and IIO timer configuration are mixed in the same registers
> so we need a multi fonction driver to be able to share
On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
> This hardware block could at used at same time for PWM generation
> and IIO timer for other IPs like DAC, ADC or other timers.
> PWM and IIO timer configuration are mixed in the same registers
> so we need a multi fonction driver to be able to share
Hi Pavel and Peppe,
On 12/02/2016 02:51 PM, Giuseppe CAVALLARO wrote:
On 12/2/2016 1:32 PM, Pavel Machek wrote:
Hi!
Well, if you have a workload that sends and receive packets, it tends
to work ok, as you do tx_clean() in stmmac_poll(). My workload is not
like that -- it is "sending packets
Hi Pavel and Peppe,
On 12/02/2016 02:51 PM, Giuseppe CAVALLARO wrote:
On 12/2/2016 1:32 PM, Pavel Machek wrote:
Hi!
Well, if you have a workload that sends and receive packets, it tends
to work ok, as you do tx_clean() in stmmac_poll(). My workload is not
like that -- it is "sending packets
On 02/12/16 04:21, Masahiro Yamada wrote:
> Some SDHCI-compat controllers support not only SD, but also eMMC,
> but they use different commands for tuning: CMD19 for SD, CMD21 for
> eMMC.
>
> Due to the difference of the underlying mechanism, some controllers
> (at least, the Cadence IP is the
On 02/12/16 04:21, Masahiro Yamada wrote:
> Some SDHCI-compat controllers support not only SD, but also eMMC,
> but they use different commands for tuning: CMD19 for SD, CMD21 for
> eMMC.
>
> Due to the difference of the underlying mechanism, some controllers
> (at least, the Cadence IP is the
2016-12-02 14:59 GMT+01:00 Lee Jones :
> On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
>
>> Define bindings for stm32 timer trigger
>>
>> version 3:
>> - change file name
>> - add cross reference with mfd bindings
>>
>> version 2:
>> - only keep one compatible
>> - add DT
2016-12-02 14:59 GMT+01:00 Lee Jones :
> On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
>
>> Define bindings for stm32 timer trigger
>>
>> version 3:
>> - change file name
>> - add cross reference with mfd bindings
>>
>> version 2:
>> - only keep one compatible
>> - add DT parameters to set lists
According to the documentation, the PHYs supported by this driver
can also support pause frames. Announce this to be so.
Tested with a TI83822I.
Signed-off-by: Jesper Nilsson
---
drivers/net/phy/dp83848.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
According to the documentation, the PHYs supported by this driver
can also support pause frames. Announce this to be so.
Tested with a TI83822I.
Signed-off-by: Jesper Nilsson
---
drivers/net/phy/dp83848.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
> Define bindings for pwm-stm32
>
> version 2:
> - use parameters instead of compatible of handle the hardware configuration
>
> Signed-off-by: Benjamin Gaignard
> ---
> .../devicetree/bindings/pwm/pwm-stm32.txt
On Fri, 02 Dec 2016, Benjamin Gaignard wrote:
> Define bindings for pwm-stm32
>
> version 2:
> - use parameters instead of compatible of handle the hardware configuration
>
> Signed-off-by: Benjamin Gaignard
> ---
> .../devicetree/bindings/pwm/pwm-stm32.txt | 38
>
This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to
the RTC must be 1 MHz.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f429.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi
This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to
the RTC must be 1 MHz.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f429.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index
This patch adds STM32 RTC support in stm32_defconfig file.
Signed-off-by: Amelie Delaunay
---
arch/arm/configs/stm32_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig
index e7b56d4..71f9787
This patch adds STM32 RTC support in stm32_defconfig file.
Signed-off-by: Amelie Delaunay
---
arch/arm/configs/stm32_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig
index e7b56d4..71f9787 100644
---
This patch enables RTC on stm32f429-disco with LSI as clock source because
X2 crystal for LSE is not fitted by default.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f429-disco.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git
This patch enables RTC on stm32f469-disco with default LSE clock source.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f469-disco.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts
From: Niklas Cassel
GMAC and newer supports independent programmable burst lengths for
DMA tx/rx. Add new optional devicetree properties representing this.
To be backwards compatible, snps,pbl will still be valid, but
snps,txpbl/snps,rxpbl will override the value in
This patch enables RTC on stm32429i-eval with default LSE clock source.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32429i-eval.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts
This patch enables RTC on stm32f429-disco with LSI as clock source because
X2 crystal for LSE is not fitted by default.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f429-disco.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429-disco.dts
This patch enables RTC on stm32f469-disco with default LSE clock source.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f469-disco.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts
b/arch/arm/boot/dts/stm32f469-disco.dts
index
From: Niklas Cassel
GMAC and newer supports independent programmable burst lengths for
DMA tx/rx. Add new optional devicetree properties representing this.
To be backwards compatible, snps,pbl will still be valid, but
snps,txpbl/snps,rxpbl will override the value in snps,pbl if set.
If the IP
This patch enables RTC on stm32429i-eval with default LSE clock source.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32429i-eval.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts
b/arch/arm/boot/dts/stm32429i-eval.dts
index
From: Niklas Cassel
DMA_BUS_MODE_RPBL_MASK is really 6 bits,
just like DMA_BUS_MODE_PBL_MASK.
Signed-off-by: Niklas Cassel
---
drivers/net/ethernet/stmicro/stmmac/dwmac1000.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
> -Original Message-
> From: Vineet Gupta [mailto:vgu...@synopsys.com]
> Sent: Wednesday, November 30, 2016 7:55 PM
> To: Yuriy Kolerov ; Michal Hocko
>
> Cc: linux-snps-...@lists.infradead.org; alexey.brod...@synopsys.com; linux-
>
This patch adds STM32 RTC bindings for STM32F429.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f429.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index
From: Niklas Cassel
The driver currently always sets the PBLx8/PBLx4 bit, which means that
the pbl values configured via the pbl/txpbl/rxpbl DT properties are
always multiplied by 8/4 in the hardware.
In order to allow the DT to configure lower pbl values, while at the
From: Niklas Cassel
DMA_BUS_MODE_RPBL_MASK is really 6 bits,
just like DMA_BUS_MODE_PBL_MASK.
Signed-off-by: Niklas Cassel
---
drivers/net/ethernet/stmicro/stmmac/dwmac1000.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
> -Original Message-
> From: Vineet Gupta [mailto:vgu...@synopsys.com]
> Sent: Wednesday, November 30, 2016 7:55 PM
> To: Yuriy Kolerov ; Michal Hocko
>
> Cc: linux-snps-...@lists.infradead.org; alexey.brod...@synopsys.com; linux-
> ker...@vger.kernel.org
> Subject: Re: [RFC] ARC: mm:
This patch adds STM32 RTC bindings for STM32F429.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32f429.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index d195ccf..d181025 100644
---
From: Niklas Cassel
The driver currently always sets the PBLx8/PBLx4 bit, which means that
the pbl values configured via the pbl/txpbl/rxpbl DT properties are
always multiplied by 8/4 in the hardware.
In order to allow the DT to configure lower pbl values, while at the
same time not changing
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